sylware / linux-gpu-amd-si (public) (License: GPLv2+) (since 2019-09-09) (hash sha1)
my old AMD Southern Islands GPU linux driver
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master
List of commits:
Subject Hash Author Date (UTC)
pcie things and follow upstream for dyn pm init f4fb120597276a3badc08eec30783b10d111f756 Sylvain BERTRAND 2014-02-17 09:00:00
dump performance state tbls 06a22756b504ecf4523c86f657104e0b970195de Sylvain BERTRAND 2014-02-14 17:02:23
smc_mc_arb_tbl init for the driver state 5d1868e75b11164dbb97caaddbc7992b252ab973 Sylvain BERTRAND 2014-02-14 13:01:26
smc_mc_reg tbl init for the driver state e8aa12b1c87571031098c4427822733a74133afc Sylvain BERTRAND 2014-02-14 11:32:04
installation of the perf pwr state continued 535c853e7d0a0ab04fbff3b0d5613ef9a34d525c Sylvain BERTRAND 2014-02-13 19:16:33
installation of the perf pwr state continued b229eef2798acbe053aa09e47c213e23749638dd Sylvain BERTRAND 2014-02-13 10:48:02
dyn pm second part continuation 95dd7b4754476a014d8f84854e5b2ce5c81d23b4 Sylvain BERTRAND 2014-02-12 20:15:03
beginning of dyn pm second part c32c19d884dbf1f440480bbea42140e9c5ed8cd3 Sylvain BERTRAND 2014-02-12 14:44:04
uvd does only mpeg, then switch off 7e36b98bcab47e9986a63093dbeed98ab290f85f Sylvain BERTRAND 2014-02-12 10:55:54
bug fixing, end of dyn pm first part 533a4bd6731205f71704886e5fa099063be985ea Sylvain BERTRAND 2014-02-11 13:49:27
bug fixing c3fc0d7b807c98d20c13f53dcfc09713309ad2fa Sylvain BERTRAND 2014-02-11 11:16:00
static bios tbls *must* be ok e050fa94c2f1e846bb051748347332e234a6b93a Sylvain BERTRAND 2014-02-10 10:17:33
bug fixing 7baa7069aa89a98d831d7def358766155771e9ca Sylvain BERTRAND 2014-02-07 15:08:53
bug fixing d4a1ef00d163bc42e277c83d0a763fa11476af56 Sylvain BERTRAND 2014-02-06 20:14:33
tbls fixes 4795a3090a17bc486056301bc6bef509b9c5e339 Sylvain BERTRAND 2014-02-05 15:09:41
log more accurately the smc tbls 3d88d2a589a89e9a34f4046242f4a72a76069ddb Sylvain BERTRAND 2014-02-05 10:51:39
log more 5018f3c130cb9ce53e1834fcc586f00614a3ed86 Sylvain BERTRAND 2014-02-04 21:46:05
smc sw regs dump code 46acefa1d42984757cb1ba48a32130f2f9674687 Sylvain BERTRAND 2014-02-04 20:44:26
do dump the tbls c79209766b71e2d3231cf25673684762bf46dd8c Sylvain BERTRAND 2014-02-04 20:20:33
mc_dte_cfg_tbl dump code 46dcab9ac217dbf29a1295622587e083f161b677 Sylvain BERTRAND 2014-02-04 20:11:45
Commit f4fb120597276a3badc08eec30783b10d111f756 - pcie things and follow upstream for dyn pm init
Author: Sylvain BERTRAND
Author date (UTC): 2014-02-17 09:00
Committer name: Sylvain BERTRAND
Committer date (UTC): 2014-02-17 09:00
Parent(s): 06a22756b504ecf4523c86f657104e0b970195de
Signing key:
Tree: 1fa44dd78aee1a45c48f8ea6820b0fee816a5f66
File Lines added Lines deleted
drivers/gpu/alga/amd/si/drv.c 9 7
drivers/gpu/alga/amd/si/dyn_pm/ctx.c 5 5
drivers/gpu/alga/amd/si/dyn_pm/ctx.h 1 1
drivers/gpu/alga/amd/si/dyn_pm/driver.c 3 0
drivers/gpu/alga/amd/si/dyn_pm/dyn_pm.c 0 6
drivers/gpu/alga/amd/si/dyn_pm/ulv.c 2 1
File drivers/gpu/alga/amd/si/drv.c changed (mode: 100644) (index d6f8f55..362b714)
... ... static long asic_init(struct pci_dev *dev)
324 324 /* CFG_MEM_SZ is now valid */ /* CFG_MEM_SZ is now valid */
325 325 dev_info(&dev->dev, "vram size is %uMB\n", rr32(dev, CFG_MEM_SZ)); dev_info(&dev->dev, "vram size is %uMB\n", rr32(dev, CFG_MEM_SZ));
326 326
327 r = dyn_pm_ena(dev);
328 if (r == -SI_ERR)
329 goto err;
330
327 331 /* claim back the 256k vga memory at vram beginning */ /* claim back the 256k vga memory at vram beginning */
328 332 dce6_vga_off(dd->dce); dce6_vga_off(dd->dce);
329 333
 
... ... static long asic_init(struct pci_dev *dev)
335 339 /* quiet the memory requests before mc programming: dce then gpu */ /* quiet the memory requests before mc programming: dce then gpu */
336 340 r = dce6_crtcs_shutdown(dd->dce); r = dce6_crtcs_shutdown(dd->dce);
337 341 if (r == -DCE6_ERR) if (r == -DCE6_ERR)
338 goto err;
342 goto err_disable_dyn_pm;
339 343
340 344 bif_mc_mem_reqs_dis(dev); bif_mc_mem_reqs_dis(dev);
341 345 udelay(100); udelay(100);
342 346
343 347 if (mc_wait_for_idle(dev)) { if (mc_wait_for_idle(dev)) {
344 348 dev_warn(&dev->dev, "wait for mc idle timed out\n"); dev_warn(&dev->dev, "wait for mc idle timed out\n");
345 goto err;
349 goto err_disable_dyn_pm;
346 350 } }
347 351 /*--------------------------------------------------------------------*/ /*--------------------------------------------------------------------*/
348 352
 
... ... static long asic_init(struct pci_dev *dev)
363 367 GPU_PAGE_SZ, GPU_PAGE_SZ); GPU_PAGE_SZ, GPU_PAGE_SZ);
364 368 if (r == -ALGA_ERR) { if (r == -ALGA_ERR) {
365 369 dev_err(&dev->dev, "unable to alloc GPU scratch page\n"); dev_err(&dev->dev, "unable to alloc GPU scratch page\n");
366 goto err;
370 goto err_disable_dyn_pm;
367 371 } }
368 372
369 373 bif_mc_mem_reqs_ena(dev); bif_mc_mem_reqs_ena(dev);
 
... ... static long asic_init(struct pci_dev *dev)
426 430 r = dce6_init(dd->dce, dd->addr_cfg); r = dce6_init(dd->dce, dd->addr_cfg);
427 431 if (r == -DCE6_ERR) if (r == -DCE6_ERR)
428 432 goto err_stop_dmas; goto err_stop_dmas;
429
430 r = dyn_pm_ena(dev);
431 if (r == -SI_ERR)
432 goto err_stop_dmas;
433 433 return 0; return 0;
434 434
435 435 err_stop_dmas: err_stop_dmas:
 
... ... err_ba_shutdown:
458 458 err_free_scratch_page: err_free_scratch_page:
459 459 rng_free(&dd->vram.mng, dd->vram.scratch_page); rng_free(&dd->vram.mng, dd->vram.scratch_page);
460 460
461 err_disable_dyn_pm:
462
461 463 err: err:
462 464 return -SI_ERR; return -SI_ERR;
463 465 } }
File drivers/gpu/alga/amd/si/dyn_pm/ctx.c changed (mode: 100644) (index ff2211c..d562828)
... ... static void atb_pp_state_dump(struct atb_pp_state *s, char *name)
48 48
49 49 lvl = &s->lvls[lvl_idx]; lvl = &s->lvls[lvl_idx];
50 50 if (IS_VDDC_LKGE_IDX(lvl->vddc_id)) { if (IS_VDDC_LKGE_IDX(lvl->vddc_id)) {
51 LOG("atb_pp_%s_lvl[%u]:vddc=0x%04x(leakage index) engine clock=%ukHz memory clock=%ukHz",
51 LOG("atb_pp_%s_lvl[%u]:vddc=0x%04x(leakage index) engine clock=%ukHz memory clock=%ukHz pcie generation=%u",
52 52 name, lvl_idx, lvl->vddc_id, lvl->eng_clk * 10, name, lvl_idx, lvl->vddc_id, lvl->eng_clk * 10,
53 lvl->mem_clk * 10);
53 lvl->mem_clk * 10, lvl->pcie_gen + 1);
54 54 } else { } else {
55 LOG("atb_pp_%s_lvl[%u]:vddc=%umV engine clock=%ukHz memory clock=%ukHz",
55 LOG("atb_pp_%s_lvl[%u]:vddc=%umV engine clock=%ukHz memory clock=%ukHz pcie generation=%u",
56 56 name, lvl_idx, lvl->vddc_id, lvl->eng_clk * 10, name, lvl_idx, lvl->vddc_id, lvl->eng_clk * 10,
57 lvl->mem_clk * 10);
57 lvl->mem_clk * 10, lvl->pcie_gen + 1);
58 58 } }
59 59 } }
60 60 } }
 
... ... long ctx_init(struct pci_dev *dev, struct ctx *ctx)
482 482
483 483 ctx->cus_n_max = cus_n_max_compute(ctx); ctx->cus_n_max = cus_n_max_compute(ctx);
484 484
485 ctx->pcie_lanes_n = bif_pcie_lanes_n_get(ctx->dev);
485 ctx->default_pcie_lanes_n = bif_pcie_lanes_n_get(ctx->dev);
486 486
487 487 r = bif_pcie_root_speeds_get(ctx->dev, &ctx->pcie_root_speeds_mask); r = bif_pcie_root_speeds_get(ctx->dev, &ctx->pcie_root_speeds_mask);
488 488 if (r == -SI_ERR) if (r == -SI_ERR)
File drivers/gpu/alga/amd/si/dyn_pm/ctx.h changed (mode: 100644) (index b5eb429..87a22ec)
... ... struct ctx {
77 77 u16 mem_ref_clk; u16 mem_ref_clk;
78 78
79 79 u8 pcie_root_speeds_mask; u8 pcie_root_speeds_mask;
80 u8 pcie_lanes_n;
80 u8 default_pcie_lanes_n;
81 81
82 82 u32 cus_n_max; u32 cus_n_max;
83 83
File drivers/gpu/alga/amd/si/dyn_pm/driver.c changed (mode: 100644) (index 26157f0..f9e585d)
... ... long driver_set_performance(struct ctx *ctx)
575 575 goto err; goto err;
576 576 } }
577 577
578 //TODO: forgot the restrict level smc messages
579 //TODO: may have to set the best pcie gen here
580
578 581 LOG("smc:switching off the thermal design power clamping"); LOG("smc:switching off the thermal design power clamping");
579 582 r = smc_msg(ctx->dev, SMC_TDP_CLAMPING_OFF); r = smc_msg(ctx->dev, SMC_TDP_CLAMPING_OFF);
580 583 if (r == -SI_ERR) { if (r == -SI_ERR) {
File drivers/gpu/alga/amd/si/dyn_pm/dyn_pm.c changed (mode: 100644) (index 76cd04a..673d0f4)
... ... long dyn_pm_ena(struct pci_dev *dev)
863 863 if (r == -SI_ERR) if (r == -SI_ERR)
864 864 goto err_free_ctx; goto err_free_ctx;
865 865
866 LOG("disabling clock gating");
867 cg_dis(dev);
868
869 866 pre_init(dev); pre_init(dev);
870 867
871 868 r = init(ctx); r = init(ctx);
 
... ... long dyn_pm_ena(struct pci_dev *dev)
884 881
885 882 ctx_free(ctx); ctx_free(ctx);
886 883
887 LOG("re-enabling clock gating");
888 cg_ena(dev);
889
890 884 LOG("switching off the universal video decoder (because mpeg)"); LOG("switching off the universal video decoder (because mpeg)");
891 885 r = smc_msg(ctx->dev, SMC_MSG_UVD_PWR_OFF); r = smc_msg(ctx->dev, SMC_MSG_UVD_PWR_OFF);
892 886 if (r == -SI_ERR) if (r == -SI_ERR)
File drivers/gpu/alga/amd/si/dyn_pm/ulv.c changed (mode: 100644) (index 3b28c39..ff96b5c)
... ... void smc_sw_regs_ulv_init(struct ctx *ctx)
84 84
85 85 smc_sw_wr32(ctx->dev, ULV_VOLT_CHANGE_DELAY_DEFAULT, smc_sw_wr32(ctx->dev, ULV_VOLT_CHANGE_DELAY_DEFAULT,
86 86 SMC_SW_ULV_VOLT_CHANGE_DELAY); SMC_SW_ULV_VOLT_CHANGE_DELAY);
87 smc_sw_wr32(ctx->dev, ctx->pcie_lanes_n,
87 /* actually the driver and probably the emergency state */
88 smc_sw_wr32(ctx->dev, ctx->default_pcie_lanes_n,
88 89 SMC_SW_NON_ULV_PCIE_LINK_WIDTH); SMC_SW_NON_ULV_PCIE_LINK_WIDTH);
89 90 } }
90 91
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