sylware / linux-gpu-amd-si (public) (License: GPLv2+) (since 2019-09-09) (hash sha1)
my old AMD Southern Islands GPU linux driver
Clone URLs: https://rocketgit.com/user/sylware/linux-gpu-amd-si ssh://rocketgit@ssh.rocketgit.com/user/sylware/linux-gpu-amd-si git://git.rocketgit.com/user/sylware/linux-gpu-amd-si
master
List of commits:
Subject Hash Author Date (UTC)
atombios:atb_eng_mem_pll_compute and more 633c0d754bc9d36902a3bf620cbb11282dc6a4a7 Sylvain BERTRAND 2013-11-13 12:48:15
atombios:atb_eng_mem_set added 792770998bdfbc1da15a3e4b8c585134134de5b2 Sylvain BERTRAND 2013-11-13 08:28:41
atombios data and dump 702d5ca1cb1d6d28ea33e5c550ece8a2f04976cc Sylvain BERTRAND 2013-11-13 07:56:18
tens of thousand of lines to refactor e6067d9bf38a4f6d71ecc8cfe3bb0c52f7a44834 Sylvain BERTRAND 2013-11-13 01:51:14
shame on me 8d3c8a1c1cb494c723603b7062a5b0cdaa4742be Sylvain BERTRAND 2013-11-04 00:37:42
writeX and readX already do the leX swapping 3b7d5a29f98160ed555309952a5e7f2a1f265684 Sylvain BERTRAND 2013-10-27 11:39:42
first part of dynamic clock/power management 732f467ca8db8ba676fdce6a5387b1fa9bc6964b Sylvain BERTRAND 2013-10-23 05:01:48
dce:upstream new addr conf reg f7d4efda311c439b3a084b935e563eab47216613 Sylvain BERTRAND 2013-10-21 02:33:41
atombios cleanup 74f7fae53d33509b2a160d8060f9906ca099772a Sylvain BERTRAND 2013-10-21 00:45:57
upstream: do not force the cp internal int state b9bdb0bd3ab4a2e2407720f077ff47dc7c0c6d32 Sylvain BERTRAND 2013-09-24 01:23:52
upstream: disable grph block 3c8dc463ba4bcf260eb8d5d5e5f6b8afc4871b46 Sylvain BERTRAND 2013-09-20 11:56:00
use new dma api helper 837cd3765e616f3446693ec685e45cf47d1967af Sylvain BERTRAND 2013-09-20 11:19:48
improved/simpler userland API d2249ed8838a4bb28b97d0f89f769170e10d85b2 Sylvain BERTRAND 2013-09-20 11:15:28
added dce sysfs display h/v sizes 5b22865b9dc7c15d8cf62b3e33b82b61a3938c14 Sylvain BERTRAND 2013-09-18 16:35:45
strange paths modification (kbuild trick?) c4a66ad58f11419cc530e10467beb9bc9fd97e23 Sylvain BERTRAND 2013-09-15 19:46:12
missed a userland shared header file 6f0e2e20070cfb7e64a227ad29a8b4957653d66c Sylvain BERTRAND 2013-09-14 15:50:37
cleanly support userspace hearders 34a4458bcd98dcde266ef09bac6db7ad7da795b5 Sylvain BERTRAND 2013-09-14 14:55:45
more robust patch logic 5f607dffcf1515b9a01ed8220428453412d3a6d0 Sylvain BERTRAND 2013-09-14 11:59:16
automate installation in a linux src tree e35d9c2014df5132c9001e325b3b477529f2ba99 Sylvain BERTRAND 2013-09-13 23:14:54
timeouts to userspace 22117a1689daf66e04d4d2259b698857899041ba Sylvain BERTRAND 2013-09-01 21:26:45
Commit 633c0d754bc9d36902a3bf620cbb11282dc6a4a7 - atombios:atb_eng_mem_pll_compute and more
Author: Sylvain BERTRAND
Author date (UTC): 2013-11-13 12:48
Committer name: Sylvain BERTRAND
Committer date (UTC): 2013-11-13 12:48
Parent(s): 792770998bdfbc1da15a3e4b8c585134134de5b2
Signer:
Signing key:
Signing status: N
Tree: 6eef790eab25357b9f0d1f297c6f82c6d6d48c3c
File Lines added Lines deleted
drivers/gpu/alga/amd/atombios/cm.c 66 84
drivers/gpu/alga/amd/atombios/tables/cmd.h 7 5
drivers/gpu/alga/amd/atombios/tables/eng_mem_pll_compute.h 31 0
drivers/gpu/alga/amd/si/drv.c 0 17
include/alga/amd/atombios/cm.h 22 1
include/alga/amd/atombios/pp.h 0 2
File drivers/gpu/alga/amd/atombios/cm.c changed (mode: 100644) (index 8a76eea..79c4b50)
21 21 #include "tables/firmware_info.h" #include "tables/firmware_info.h"
22 22 #include "tables/i2c.h" #include "tables/i2c.h"
23 23 #include "tables/pp.h" #include "tables/pp.h"
24 #include "tables/eng_mem_pll_compute.h"
24 25
25 26 #include "atb.h" #include "atb.h"
26 27
 
... ... unlock_mutex:
231 232 } }
232 233 EXPORT_SYMBOL_GPL(atb_core_ref_clk_get); EXPORT_SYMBOL_GPL(atb_core_ref_clk_get);
233 234
234 long atb_eng_clk_get(struct atombios *atb, u32 *clk)
235 long atb_eng_clk_set(struct atombios *atb, u32 clk)
235 236 { {
236 237 u16 of; u16 of;
237 238 struct master_cmd_tbl *cmd_tbl; struct master_cmd_tbl *cmd_tbl;
238 239 struct common_cmd_tbl_hdr *eng_clk_set; struct common_cmd_tbl_hdr *eng_clk_set;
239 struct mem_eng_clk_get_params *ps;
240 struct mem_eng_clk_set_params *ps;
240 241 long r; long r;
241 242
242 243 mutex_lock(&atb->mutex); mutex_lock(&atb->mutex);
 
... ... long atb_eng_clk_get(struct atombios *atb, u32 *clk)
246 247 of = get_unaligned_le16(&cmd_tbl->list.eng_clk_set); of = get_unaligned_le16(&cmd_tbl->list.eng_clk_set);
247 248
248 249 eng_clk_set = atb->adev.rom + of; eng_clk_set = atb->adev.rom + of;
249 dev_info(atb->adev.dev, "atombios:eng_clk_get (0x%04x) revision %u.%u\n",
250 dev_info(atb->adev.dev, "atombios:eng_clk_set (0x%04x) revision %u.%u\n",
250 251 of, eng_clk_set->hdr.tbl_fmt_rev, of, eng_clk_set->hdr.tbl_fmt_rev,
251 252 eng_clk_set->hdr.tbl_content_rev); eng_clk_set->hdr.tbl_content_rev);
252 253
 
... ... long atb_eng_clk_get(struct atombios *atb, u32 *clk)
257 258 r = -ATB_ERR; r = -ATB_ERR;
258 259 goto unlock_mutex; goto unlock_mutex;
259 260 } }
260 ps = (struct mem_eng_clk_get_params *)atb->g_ctx.ps_top;
261 ps = (struct mem_eng_clk_set_params *)atb->g_ctx.ps_top;
262 put_unaligned_le32(clk, &ps->clk);
261 263
262 264 atb->g_ctx.fb_wnd = 0; atb->g_ctx.fb_wnd = 0;
263 265 atb->g_ctx.regs_blk = 0; atb->g_ctx.regs_blk = 0;
264 266 atb->g_ctx.io_mode = IO_MM; atb->g_ctx.io_mode = IO_MM;
265 267
266 268 r = interpret(atb, of, 0, 0); r = interpret(atb, of, 0, 0);
267
268 ps = (struct mem_eng_clk_get_params *)atb->g_ctx.ps_top;
269 *clk = get_unaligned_le32(&ps->clk);
270 269 kfree(atb->g_ctx.ps_top); kfree(atb->g_ctx.ps_top);
271 270
272 271 unlock_mutex: unlock_mutex:
273 272 mutex_unlock(&atb->mutex); mutex_unlock(&atb->mutex);
274 273 return r; return r;
275 274 } }
276 EXPORT_SYMBOL_GPL(atb_eng_clk_get);
275 EXPORT_SYMBOL_GPL(atb_eng_clk_set);
277 276
278 long atb_mem_clk_get(struct atombios *atb, u32 *clk)
277 long atb_mem_clk_set(struct atombios *atb, u32 clk)
279 278 { {
280 279 u16 of; u16 of;
281 280 struct master_cmd_tbl *cmd_tbl; struct master_cmd_tbl *cmd_tbl;
282 281 struct common_cmd_tbl_hdr *mem_clk_set; struct common_cmd_tbl_hdr *mem_clk_set;
283 struct mem_eng_clk_get_params *ps;
282 struct mem_eng_clk_set_params *ps;
284 283 long r; long r;
285 284
286 285 mutex_lock(&atb->mutex); mutex_lock(&atb->mutex);
 
... ... long atb_mem_clk_get(struct atombios *atb, u32 *clk)
290 289 of = get_unaligned_le16(&cmd_tbl->list.mem_clk_set); of = get_unaligned_le16(&cmd_tbl->list.mem_clk_set);
291 290
292 291 mem_clk_set = atb->adev.rom + of; mem_clk_set = atb->adev.rom + of;
293 dev_info(atb->adev.dev, "atombios:mem_clk_get (0x%04x) revision %u.%u\n",
292 dev_info(atb->adev.dev, "atombios:mem_clk_set (0x%04x) revision %u.%u\n",
294 293 of, mem_clk_set->hdr.tbl_fmt_rev, of, mem_clk_set->hdr.tbl_fmt_rev,
295 294 mem_clk_set->hdr.tbl_content_rev); mem_clk_set->hdr.tbl_content_rev);
296 295
 
... ... long atb_mem_clk_get(struct atombios *atb, u32 *clk)
301 300 r = -ATB_ERR; r = -ATB_ERR;
302 301 goto unlock_mutex; goto unlock_mutex;
303 302 } }
304 ps = (struct mem_eng_clk_get_params *)atb->g_ctx.ps_top;
303 ps = (struct mem_eng_clk_set_params *)atb->g_ctx.ps_top;
304 put_unaligned_le32(clk, &ps->clk);
305 305
306 306 atb->g_ctx.fb_wnd = 0; atb->g_ctx.fb_wnd = 0;
307 307 atb->g_ctx.regs_blk = 0; atb->g_ctx.regs_blk = 0;
308 308 atb->g_ctx.io_mode = IO_MM; atb->g_ctx.io_mode = IO_MM;
309 309
310 310 r = interpret(atb, of, 0, 0); r = interpret(atb, of, 0, 0);
311
312 ps = (struct mem_eng_clk_get_params *)atb->g_ctx.ps_top;
313 *clk = get_unaligned_le32(&ps->clk);
314 311 kfree(atb->g_ctx.ps_top); kfree(atb->g_ctx.ps_top);
315 312
316 313 unlock_mutex: unlock_mutex:
317 314 mutex_unlock(&atb->mutex); mutex_unlock(&atb->mutex);
318 315 return r; return r;
319 316 } }
320 EXPORT_SYMBOL_GPL(atb_mem_clk_get);
317 EXPORT_SYMBOL_GPL(atb_mem_clk_set);
321 318
322 long atb_eng_clk_set(struct atombios *atb, u32 clk)
319 static inline u32 set(u32 mask, u32 v)
323 320 { {
324 u16 of;
325 struct master_cmd_tbl *cmd_tbl;
326 struct common_cmd_tbl_hdr *eng_clk_set;
327 struct mem_eng_clk_set_params *ps;
328 long r;
329
330 mutex_lock(&atb->mutex);
331
332 of = get_unaligned_le16(&atb->hdr->master_cmd_tbl_of);
333 cmd_tbl = atb->adev.rom + of;
334 of = get_unaligned_le16(&cmd_tbl->list.eng_clk_set);
335
336 eng_clk_set = atb->adev.rom + of;
337 dev_info(atb->adev.dev, "atombios:eng_clk_set (0x%04x) revision %u.%u\n",
338 of, eng_clk_set->hdr.tbl_fmt_rev,
339 eng_clk_set->hdr.tbl_content_rev);
340
341 atb->g_ctx.ps_dws = 0x80;/* max for ps index */
342 atb->g_ctx.ps_top = kzalloc(atb->g_ctx.ps_dws * 4, GFP_KERNEL);
343 if (!atb->g_ctx.ps_top) {
344 dev_err(atb->adev.dev, "atombios:unable to allocate parameter space (stack)\n");
345 r = -ATB_ERR;
346 goto unlock_mutex;
347 }
348 ps = (struct mem_eng_clk_set_params *)atb->g_ctx.ps_top;
349 put_unaligned_le32(clk, &ps->clk);
350
351 atb->g_ctx.fb_wnd = 0;
352 atb->g_ctx.regs_blk = 0;
353 atb->g_ctx.io_mode = IO_MM;
354
355 r = interpret(atb, of, 0, 0);
356 kfree(atb->g_ctx.ps_top);
321 u8 shift;
357 322
358 unlock_mutex:
359 mutex_unlock(&atb->mutex);
360 return r;
323 shift = ffs(mask) - 1;
324 return (v << shift) & mask;
361 325 } }
362 EXPORT_SYMBOL_GPL(atb_eng_clk_set);
363 326
364 long atb_mem_clk_set(struct atombios *atb, u32 clk)
327 long atb_eng_mem_timings_program(struct atombios *atb, u32 eng_clk,
328 u32 mem_clk)
365 329 { {
366 330 u16 of; u16 of;
367 331 struct master_cmd_tbl *cmd_tbl; struct master_cmd_tbl *cmd_tbl;
368 struct common_cmd_tbl_hdr *mem_clk_set;
332 struct common_cmd_tbl_hdr *dyn_mem_settings;
369 333 struct mem_eng_clk_set_params *ps; struct mem_eng_clk_set_params *ps;
370 334 long r; long r;
371 335
 
... ... long atb_mem_clk_set(struct atombios *atb, u32 clk)
373 337
374 338 of = get_unaligned_le16(&atb->hdr->master_cmd_tbl_of); of = get_unaligned_le16(&atb->hdr->master_cmd_tbl_of);
375 339 cmd_tbl = atb->adev.rom + of; cmd_tbl = atb->adev.rom + of;
376 of = get_unaligned_le16(&cmd_tbl->list.mem_clk_set);
340 of = get_unaligned_le16(&cmd_tbl->list.dyn_mem_settings);
377 341
378 mem_clk_set = atb->adev.rom + of;
379 dev_info(atb->adev.dev, "atombios:mem_clk_set (0x%04x) revision %u.%u\n",
380 of, mem_clk_set->hdr.tbl_fmt_rev,
381 mem_clk_set->hdr.tbl_content_rev);
342 dyn_mem_settings = atb->adev.rom + of;
343 dev_info(atb->adev.dev, "atombios:dyn_mem_settings (0x%04x) revision %u.%u\n",
344 of,dyn_mem_settings->hdr.tbl_fmt_rev,
345 dyn_mem_settings->hdr.tbl_content_rev);
346 /* FIXME: lock a revision */
382 347
383 348 atb->g_ctx.ps_dws = 0x80;/* max for ps index */ atb->g_ctx.ps_dws = 0x80;/* max for ps index */
384 349 atb->g_ctx.ps_top = kzalloc(atb->g_ctx.ps_dws * 4, GFP_KERNEL); atb->g_ctx.ps_top = kzalloc(atb->g_ctx.ps_dws * 4, GFP_KERNEL);
 
... ... long atb_mem_clk_set(struct atombios *atb, u32 clk)
388 353 goto unlock_mutex; goto unlock_mutex;
389 354 } }
390 355 ps = (struct mem_eng_clk_set_params *)atb->g_ctx.ps_top; ps = (struct mem_eng_clk_set_params *)atb->g_ctx.ps_top;
391 put_unaligned_le32(clk, &ps->clk);
356 eng_clk |= set(MEM_ENG_COMPUTE_OP, COMPUTE_ENGINE_PLL);
357 put_unaligned_le32(eng_clk, &ps->clk);
358 put_unaligned_le32(mem_clk, &ps->mem_eng_pll_compute_params.mem_clk);
392 359
393 360 atb->g_ctx.fb_wnd = 0; atb->g_ctx.fb_wnd = 0;
394 361 atb->g_ctx.regs_blk = 0; atb->g_ctx.regs_blk = 0;
 
... ... unlock_mutex:
401 368 mutex_unlock(&atb->mutex); mutex_unlock(&atb->mutex);
402 369 return r; return r;
403 370 } }
404 EXPORT_SYMBOL_GPL(atb_mem_clk_set);
405
406 static inline u32 set(u32 mask, u32 v)
407 {
408 u8 shift;
409
410 shift = ffs(mask) - 1;
411 return (v << shift) & mask;
412 }
371 EXPORT_SYMBOL_GPL(atb_eng_mem_timings_program);
413 372
414 long atb_eng_mem_set(struct atombios *atb, u32 eng_clk, u32 mem_clk)
373 long atb_eng_mem_pll_compute(struct atombios *atb, u32 eng_clk,
374 struct atb_clk_div *atb_clk_div)
415 375 { {
416 376 u16 of; u16 of;
417 377 struct master_cmd_tbl *cmd_tbl; struct master_cmd_tbl *cmd_tbl;
418 struct common_cmd_tbl_hdr *eng_clk_set;
419 struct mem_eng_clk_set_params *ps;
378 struct common_cmd_tbl_hdr *eng_mem_pll_compute;
379 struct eng_mem_pll_compute_params *ps;
420 380 long r; long r;
421 381
422 382 mutex_lock(&atb->mutex); mutex_lock(&atb->mutex);
423 383
424 384 of = get_unaligned_le16(&atb->hdr->master_cmd_tbl_of); of = get_unaligned_le16(&atb->hdr->master_cmd_tbl_of);
425 385 cmd_tbl = atb->adev.rom + of; cmd_tbl = atb->adev.rom + of;
426 of = get_unaligned_le16(&cmd_tbl->list.dyn_mem_settings);
427
428 eng_clk_set = atb->adev.rom + of;
429 dev_info(atb->adev.dev, "atombios:eng_clk_set (0x%04x) revision %u.%u\n",
430 of, eng_clk_set->hdr.tbl_fmt_rev,
431 eng_clk_set->hdr.tbl_content_rev);
386 of = get_unaligned_le16(&cmd_tbl->list.eng_mem_pll_compute);
387
388 eng_mem_pll_compute = atb->adev.rom + of;
389 dev_info(atb->adev.dev, "atombios:eng_mem_pll_compute(0x%04x) revision %u.%u\n",
390 of,eng_mem_pll_compute->hdr.tbl_fmt_rev,
391 eng_mem_pll_compute->hdr.tbl_content_rev);
392 //FIXME: lock the info->hdr.tbl_fmt_rev
393 if (eng_mem_pll_compute->hdr.tbl_content_rev != 5) {
394 dev_err(atb->adev.dev, "atombios:eng_mem_pll_compute revision not supported");
395 r = -ATB_ERR;
396 goto unlock_mutex;
397 }
432 398
433 399 atb->g_ctx.ps_dws = 0x80;/* max for ps index */ atb->g_ctx.ps_dws = 0x80;/* max for ps index */
434 400 atb->g_ctx.ps_top = kzalloc(atb->g_ctx.ps_dws * 4, GFP_KERNEL); atb->g_ctx.ps_top = kzalloc(atb->g_ctx.ps_dws * 4, GFP_KERNEL);
 
... ... long atb_eng_mem_set(struct atombios *atb, u32 eng_clk, u32 mem_clk)
437 403 r = -ATB_ERR; r = -ATB_ERR;
438 404 goto unlock_mutex; goto unlock_mutex;
439 405 } }
440 ps = (struct mem_eng_clk_set_params *)atb->g_ctx.ps_top;
406 ps = (struct eng_mem_pll_compute_params*)atb->g_ctx.ps_top;
441 407 eng_clk |= set(MEM_ENG_COMPUTE_OP, COMPUTE_ENGINE_PLL); eng_clk |= set(MEM_ENG_COMPUTE_OP, COMPUTE_ENGINE_PLL);
442 put_unaligned_le32(eng_clk, &ps->clk);
443 put_unaligned_le32(mem_clk, &ps->mem_eng_pll_compute_params.mem_clk);
408 put_unaligned_le32(eng_clk, &ps->u.clk);
444 409
445 410 atb->g_ctx.fb_wnd = 0; atb->g_ctx.fb_wnd = 0;
446 411 atb->g_ctx.regs_blk = 0; atb->g_ctx.regs_blk = 0;
447 412 atb->g_ctx.io_mode = IO_MM; atb->g_ctx.io_mode = IO_MM;
448 413
449 414 r = interpret(atb, of, 0, 0); r = interpret(atb, of, 0, 0);
415
416 if (r == 0) {
417 memset(atb_clk_div, 0, sizeof(*atb_clk_div));
418
419 atb_clk_div->post_div = ps->post_div;
420 if (ps->flgs & PLL_POST_DIV_ENA)
421 atb_clk_div->flgs |= ATB_CLK_DIV_POST_DIV_ENA;
422 if (!(ps->flgs & FRAC_DIS))
423 atb_clk_div->flgs |= ATB_CLK_DIV_DITHEN_ENA;
424 atb_clk_div->whole = get_unaligned_le16(
425 &ps->u.fb_div.whole);
426 atb_clk_div->frac = get_unaligned_le16(
427 &ps->u.fb_div.frac);
428 atb_clk_div->ref_div = ps->ref_div;
429 if (ps->flgs & MEM_PLL_VCO_MODE)
430 atb_clk_div->flgs |= ATB_CLK_DIV_VCO_MODE;
431 }
450 432 kfree(atb->g_ctx.ps_top); kfree(atb->g_ctx.ps_top);
451 433
452 434 unlock_mutex: unlock_mutex:
453 435 mutex_unlock(&atb->mutex); mutex_unlock(&atb->mutex);
454 436 return r; return r;
455 437 } }
456 EXPORT_SYMBOL_GPL(atb_eng_mem_set);
438 EXPORT_SYMBOL_GPL(atb_eng_mem_pll_compute);
File drivers/gpu/alga/amd/atombios/tables/cmd.h changed (mode: 100644) (index ad319fa..f58a381)
... ... struct cmd_tbls_list
31 31 __le16 mem_clk_get; __le16 mem_clk_get;
32 32 __le16 eng_clk_get; __le16 eng_clk_get;
33 33 __le16 crtc_timing; __le16 crtc_timing;
34 u16 unused7[13];
34 u16 unused7[10];
35 __le16 eng_mem_pll_compute;
36 u16 unused8[2];
35 37 __le16 dyn_mem_settings; __le16 dyn_mem_settings;
36 u16 unused8[3];
38 u16 unused9[3];
37 39 __le16 voltage; __le16 voltage;
38 u16 unused9[8];
40 u16 unused10[8];
39 41 __le16 trans_ctl; __le16 trans_ctl;
40 u16 unused10;
42 u16 unused11;
41 43 __le16 dp_aux; __le16 dp_aux;
42 u16 unused11[2];
44 u16 unused12[2];
43 45 } __packed; } __packed;
44 46
45 47 struct master_cmd_tbl struct master_cmd_tbl
File drivers/gpu/alga/amd/atombios/tables/eng_mem_pll_compute.h added (mode: 100644) (index 0000000..3d96394)
1 #ifndef TABLES_ENG_MEM_PLL_COMPUTE_H
2 #define TABLES_ENG_MEM_PLL_COMPUTE_H
3 /*
4 * Copyright 2011 Sylvain Bertrand (digital.ragnarok@gmail.com)
5 * This fork is protected by the GNU affero GPLv3 with additionnal rights
6 * Original code from Advanced Micro Devices, Inc.
7 */
8
9 struct fb_div {
10 __le16 frac;
11 __le16 whole;
12 } __packed;
13
14 /* upstream v3 */
15 struct eng_mem_pll_compute_params {
16 union {
17 __le32 clk; /* input */
18 struct fb_div fb_div; /* output */
19 } u;
20 u8 ref_div; /* output */
21 u8 post_div; /* output */
22 u8 flgs; /* output */
23 u8 rsvd;
24 } __packed;
25
26 /* eng_mem_pll_compute_params.flgs */
27 #define PLL_POST_DIV_ENA BIT(0)
28 #define MEM_PLL_VCO_MODE BIT(1)
29 #define FRAC_DIS BIT(2)
30 #define ENG_PLL_ISPARE_9 BIT(3)
31 #endif
File drivers/gpu/alga/amd/si/drv.c changed (mode: 100644) (index 691bfc4..faaaca4)
... ... static int probe(struct pci_dev *dev, const struct pci_device_id *id)
460 460 { {
461 461 int r; int r;
462 462 struct dev_drv_data *dd; struct dev_drv_data *dd;
463 //TEST
464 463 struct atb_pp_defaults atb_pp_defaults; struct atb_pp_defaults atb_pp_defaults;
465 u32 clk;
466 464
467 465 r = pci_enable_device(dev); r = pci_enable_device(dev);
468 466 if (r) { if (r) {
 
... ... static int probe(struct pci_dev *dev, const struct pci_device_id *id)
566 564 dd->pp.default_vddci = atb_pp_defaults.vddci_mv; dd->pp.default_vddci = atb_pp_defaults.vddci_mv;
567 565 dd->pp.default_mvddc = atb_pp_defaults.mvddc_mv; dd->pp.default_mvddc = atb_pp_defaults.mvddc_mv;
568 566
569 //TEST
570 r = atb_mem_clk_get(dd->atb, &clk);
571 if (r == -ATB_ERR) {
572 dev_err(&dev->dev, "atombios failed to get current memory clock\n");
573 goto err_dce_free;
574 }
575 dev_info(&dev->dev, "current memory clock is %ukHz\n", clk * 10);
576
577 r = atb_eng_clk_get(dd->atb, &clk);
578 if (r == -ATB_ERR) {
579 dev_err(&dev->dev, "atombios failed to get current engine clock\n");
580 goto err_dce_free;
581 }
582 dev_info(&dev->dev, "current engine clock is %ukHz\n", clk * 10);
583
584 567 r = request_threaded_irq(dev->irq, irq, irq_thd, 0, pci_name(dev), r = request_threaded_irq(dev->irq, irq, irq_thd, 0, pci_name(dev),
585 568 (void*)dev); (void*)dev);
586 569 if (r) { if (r) {
File include/alga/amd/atombios/cm.h changed (mode: 100644) (index 87eee37..9005039)
5 5 Protected by GNU Affero GPL v3 with some exceptions. Protected by GNU Affero GPL v3 with some exceptions.
6 6 See README at root of alga tree. See README at root of alga tree.
7 7 */ */
8 /*----------------------------------------------------------------------------*/
8 9 #define ATB_DONT_HAVE_MEM_CLK_SS 0 #define ATB_DONT_HAVE_MEM_CLK_SS 0
9 10 #define ATB_HAVE_MEM_CLK_SS 1 #define ATB_HAVE_MEM_CLK_SS 1
10 11 long atb_have_mem_clk_ss(struct atombios *atb); long atb_have_mem_clk_ss(struct atombios *atb);
12 /*----------------------------------------------------------------------------*/
11 13
14 /*----------------------------------------------------------------------------*/
12 15 #define ATB_DONT_HAVE_ENG_CLK_SS 0 #define ATB_DONT_HAVE_ENG_CLK_SS 0
13 16 #define ATB_HAVE_ENG_CLK_SS 1 #define ATB_HAVE_ENG_CLK_SS 1
14 17 long atb_have_eng_clk_ss(struct atombios *atb); long atb_have_eng_clk_ss(struct atombios *atb);
18 /*----------------------------------------------------------------------------*/
15 19
16 20 long atb_core_ref_clk_get(struct atombios *atb, u16 *core_ref_clk); long atb_core_ref_clk_get(struct atombios *atb, u16 *core_ref_clk);
17 21
18 long atb_eng_mem_set(struct atombios *atb, u32 eng_clk, u32 mem_clk);
22 long atb_eng_mem_timings_program(struct atombios *atb, u32 eng_clk,
23 u32 mem_clk);
24
25
26 /*----------------------------------------------------------------------------*/
27 #define ATB_CLK_DIV_POST_DIV_ENA BIT(0)
28 #define ATB_CLK_DIV_DITHEN_ENA BIT(1)
29 #define ATB_CLK_DIV_VCO_MODE BIT(2)
30 struct atb_clk_div {
31 u16 whole;
32 u16 frac;
33 u8 flgs;
34 u8 ref_div;
35 u8 post_div;
36 };
37 long atb_eng_mem_pll_compute(struct atombios *atb, u32 eng_clk,
38 struct atb_clk_div *atb_clk_div);
39 /*----------------------------------------------------------------------------*/
19 40 #endif #endif
File include/alga/amd/atombios/pp.h changed (mode: 100644) (index 1f04de3..391fe41)
... ... long atb_pp_performance_state_get(struct atombios *atb,
40 40 long atb_voltage_set(struct atombios *atb, u8 type, u16 lvl); long atb_voltage_set(struct atombios *atb, u8 type, u16 lvl);
41 41 long atb_voltage_get(struct atombios *atb, u8 type, u16 leakage_idx, u16 *lvl); long atb_voltage_get(struct atombios *atb, u8 type, u16 leakage_idx, u16 *lvl);
42 42 long atb_eng_clk_set(struct atombios *atb, u32 clk); long atb_eng_clk_set(struct atombios *atb, u32 clk);
43 long atb_eng_clk_get(struct atombios *atb, u32* clk);
44 43 long atb_mem_clk_set(struct atombios *atb, u32 clk); long atb_mem_clk_set(struct atombios *atb, u32 clk);
45 long atb_mem_clk_get(struct atombios *atb, u32* clk);
46 44
47 45 #define ATB_DONT_HAVE_THERMAL_PROTECTION 0 #define ATB_DONT_HAVE_THERMAL_PROTECTION 0
48 46 #define ATB_HAVE_THERMAL_PROTECTION 1 #define ATB_HAVE_THERMAL_PROTECTION 1
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