sylware / linux-gpu-amd-si (public) (License: GPLv2+) (since 2019-09-09) (hash sha1)
my old AMD Southern Islands GPU linux driver
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master
List of commits:
Subject Hash Author Date (UTC)
finish smc switch to driver power state 6f99d0a01491dd671174919d842a771ac4a81a4b Sylvain BERTRAND 2014-02-17 09:47:02
pcie things and follow upstream for dyn pm init f4fb120597276a3badc08eec30783b10d111f756 Sylvain BERTRAND 2014-02-17 09:00:00
dump performance state tbls 06a22756b504ecf4523c86f657104e0b970195de Sylvain BERTRAND 2014-02-14 17:02:23
smc_mc_arb_tbl init for the driver state 5d1868e75b11164dbb97caaddbc7992b252ab973 Sylvain BERTRAND 2014-02-14 13:01:26
smc_mc_reg tbl init for the driver state e8aa12b1c87571031098c4427822733a74133afc Sylvain BERTRAND 2014-02-14 11:32:04
installation of the perf pwr state continued 535c853e7d0a0ab04fbff3b0d5613ef9a34d525c Sylvain BERTRAND 2014-02-13 19:16:33
installation of the perf pwr state continued b229eef2798acbe053aa09e47c213e23749638dd Sylvain BERTRAND 2014-02-13 10:48:02
dyn pm second part continuation 95dd7b4754476a014d8f84854e5b2ce5c81d23b4 Sylvain BERTRAND 2014-02-12 20:15:03
beginning of dyn pm second part c32c19d884dbf1f440480bbea42140e9c5ed8cd3 Sylvain BERTRAND 2014-02-12 14:44:04
uvd does only mpeg, then switch off 7e36b98bcab47e9986a63093dbeed98ab290f85f Sylvain BERTRAND 2014-02-12 10:55:54
bug fixing, end of dyn pm first part 533a4bd6731205f71704886e5fa099063be985ea Sylvain BERTRAND 2014-02-11 13:49:27
bug fixing c3fc0d7b807c98d20c13f53dcfc09713309ad2fa Sylvain BERTRAND 2014-02-11 11:16:00
static bios tbls *must* be ok e050fa94c2f1e846bb051748347332e234a6b93a Sylvain BERTRAND 2014-02-10 10:17:33
bug fixing 7baa7069aa89a98d831d7def358766155771e9ca Sylvain BERTRAND 2014-02-07 15:08:53
bug fixing d4a1ef00d163bc42e277c83d0a763fa11476af56 Sylvain BERTRAND 2014-02-06 20:14:33
tbls fixes 4795a3090a17bc486056301bc6bef509b9c5e339 Sylvain BERTRAND 2014-02-05 15:09:41
log more accurately the smc tbls 3d88d2a589a89e9a34f4046242f4a72a76069ddb Sylvain BERTRAND 2014-02-05 10:51:39
log more 5018f3c130cb9ce53e1834fcc586f00614a3ed86 Sylvain BERTRAND 2014-02-04 21:46:05
smc sw regs dump code 46acefa1d42984757cb1ba48a32130f2f9674687 Sylvain BERTRAND 2014-02-04 20:44:26
do dump the tbls c79209766b71e2d3231cf25673684762bf46dd8c Sylvain BERTRAND 2014-02-04 20:20:33
Commit 6f99d0a01491dd671174919d842a771ac4a81a4b - finish smc switch to driver power state
Author: Sylvain BERTRAND
Author date (UTC): 2014-02-17 09:47
Committer name: Sylvain BERTRAND
Committer date (UTC): 2014-02-17 09:47
Parent(s): f4fb120597276a3badc08eec30783b10d111f756
Signing key:
Tree: 0583f4a0b6c3743002925182b34135ac7978852b
File Lines added Lines deleted
drivers/gpu/alga/amd/si/dyn_pm/driver.c 87 14
drivers/gpu/alga/amd/si/smc.c 6 0
drivers/gpu/alga/amd/si/smc.h 5 0
drivers/gpu/alga/amd/si/smc_regs.h 2 0
File drivers/gpu/alga/amd/si/dyn_pm/driver.c changed (mode: 100644) (index f9e585d..79b1077)
... ... long driver_set_performance(struct ctx *ctx)
572 572 r = smc_msg(ctx->dev, SMC_MSG_ULV_DIS); r = smc_msg(ctx->dev, SMC_MSG_ULV_DIS);
573 573 if (r == -SI_ERR) { if (r == -SI_ERR) {
574 574 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to switch off the use of the ultra low voltage state\n"); dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to switch off the use of the ultra low voltage state\n");
575 goto err;
575 return -SI_ERR;
576 576 } }
577 577
578 //TODO: forgot the restrict level smc messages
579 //TODO: may have to set the best pcie gen here
578 LOG("smc:disable power levels switching");
579 r = smc_msg(ctx->dev, SMC_MSG_NO_FORCE_LVL);
580 if (r == -SI_ERR) {
581 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to disable power level switching\n");
582 return -SI_ERR;
583 }
584
585 LOG("smc:restrict to one powel level");
586 r = smc_msg_param(ctx->dev, SMC_MSG_ENA_LVLS_N_SET, 1);
587 if (r == -SI_ERR) {
588 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to restrict to one power level\n");
589 return -SI_ERR;
590 }
591
592 /* TODO: may have to set the best pcie gen of the power state here */
580 593
581 594 LOG("smc:switching off the thermal design power clamping"); LOG("smc:switching off the thermal design power clamping");
582 595 r = smc_msg(ctx->dev, SMC_TDP_CLAMPING_OFF); r = smc_msg(ctx->dev, SMC_TDP_CLAMPING_OFF);
583 596 if (r == -SI_ERR) { if (r == -SI_ERR) {
584 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to the thermal design power clamping\n");
585 goto err;
597 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to switch off the thermal design power clamping\n");
598 return -SI_ERR;
586 599 } }
587 600
588 601 LOG("smc:switching off the digital temperature estimation"); LOG("smc:switching off the digital temperature estimation");
589 602 r = smc_msg(ctx->dev, SMC_MSG_DTE_DIS); r = smc_msg(ctx->dev, SMC_MSG_DTE_DIS);
590 603 if (r == -SI_ERR) { if (r == -SI_ERR) {
591 604 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to switch off the digital temperature estimation\n"); dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to switch off the digital temperature estimation\n");
592 goto err;
605 return -SI_ERR;
593 606 } }
594 607
595 608 LOG("smc:switching off calculation accumulator"); LOG("smc:switching off calculation accumulator");
596 609 r = smc_msg(ctx->dev, SMC_MSG_CAC_DIS); r = smc_msg(ctx->dev, SMC_MSG_CAC_DIS);
597 610 if (r == -SI_ERR) { if (r == -SI_ERR) {
598 611 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to switch off the calculation accumulator\n"); dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to switch off the calculation accumulator\n");
599 goto err;
612 return -SI_ERR;
600 613 } }
601 614
602 615 LOG("smc:switching off the long term average calculation accumulator"); LOG("smc:switching off the long term average calculation accumulator");
603 616 r = smc_msg(ctx->dev, SMC_MSG_CAC_LONG_TERM_AVG_DIS); r = smc_msg(ctx->dev, SMC_MSG_CAC_LONG_TERM_AVG_DIS);
604 617 if (r == -SI_ERR) { if (r == -SI_ERR) {
605 618 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to switch off the long term average calculation accumulator\n"); dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to switch off the long term average calculation accumulator\n");
606 goto err;
619 return -SI_ERR;
607 620 } }
608 621
609 622 LOG("smc:halt"); LOG("smc:halt");
610 623 r = smc_msg(ctx->dev, SMC_MSG_HALT); r = smc_msg(ctx->dev, SMC_MSG_HALT);
611 624 if (r == -SI_ERR) { if (r == -SI_ERR) {
612 625 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:failed to halt\n"); dev_err(&ctx->dev->dev, "dyn_pm:init:smc:failed to halt\n");
613 goto err;
626 return -SI_ERR;
614 627 } }
615 628
616 629 LOG("smc:waiting to halt"); LOG("smc:waiting to halt");
617 630 smc_halt_wait(ctx->dev); smc_halt_wait(ctx->dev);
618 631
632 /*--------------------------------------------------------------------*/
633
619 634 r = smc_tbls_init(ctx); r = smc_tbls_init(ctx);
620 635 if (r == -SI_ERR) if (r == -SI_ERR)
621 goto err;
636 return -SI_ERR;
622 637
623 638 smc_sw_regs_init(ctx); smc_sw_regs_init(ctx);
624 639
625 //TODO
640 /*--------------------------------------------------------------------*/
626 641
627 return 0;
642 LOG("smc:flushing data cache");
643 r = smc_msg(ctx->dev, SMC_MSG_DATA_CACHE_FLUSH);
644 if (r == -SI_ERR) {
645 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to flush the data cache\n");
646 return -SI_ERR;
647 }
628 648
629 err:
630 return -SI_ERR;
649 LOG("smc:resume");
650 r = smc_msg(ctx->dev, SMC_MSG_RESUME);
651 if (r == -SI_ERR) {
652 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to resume operations\n");
653 return -SI_ERR;
654 }
655
656 LOG("smc:switch to driver(sw) power state");
657 r = smc_msg(ctx->dev, SMC_MSG_SW_STATE_SWITCH);
658 if (r == -SI_ERR) {
659 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to switch to driver(sw) power state\n");
660 return -SI_ERR;
661 }
662
663 if (ctx->atb_ulv.lvls_n) {
664 /*
665 * the mem clk of the lowest driver state lvl should be the same
666 * than the ulv one
667 */
668 LOG("smc:enable ultra low voltage state");
669 r = smc_msg(ctx->dev, SMC_MSG_ULV_ENA);
670 if (r == -SI_ERR) {
671 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:failed to enable the ultra low voltage state\n");
672 return -SI_ERR;
673 }
674 }
675
676 LOG("smc:switching on the long term average calculation accumulator");
677 r = smc_msg(ctx->dev, SMC_MSG_CAC_LONG_TERM_AVG_ENA);
678 if (r == -SI_ERR) {
679 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to switch on the long term average calculation accumulator\n");
680 return -SI_ERR;
681 }
682
683 LOG("smc:switching on calculation accumulator");
684 r = smc_msg(ctx->dev, SMC_MSG_CAC_ENA);
685 if (r == -SI_ERR) {
686 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to switch on the calculation accumulator\n");
687 return -SI_ERR;
688 }
689
690 LOG("smc:switching on the digital temperature estimation");
691 r = smc_msg(ctx->dev, SMC_MSG_DTE_ENA);
692 if (r == -SI_ERR) {
693 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to switch on the digital temperature estimation\n");
694 return -SI_ERR;
695 }
696
697 LOG("smc:switching on the thermal design power clamping");
698 r = smc_msg(ctx->dev, SMC_TDP_CLAMPING_ON);
699 if (r == -SI_ERR) {
700 dev_err(&ctx->dev->dev, "dyn_pm:init:smc:unable to switch on the thermal design power clamping\n");
701 return -SI_ERR;
702 }
703 return 0;
631 704 } }
File drivers/gpu/alga/amd/si/smc.c changed (mode: 100644) (index 3b59bca..9a29609)
... ... long smc_msg(struct pci_dev *dev, u16 msg)
354 354 return 0; return 0;
355 355 return -SI_ERR; return -SI_ERR;
356 356 } }
357
358 long smc_msg_param(struct pci_dev *dev, u16 msg, u32 param)
359 {
360 wr32(dev, param, SMC_SCRATCH_0);
361 return smc_msg(dev, msg);
362 }
File drivers/gpu/alga/amd/si/smc.h changed (mode: 100644) (index e1022bb..3289752)
... ... void smc_halt_wait(struct pci_dev *dev);
26 26
27 27 #define SMC_MSG_HALT 0x0010 #define SMC_MSG_HALT 0x0010
28 28 #define SMC_MSG_RESUME 0x0011 #define SMC_MSG_RESUME 0x0011
29 #define SMC_MSG_SW_STATE_SWITCH 0x0020
30 #define SMC_MSG_NO_FORCE_LVL 0x0041
29 31 #define SMC_MSG_CAC_ENA 0x0053 #define SMC_MSG_CAC_ENA 0x0053
30 32 #define SMC_MSG_CAC_DIS 0x0054 #define SMC_MSG_CAC_DIS 0x0054
31 33 #define SMC_TDP_CLAMPING_ON 0x0059 #define SMC_TDP_CLAMPING_ON 0x0059
 
... ... void smc_halt_wait(struct pci_dev *dev);
39 41 #define SMC_MSG_ULV_EXIT 0x0065 #define SMC_MSG_ULV_EXIT 0x0065
40 42 #define SMC_MSG_CAC_LONG_TERM_AVG_ENA 0x006e #define SMC_MSG_CAC_LONG_TERM_AVG_ENA 0x006e
41 43 #define SMC_MSG_CAC_LONG_TERM_AVG_DIS 0x006f #define SMC_MSG_CAC_LONG_TERM_AVG_DIS 0x006f
44 #define SMC_MSG_DATA_CACHE_FLUSH 0x0080
45 #define SMC_MSG_ENA_LVLS_N_SET 0x0082
42 46 #define SMC_MSG_DTE_ENA 0x0087 #define SMC_MSG_DTE_ENA 0x0087
43 47 #define SMC_MSG_DTE_DIS 0x0088 #define SMC_MSG_DTE_DIS 0x0088
44 48 long smc_msg(struct pci_dev *dev, u16 msg); long smc_msg(struct pci_dev *dev, u16 msg);
49 long smc_msg_param(struct pci_dev *dev, u16 msg, u32 param);
45 50 #endif #endif
File drivers/gpu/alga/amd/si/smc_regs.h changed (mode: 100644) (index 1afd8cb..aadc133)
16 16 #define SMS_MSG 0x0000ffff #define SMS_MSG 0x0000ffff
17 17 #define SMC_MSG_RESP 0x230 #define SMC_MSG_RESP 0x230
18 18 #define SMR_RESP 0x0000ffff #define SMR_RESP 0x0000ffff
19
20 #define SMC_SCRATCH_0 0x884
19 21 /* end of the xRBM register area----------------------------------------------*/ /* end of the xRBM register area----------------------------------------------*/
20 22
21 23
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