libreboot / lbwww (public) (License: Unspecified) (since 2023-04-11) (hash sha1)
libreboot website (markdown files). https://libreboot.org/
List of commits:
Subject Hash Author Date (UTC)
say motherboard, not mainboard a6d2f10fb92b907cd3168d4dd0589b8b2c4ebe4f Leah Rowe 2025-01-19 18:20:24
change the description again d57edfcc87a0576358d5e2f62f76d5973316d2c6 Leah Rowe 2025-01-19 18:17:43
update meta description 8d6c16a4b181cb4c332247efc461167160d344ba Leah Rowe 2025-01-19 18:11:36
make h2/3/4 text bigger a1b60ec64f09449c875dad08fad177d73eeec906 Leah Rowe 2025-01-19 18:09:25
general audit / cleanup 9a2da14a2e5859da8781e88dda72b556a5e92880 Leah Rowe 2025-01-19 18:02:33
show canon links on pages 1ba45bf5e5e23bf766b52c4a585761be2c388faa Leah Rowe 2025-01-19 01:21:00
robots sitemap file 759616ba96ee89c1a1be3c9290eaf57106b3c573 Leah Rowe 2025-01-19 00:54:06
template stuff b356cc30409b3bc4f6c76fe3200c0d694d31b176 Leah Rowe 2025-01-19 00:20:31
homepage: make "binary releases" a download link c5ad70955ddba71047bd0ce4d6b4d39d221ead4b Leah Rowe 2025-01-18 08:10:01
english homepage: shorten the payloads section 7f16d5cc66df5076bcf6313c57eeda2a30ebc2e3 Leah Rowe 2025-01-18 07:58:19
mention payloads on the homepage 97b6ffc5a0787807733cea95e868f0fc1054ccbe Leah Rowe 2025-01-18 07:00:01
snip3 e4b30750d15ab0e33c465b31d5e6175cf4b82b76 Leah Rowe 2025-01-18 04:55:26
grammar 77198f7f5dc5a972ef5181751db26d5c69773db7 Leah Rowe 2025-01-18 02:35:37
fix language 6f9ec4cc4d7eb4017af4768842ac6861b1e81aa5 Leah Rowe 2025-01-18 02:33:48
snip2 4c12433a6ab185d4092fab7400f09d3ef203b355 Leah Rowe 2025-01-18 02:12:20
snip 7c63e81b3212e22324bb300e30cba3f109a8ddcf Leah Rowe 2025-01-18 02:07:42
grammar 927a06cdc65281ceff6efdca058cf1cd4725e096 Leah Rowe 2025-01-17 13:24:59
snip 62b5b1950e8d862924b6c92fc2d8c1ae91c75f1c Leah Rowe 2025-01-17 10:41:44
further calamity 5662b578d8c97c024161bd9dd3d3f5c1fedb66f3 Leah Rowe 2025-01-17 10:15:39
clarification 0d6d90bf1eabd0d75c8b902fca8123af4f8c6617 Leah Rowe 2025-01-17 10:13:29
Commit a6d2f10fb92b907cd3168d4dd0589b8b2c4ebe4f - say motherboard, not mainboard
motherboard is what most people say

Signed-off-by: Leah Rowe <leah@libreboot.org>
Author: Leah Rowe
Author date (UTC): 2025-01-19 18:20
Committer name: Leah Rowe
Committer date (UTC): 2025-01-19 18:20
Parent(s): d57edfcc87a0576358d5e2f62f76d5973316d2c6
Signer:
Signing key:
Signing status: N
Tree: 88130aa948ce79932c4718b66ffec470479e9c63
File Lines added Lines deleted
site/contrib.md 1 1
site/docs/install/dell3050.md 1 1
site/docs/install/dell7010.md 1 1
site/docs/install/dell780.md 2 2
site/docs/install/hp8300usdt.md 1 1
site/docs/install/index.md 4 4
site/docs/install/ivy_has_common.md 1 1
site/docs/install/kcma-d8.md 2 2
site/docs/install/kgpe-d16.md 1 1
site/docs/install/nvmutil.md 1 1
site/docs/install/spi.md 22 22
site/docs/install/t480.md 2 2
site/docs/install/t60_unbrick.md 2 2
site/docs/install/x60_unbrick.md 2 2
site/docs/install/x60tablet_unbrick.md 2 2
site/docs/linux/grub_hardening.md 1 1
site/docs/maintain/index.md 7 7
site/docs/maintain/porting.md 3 3
site/docs/maintain/porting.uk.md 1 1
site/docs/maintain/testing.md 2 2
site/faq.md 7 7
site/freedom-status.md 6 6
site/index.de.md 4 4
site/index.fr.md 2 2
site/index.it.md 2 2
site/index.md 4 4
site/index.ru.md 2 2
site/index.uk.md 2 2
site/index.zh-cn.md 2 2
site/news/10.md 4 4
site/news/audit2.md 6 6
site/news/audit3.md 5 5
site/news/audit4.md 1 1
site/news/audit5.md 8 8
site/news/audit6.md 6 6
site/news/e6400nvidia.md 1 1
site/news/freedom.md 3 3
site/news/hp820g2.md 1 1
site/news/libreboot20140911.md 2 2
site/news/libreboot20141015.md 2 2
site/news/libreboot20150124.md 2 2
site/news/libreboot20150126.md 2 2
site/news/libreboot20150208.md 2 2
site/news/libreboot20150518.md 2 2
site/news/libreboot20160818.md 2 2
site/news/libreboot20160907.md 1 1
site/news/libreboot20210522.md 38 38
site/news/libreboot20221214.md 1 1
site/news/libreboot20230413.md 3 3
site/news/libreboot20230423.md 3 3
site/news/libreboot20230625.md 8 8
site/news/libreboot20231021.md 8 8
site/news/libreboot20240126.md 5 5
site/news/libreboot20240225.md 3 3
site/news/libreboot20240504.md 5 5
site/news/libreboot20240612.md 9 9
site/news/libreboot20241008.md 9 9
site/news/libreboot20241206.Revisions.md 1 1
site/news/libreboot20241206.md 5 5
site/news/microcode.md 9 9
site/news/policy.de.md 8 8
site/news/policy.md 8 8
site/news/policy.uk.md 2 2
site/news/ports202402.md 1 1
site/news/safety.md 4 4
site/news/update202308.md 1 1
site/news/x201.md 1 1
site/other.md 1 1
site/tasks/index.md 17 17
File site/contrib.md changed (mode: 100644) (index c9f3872..bb6355f)
... ... lot about hardware. Swift Geek also did some upstream development on GRUB.
663 663 Swift Geek has provided technical advice on numerous occasions, to Leah Rowe, Swift Geek has provided technical advice on numerous occasions, to Leah Rowe,
664 664 and helped her to improve her soldering skills in addition to teaching her and helped her to improve her soldering skills in addition to teaching her
665 665 some repair skills, to the point where she can now repair most faults on some repair skills, to the point where she can now repair most faults on
666 ThinkPad mainboards (while looking at the schematics and boardview).
666 ThinkPad motherboards (while looking at the schematics and boardview).
667 667
668 668 Swiftgeek left the project in March 2021. I, Leah Rowe, wish him all the best Swiftgeek left the project in March 2021. I, Leah Rowe, wish him all the best
669 669 in his endeavours, and I'm very grateful to his numerous contributions over the in his endeavours, and I'm very grateful to his numerous contributions over the
File site/docs/install/dell3050.md changed (mode: 100644) (index bd033e3..e703be0)
... ... The build target, when building from source, is thus:
91 91 Mate Kukri's *deguard* utility disables the Intel Boot Guard on this Mate Kukri's *deguard* utility disables the Intel Boot Guard on this
92 92 machine. Libreboot uses this by default, along with `me_cleaner` to provide machine. Libreboot uses this by default, along with `me_cleaner` to provide
93 93 a neutered ME setup; unlike on other platforms, arbitrary code execution is also a neutered ME setup; unlike on other platforms, arbitrary code execution is also
94 possible inside the ME on this mainboard, giving it much higher potential for
94 possible inside the ME on this motherboard, giving it much higher potential for
95 95 software freedom in the future. software freedom in the future.
96 96
97 97 Issues Issues
File site/docs/install/dell7010.md changed (mode: 100644) (index acf00b6..564046a)
... ... The build target, when building from source, is thus:
78 78
79 79 ./mk -b coreboot dell7010sff_12mb ./mk -b coreboot dell7010sff_12mb
80 80
81 NOTE: The same 7010 SFF image also works on 9010 SFF. It's the same mainboard.
81 NOTE: The same 7010 SFF image also works on 9010 SFF. It's the same motherboard.
82 82
83 83 Alternatively, you can use one of Libreboot's pre-compiled release images. Alternatively, you can use one of Libreboot's pre-compiled release images.
84 84
File site/docs/install/dell780.md changed (mode: 100644) (index 14bbcf6..28a52a9)
... ... Alternatively, you can use release images instead of compiling from source.
83 83
84 84 ### 100% FREE / OPEN SOURCE! ### 100% FREE / OPEN SOURCE!
85 85
86 This mainboard is entirely free software in the main boot flash. It is using
86 This motherboard is entirely free software in the main boot flash. It is using
87 87 the Intel X4X / ICH10 platform, same as on the already supported the Intel X4X / ICH10 platform, same as on the already supported
88 Gigabyte GA-G41M-ES2L mainboard.
88 Gigabyte GA-G41M-ES2L motherboard.
89 89
90 90 Install Libreboot Install Libreboot
91 91 ----------------- -----------------
File site/docs/install/hp8300usdt.md changed (mode: 100644) (index d18444a..3656c51)
... ... Install Libreboot
69 69 ----------------- -----------------
70 70
71 71 These next sections will teach you how to install Libreboot on your These next sections will teach you how to install Libreboot on your
72 HP Elite 8300 USDT mainboard.
72 HP Elite 8300 USDT motherboard.
73 73
74 74 ### Internal flashing ### Internal flashing
75 75
File site/docs/install/index.md changed (mode: 100644) (index 18afa26..d5fb175)
... ... example, they might fix power issues that could then enhance battery life.
202 202 See: <http://www.thinkwiki.org/wiki/BIOS_update_without_optical_disk> See: <http://www.thinkwiki.org/wiki/BIOS_update_without_optical_disk>
203 203
204 204 Otherwise, check the Lenovo website to find the update utility for your Otherwise, check the Lenovo website to find the update utility for your
205 mainboard.
205 motherboard.
206 206
207 207 ### HP EliteBooks ### HP EliteBooks
208 208
 
... ... flash internally. If that is the case, you must [flash externally](spi.md).
257 257
258 258 ### Updating an existing installation ### Updating an existing installation
259 259
260 Unless otherwise stated, in sections pertaining to each mainboard below,
260 Unless otherwise stated, in sections pertaining to each motherboard below,
261 261 an existing Libreboot installation can be updated via internal flashing, an existing Libreboot installation can be updated via internal flashing,
262 262 without any special steps; simply follow the general internal flashing without any special steps; simply follow the general internal flashing
263 263 guide, in the final section further down this page. guide, in the final section further down this page.
 
... ... If you currently have the factory firmware, you probably need to flash
269 269 externally; on *some* machines, internal flashing is possible, usually with externally; on *some* machines, internal flashing is possible, usually with
270 270 special steps required that differ from updating an existing installation. special steps required that differ from updating an existing installation.
271 271
272 The next sections will pertain to specific mainboards, where indicated,
272 The next sections will pertain to specific motherboards, where indicated,
273 273 followed by general internal flashing instructions where applicable. followed by general internal flashing instructions where applicable.
274 274
275 275 ### HP EliteBook 820 G2 (internal and external) ### HP EliteBook 820 G2 (internal and external)
 
... ... Install via host CPU (internal flashing)
590 590 NOTE: This mainly applies to the x86 machines. NOTE: This mainly applies to the x86 machines.
591 591
592 592 Please check other sections listed above, to see if there is anything Please check other sections listed above, to see if there is anything
593 pertaining to your mainboard. Internal flashing means that you boot Linux or
593 pertaining to your motherboard. Internal flashing means that you boot Linux or
594 594 BSD on the target machine, and run `flashprog` there, flashing the machine BSD on the target machine, and run `flashprog` there, flashing the machine
595 595 directly. directly.
596 596
File site/docs/install/ivy_has_common.md changed (mode: 100644) (index 5ddc40b..8382c39)
... ... Policy](../../news/policy.md) and [Freedom Status](../../freedom-status.md)
14 14 pages. pages.
15 15
16 16 **PLEASE MAKE SURE you read and follow the instructions on this page, prior **PLEASE MAKE SURE you read and follow the instructions on this page, prior
17 to flashing Libreboot, if required for your mainboard; failure to heed this
17 to flashing Libreboot, if required for your motherboard; failure to heed this
18 18 warning can and will result in a soft-brick, which would then necessitate warning can and will result in a soft-brick, which would then necessitate
19 19 recovery via [external flashing](spi.md) - regardless, you are advised to recovery via [external flashing](spi.md) - regardless, you are advised to
20 20 also read the external flashing guide just in caes, and have an external also read the external flashing guide just in caes, and have an external
File site/docs/install/kcma-d8.md changed (mode: 100644) (index f3952ab..b2bf0ff)
... ... Don't use it. It uses proprietary firmware and adds a backdoor (remote
116 116 out-of-band management chip, similar to the [Intel Management out-of-band management chip, similar to the [Intel Management
117 117 Engine](../../faq.md#intelme). Fortunately, the firmware is Engine](../../faq.md#intelme). Fortunately, the firmware is
118 118 unsigned (possible to replace) and physically separate from the unsigned (possible to replace) and physically separate from the
119 mainboard since it's on the add-on module, which you don't have to
119 motherboard since it's on the add-on module, which you don't have to
120 120 install. install.
121 121
122 122 Flash chips {#flashchips} Flash chips {#flashchips}
 
... ... Only text-mode is known to work, but linux(kernel) can initialize the
143 143 framebuffer display (if it has KMS - kernel mode setting). framebuffer display (if it has KMS - kernel mode setting).
144 144
145 145 NOTE: This section relates to the onboard ASpeed GPU. You *can* use an add-on NOTE: This section relates to the onboard ASpeed GPU. You *can* use an add-on
146 PCI-E GPU in one of the available slots on the mainboard. Nvidia GTX 780 cards
146 PCI-E GPU in one of the available slots on the motherboard. Nvidia GTX 780 cards
147 147 are what libreboot recommends; it has excellent support in Nouveau (free Linux are what libreboot recommends; it has excellent support in Nouveau (free Linux
148 148 kernel / mesa driver for Nvidia cards) and generally works well; however, the kernel / mesa driver for Nvidia cards) and generally works well; however, the
149 149 performance won't be as high in Nouveau, compared to the non-free Nvidia driver performance won't be as high in Nouveau, compared to the non-free Nvidia driver
File site/docs/install/kgpe-d16.md changed (mode: 100644) (index 51ae60e..88f262d)
... ... Don't use it. It uses proprietary firmware and adds a backdoor (remote
56 56 out-of-band management chip, similar to the [Intel Management out-of-band management chip, similar to the [Intel Management
57 57 Engine](../../faq.md#intelme). Fortunately, the firmware is Engine](../../faq.md#intelme). Fortunately, the firmware is
58 58 unsigned (possibly to replace) and physically separate from the unsigned (possibly to replace) and physically separate from the
59 mainboard since it's on the add-on module, which you don't have to
59 motherboard since it's on the add-on module, which you don't have to
60 60 install. install.
61 61
62 62 Flash chips {#flashchips} Flash chips {#flashchips}
File site/docs/install/nvmutil.md changed (mode: 100644) (index f131dfa..2c22e03)
... ... handling is provided, later in this document.
73 73
74 74 The `restore` option restores the original one. The command works by using a The `restore` option restores the original one. The command works by using a
75 75 reference GbE image file present in Libreboot's build system, for the given reference GbE image file present in Libreboot's build system, for the given
76 mainboard.
76 motherboard.
77 77
78 78 How to download newer versions How to download newer versions
79 79 ------------------------------ ------------------------------
File site/docs/install/spi.md changed (mode: 100644) (index 7ac8bc4..9176ccd)
... ... SPI flash, using an on-board SPI programmer (which all boards have). You do this
95 95 from Linux, with flashprog. from Linux, with flashprog.
96 96
97 97 *This* guide that you're reading now is for using an *external* programmer. It *This* guide that you're reading now is for using an *external* programmer. It
98 is called *external* because it's not the *internal* one on your mainboard.
98 is called *external* because it's not the *internal* one on your motherboard.
99 99
100 100 Raspberry Pi Pico Raspberry Pi Pico
101 101 ----------------- -----------------
 
... ... build up and possibly fire (and definitely damaged circuitry). On SOIC8, pin 3
247 247 is WP and 4 is GND, so a direct 3.3v connection there is quite hazardous for is WP and 4 is GND, so a direct 3.3v connection there is quite hazardous for
248 248 that reason; all the more reason to use a pull-up resistor.** that reason; all the more reason to use a pull-up resistor.**
249 249
250 The mainboard that you want to flash (if using e.g. pomona clip) will probably
250 The motherboard that you want to flash (if using e.g. pomona clip) will probably
251 251 have pull-up resistors on it already for WP/HOLD, so simply cutting WP/HOLD have pull-up resistors on it already for WP/HOLD, so simply cutting WP/HOLD
252 252 on the CH341A would also be acceptable. The pull-up resistors that you on the CH341A would also be acceptable. The pull-up resistors that you
253 253 place (in such a mod) on the CH341A are only useful if you also want to flash place (in such a mod) on the CH341A are only useful if you also want to flash
254 254 chips in the ZIF socket. If pull-up resistors exist both on e.g. the laptop chips in the ZIF socket. If pull-up resistors exist both on e.g. the laptop
255 mainboard and on the CH341A, it just means the equivalent series resistance
255 motherboard and on the CH341A, it just means the equivalent series resistance
256 256 will be of the two resistors (on each line) in parallel. If we assume that will be of the two resistors (on each line) in parallel. If we assume that
257 257 a laptop is likely to have a resistor size of ~3.3k for pull-ups, then a value a laptop is likely to have a resistor size of ~3.3k for pull-ups, then a value
258 258 of ~5.6k ohms on the CH341A side seems reasonable. of ~5.6k ohms on the CH341A side seems reasonable.
 
... ... voltage range is between 2.7V and 3.6V, but 3.3V is the most ideal level).
789 789
790 790 DO NOT connect more than 1 DC power source to your flash chip either! DO NOT connect more than 1 DC power source to your flash chip either!
791 791 Mixing voltages like that can easily cause damage to your equipment, and to Mixing voltages like that can easily cause damage to your equipment, and to
792 your chip/mainboard.
792 your chip/motherboard.
793 793
794 794 ### MISO/MOSI/CS/CLK lines ### MISO/MOSI/CS/CLK lines
795 795
 
... ... connected via such resistors, directly to the Southbridge chipset.
801 801 ### ISP programming and VCC diode ### ISP programming and VCC diode
802 802
803 803 ISP means in-system programming. It's when you flash a chip that is already ISP means in-system programming. It's when you flash a chip that is already
804 mounted to the mainboard of your computer that you wish to install libreboot
804 mounted to the motherboard of your computer that you wish to install libreboot
805 805 on. on.
806 806
807 It may be beneficial to modify the mainboard so that the SPI flash is powered
807 It may be beneficial to modify the motherboard so that the SPI flash is powered
808 808 (on the VCC pin) through a diode, but please note: a diode will cause a voltage (on the VCC pin) through a diode, but please note: a diode will cause a voltage
809 809 drop. The tolerated range for a chip expecting 3.3V VCC is usually around 2.7V drop. The tolerated range for a chip expecting 3.3V VCC is usually around 2.7V
810 810 to 3.6V DC, and the drop may cause the voltage to fall outside that. If you do to 3.6V DC, and the drop may cause the voltage to fall outside that. If you do
 
... ... other components on that board, which share the same power rail. Further,
824 824 ensure that the pull-up resistors for WP/HOLD are *only* connected to the side ensure that the pull-up resistors for WP/HOLD are *only* connected to the side
825 825 of the diode that has continuity with the VCC pin (this is important because if of the diode that has continuity with the VCC pin (this is important because if
826 826 they're not, they won't be held high while doing ISP flashing, even if they're they're not, they won't be held high while doing ISP flashing, even if they're
827 still held high when the mainboard is fully powered on).
827 still held high when the motherboard is fully powered on).
828 828
829 829 Furthermore: ensure that the SPI flash is operating at the appropriate supply Furthermore: ensure that the SPI flash is operating at the appropriate supply
830 830 voltage (2.7V to 3.6V for a 3.3V chip) when fully powered on, after installing voltage (2.7V to 3.6V for a 3.3V chip) when fully powered on, after installing
 
... ... the SOIC8/WSON8 if it uses that, and replace with an IC socket (for SOIC8,
835 835 WSON8 or DIP8, whatever you want), because then you could easily just insert WSON8 or DIP8, whatever you want), because then you could easily just insert
836 836 the flash into a breadboard when flashing. the flash into a breadboard when flashing.
837 837
838 TODO: Make a page on libreboot.org, showing how to do this on all mainboards
838 TODO: Make a page on libreboot.org, showing how to do this on all motherboards
839 839 supported by libreboot. supported by libreboot.
840 840
841 841 ### GPIO pins on BeagleBone Black (BBB) ### GPIO pins on BeagleBone Black (BBB)
 
... ... use pull-up resistors on those (see notes below), and decoupling capacitor on
886 886 pin 8 (VCC). pin 8 (VCC).
887 887
888 888 NOTE: On X60/T60 thinkpads, don't connect pin 8. Instead, plug in your the PSU NOTE: On X60/T60 thinkpads, don't connect pin 8. Instead, plug in your the PSU
889 to the charging port on your mainboard, but do not power on the mainboard. This
889 to the charging port on your motherboard, but do not power on the motherboard. This
890 890 will provide a stable 3.3V voltage, with adequate current levels. On those will provide a stable 3.3V voltage, with adequate current levels. On those
891 891 laptops, this is necessary because the flash shares a common 3.3V DC rail with laptops, this is necessary because the flash shares a common 3.3V DC rail with
892 892 many other ICs that all draw quite a lot of current. many other ICs that all draw quite a lot of current.
 
... ... pin 2 (VCC).
932 932 ### Pull-up resistors and decoupling capacitors ### Pull-up resistors and decoupling capacitors
933 933
934 934 **Do this for chips mounted to a breadboard. Ignore this section if you're **Do this for chips mounted to a breadboard. Ignore this section if you're
935 flashing a chip that is already soldered to a mainboard.**
935 flashing a chip that is already soldered to a motherboard.**
936 936
937 937 This section is only relevant if you're flashing a new chip that is not yet This section is only relevant if you're flashing a new chip that is not yet
938 mounted to a mainboard. You need pull-up resistors on the WP and HOLD pins,
938 mounted to a motherboard. You need pull-up resistors on the WP and HOLD pins,
939 939 and decoupling capacitors on the VCC pin. If the chip is already mounted to a and decoupling capacitors on the VCC pin. If the chip is already mounted to a
940 940 board, whether soldered or in a socket, these capacitors and resistors will board, whether soldered or in a socket, these capacitors and resistors will
941 941 probably already exist on the board and you can just flash it without pulling probably already exist on the board and you can just flash it without pulling
 
... ... The best way is as follows:
952 952 SOIC8/WSON8/DIP8: pin 3 and 7 must be held to a high logic state, which means SOIC8/WSON8/DIP8: pin 3 and 7 must be held to a high logic state, which means
953 953 that each pin has its own pull-up resistor to VCC (from the voltage plane that that each pin has its own pull-up resistor to VCC (from the voltage plane that
954 954 pin 8 connects to); anything from 1Kohm to 10Kohm will do. When you're flashing pin 8 connects to); anything from 1Kohm to 10Kohm will do. When you're flashing
955 a chip that's already on a laptop/desktop/server mainboard, pin 3 and 7 are
955 a chip that's already on a laptop/desktop/server motherboard, pin 3 and 7 are
956 956 likely already held high, so you don't need to bother. likely already held high, so you don't need to bother.
957 957
958 958 SOIC8/WSON8/DIP8: pin 8, which is VCC, will already have decoupling capacitors on it SOIC8/WSON8/DIP8: pin 8, which is VCC, will already have decoupling capacitors on it
959 if the chip is on a mainboard, but lone chip flashing means that these capacitors
959 if the chip is on a motherboard, but lone chip flashing means that these capacitors
960 960 do not exist. A capacitor passes AC but blocks DC. Due to electromagnetic do not exist. A capacitor passes AC but blocks DC. Due to electromagnetic
961 961 indunctance, and RF noise from high-speed switching ICs, a DC voltage line isn't indunctance, and RF noise from high-speed switching ICs, a DC voltage line isn't
962 962 actually straight (when viewed on an oscilloscope), but actually has low voltage actually straight (when viewed on an oscilloscope), but actually has low voltage
 
... ... WP/HOLD are not pin 3/7 like above, but instead pins 1 and 9, so wire your
977 977 pull-up resistors on those. VCC on SOIC16 is pin 2, so wire your decoupling pull-up resistors on those. VCC on SOIC16 is pin 2, so wire your decoupling
978 978 capacitors up on that. capacitors up on that.
979 979
980 ### SOIC8/WSON8/DIP8/SOIC16 not mounted to a mainboard
980 ### SOIC8/WSON8/DIP8/SOIC16 not mounted to a motherboard
981 981
982 982 If your system has lower capacity SPI flash, you can upgrade. On *most* systems, If your system has lower capacity SPI flash, you can upgrade. On *most* systems,
983 983 SPI flash is memory mapped and the maximum (in practise) that you can use is a SPI flash is memory mapped and the maximum (in practise) that you can use is a
984 16MiB chip. For example, KGPE-D16 and KCMA-D8 mainboards in libreboot have
984 16MiB chip. For example, KGPE-D16 and KCMA-D8 motherboards in libreboot have
985 985 2MiB flash by default, but you can easily upgrade these. Another example is the 2MiB flash by default, but you can easily upgrade these. Another example is the
986 986 ThinkPad X200S, X200 Tablet and T400S, all of which have WSON8 where the best ThinkPad X200S, X200 Tablet and T400S, all of which have WSON8 where the best
987 987 course of action is to replace it with a SOIC8 flash chip. course of action is to replace it with a SOIC8 flash chip.
 
... ... video, but for WSON8. Sometimes they are called DFN8 or QFN8 sockets. Get one
1018 1018 that is 1.27mm pitch. that is 1.27mm pitch.
1019 1019
1020 1020 If you're flashing/dumping a lone WSON8, get a WSON8/QFN8/DFN8 socket (1.27mm If you're flashing/dumping a lone WSON8, get a WSON8/QFN8/DFN8 socket (1.27mm
1021 pitch) and mount it to a breadboard for flashing. If your mainboard's landing
1021 pitch) and mount it to a breadboard for flashing. If your motherboard's landing
1022 1022 pads for the flash IC can take a SOIC8, we recommend that you use a SOIC8 pads for the flash IC can take a SOIC8, we recommend that you use a SOIC8
1023 1023 instead because a test clip is possible later on when you wish to re-flash it, instead because a test clip is possible later on when you wish to re-flash it,
1024 1024 however you may be dealing with a board where replacing existing WSON8 with however you may be dealing with a board where replacing existing WSON8 with
 
... ... and good 60/40 or 63/37 leaded solder (don't use lead-free):
1049 1049 ![](https://av.libreboot.org/dip8/adapter.jpg) ![](https://av.libreboot.org/dip8/adapter.jpg)
1050 1050 ![](https://av.libreboot.org/dip8/sop8todip8.jpg) ![](https://av.libreboot.org/dip8/sop8todip8.jpg)
1051 1051
1052 ### SOIC8/SOIC16 soldered to a mainboard
1052 ### SOIC8/SOIC16 soldered to a motherboard
1053 1053
1054 1054 This is an example of *in-system programming* or *ISP* for short. This is an example of *in-system programming* or *ISP* for short.
1055 1055
 
... ... SOIC8:\
1057 1057 Pomona 5250 is a SOIC8 test clip. There are others available, but this is the Pomona 5250 is a SOIC8 test clip. There are others available, but this is the
1058 1058 best one. Use that. Use the SOIC8 diagram (see above) to wire up your Raspberry best one. Use that. Use the SOIC8 diagram (see above) to wire up your Raspberry
1059 1059 Pi. Pi.
1060 Your mainboard likely already pulls WP/HOLD (pins 3 and 7) high, so don't
1060 Your motherboard likely already pulls WP/HOLD (pins 3 and 7) high, so don't
1061 1061 connect these. VCC on SOIC8's pin 8 probably already has decoupling connect these. VCC on SOIC8's pin 8 probably already has decoupling
1062 capacitors on the mainboard, so just hook that up without using a capacitor.
1062 capacitors on the motherboard, so just hook that up without using a capacitor.
1063 1063
1064 1064 SOIC16:\ SOIC16:\
1065 1065 Pomona 5252 is a SOIC16 test clip. There are others available, but this is the Pomona 5252 is a SOIC16 test clip. There are others available, but this is the
1066 1066 best one. Use that. Use the SOIC16 diagram (see above) to wire up your Raspberry best one. Use that. Use the SOIC16 diagram (see above) to wire up your Raspberry
1067 1067 Pi. WP/HOLD pins are pins 1 and 9, and likely already held high, so no pull-up Pi. WP/HOLD pins are pins 1 and 9, and likely already held high, so no pull-up
1068 1068 resistors needed. You do not need a decoupling capacitor for pin 2 (VCC) either resistors needed. You do not need a decoupling capacitor for pin 2 (VCC) either
1069 because the mainboard will already have one.
1069 because the motherboard will already have one.
1070 1070
1071 1071 Here is an example of a test clip connected for SOIC16:\ Here is an example of a test clip connected for SOIC16:\
1072 1072 ![](https://av.libreboot.org/rpi/0002.jpg) ![](https://av.libreboot.org/rpi/0002.jpg)
 
... ... Here is an example of a test clip connected for SOIC16:\
1074 1074 And here is an example photo for SOIC8:\ And here is an example photo for SOIC8:\
1075 1075 ![](https://av.libreboot.org/x60/th_bbb_flashing.jpg) ![](https://av.libreboot.org/x60/th_bbb_flashing.jpg)
1076 1076
1077 ### DIP8 soldered to the mainboard
1077 ### DIP8 soldered to the motherboard
1078 1078
1079 It is extremely cursed for DIP8 to be soldered directly to the mainboard. It is
1079 It is extremely cursed for DIP8 to be soldered directly to the motherboard. It is
1080 1080 usually mounted to a socket. usually mounted to a socket.
1081 1081
1082 1082 The pins are large enough that you can just use test hooks to wire up your chip The pins are large enough that you can just use test hooks to wire up your chip
File site/docs/install/t480.md changed (mode: 100644) (index ecc4351..8128f2a)
... ... Intel graphics, internal screen, ethernet, USB, WLAN, HDA verbs (e.g. headphone
129 129 jack), S3 suspend/resume, M2 NVMe SSDs and SATA, B+M key NVMe SSDs in WWAN slot, jack), S3 suspend/resume, M2 NVMe SSDs and SATA, B+M key NVMe SSDs in WWAN slot,
130 130 **all works perfectly**. External video outputs and webcam also work. Microphone **all works perfectly**. External video outputs and webcam also work. Microphone
131 131 works, line-out works... everything works. UART also available via line-out jack works, line-out works... everything works. UART also available via line-out jack
132 (jumpers required on the mainboard).
132 (jumpers required on the motherboard).
133 133
134 134 There *are* a few minor exceptions as to what works; this will be covered in There *are* a few minor exceptions as to what works; this will be covered in
135 135 other sections of this page. This port is *almost* perfect, but with some caveats. other sections of this page. This port is *almost* perfect, but with some caveats.
 
... ... service manual online. Otherwise, observe:
445 445 <img tabindex=1 alt="ThinkPad T480 underside chassis" class="p" src="https://av.libreboot.org/t480/t480bottom.jpg" /><span class="f"><img src="https://av.libreboot.org/t480/t480bottom.jpg" /></span> <img tabindex=1 alt="ThinkPad T480 underside chassis" class="p" src="https://av.libreboot.org/t480/t480bottom.jpg" /><span class="f"><img src="https://av.libreboot.org/t480/t480bottom.jpg" /></span>
446 446
447 447 Remove all screws, and you can gently pry off the lower chassis and remove, Remove all screws, and you can gently pry off the lower chassis and remove,
448 which then allows you to see the inner mainboard:
448 which then allows you to see the inner motherboard:
449 449
450 450 <img tabindex=1 alt="ThinkPad T480 PCB" class="p" src="https://av.libreboot.org/t480/t480pcb.jpg" /><span class="f"><img src="https://av.libreboot.org/t480/t480pcb.jpg" /></span> <img tabindex=1 alt="ThinkPad T480 PCB" class="p" src="https://av.libreboot.org/t480/t480pcb.jpg" /><span class="f"><img src="https://av.libreboot.org/t480/t480pcb.jpg" /></span>
451 451
File site/docs/install/t60_unbrick.md changed (mode: 100644) (index 14f8027..85b6ca3)
... ... Refer to the external flashing guide:
100 100 [Externally rewrite 25xx NOR flash via SPI protocol](spi.md) [Externally rewrite 25xx NOR flash via SPI protocol](spi.md)
101 101
102 102 NOTE: Do not use the 3.3v rail from your SPI programmer. Leave that disconnected. NOTE: Do not use the 3.3v rail from your SPI programmer. Leave that disconnected.
103 For 3.3v, plug your charger into the mainboard (but do not power on the mainboard)
103 For 3.3v, plug your charger into the motherboard (but do not power on the motherboard)
104 104 when the clip is connected. Before removing the clip, disconnect the charger. when the clip is connected. Before removing the clip, disconnect the charger.
105 105 This will provide adequate 3.3v DC at correct current levels. The SPI flash on an This will provide adequate 3.3v DC at correct current levels. The SPI flash on an
106 X60 shares a common 3.3V rail with many other components on the mainboard,
106 X60 shares a common 3.3V rail with many other components on the motherboard,
107 107 which all draw a lot of current, more than your flasher can provide. which all draw a lot of current, more than your flasher can provide.
108 108
109 109 Example command: Example command:
File site/docs/install/x60_unbrick.md changed (mode: 100644) (index 3ec2b92..049c12d)
... ... Refer to the following guide:\
84 84 [Externally rewrite 25xx NOR flash via SPI protocol](spi.md) [Externally rewrite 25xx NOR flash via SPI protocol](spi.md)
85 85
86 86 NOTE: Do not use the 3.3v rail from your raspberry pi. Leave that disconnected. NOTE: Do not use the 3.3v rail from your raspberry pi. Leave that disconnected.
87 For 3.3v, plug your charger into the mainboard (but do not power on the mainboard)
87 For 3.3v, plug your charger into the motherboard (but do not power on the motherboard)
88 88 when the clip is connected. Before removing the clip, disconnect the charger. when the clip is connected. Before removing the clip, disconnect the charger.
89 89 This will provide adequate 3.3v DC at correct current levels. The SPI flash on an This will provide adequate 3.3v DC at correct current levels. The SPI flash on an
90 X60 shares a common 3.3V rail with many other components on the mainboard,
90 X60 shares a common 3.3V rail with many other components on the motherboard,
91 91 which all draw a lot of current, more than your programmer can provide. which all draw a lot of current, more than your programmer can provide.
92 92
93 93 When you're finished flashing, remove the programmer and put it away somewhere. When you're finished flashing, remove the programmer and put it away somewhere.
File site/docs/install/x60tablet_unbrick.md changed (mode: 100644) (index 13a29ca..19bea73)
... ... Refer to the external flashing guide:
64 64 [Externally rewrite 25xx NOR flash via SPI protocol](spi.md) [Externally rewrite 25xx NOR flash via SPI protocol](spi.md)
65 65
66 66 NOTE: Do not use the 3.3v rail from your SPI programmer. Leave that disconnected. NOTE: Do not use the 3.3v rail from your SPI programmer. Leave that disconnected.
67 For 3.3v, plug your charger into the mainboard (but do not power on the mainboard)
67 For 3.3v, plug your charger into the motherboard (but do not power on the motherboard)
68 68 when the clip is connected. Before removing the clip, disconnect the charger. when the clip is connected. Before removing the clip, disconnect the charger.
69 69 This will provide adequate 3.3v DC at correct current levels. The SPI flash on an This will provide adequate 3.3v DC at correct current levels. The SPI flash on an
70 X60 Tablet shares a common 3.3V rail with many other components on the mainboard,
70 X60 Tablet shares a common 3.3V rail with many other components on the motherboard,
71 71 which all draw a lot of current, more than most flashers can provide. which all draw a lot of current, more than most flashers can provide.
72 72
73 73 Reverse the steps to re-assemble your system, after you've flashed the chip. Reverse the steps to re-assemble your system, after you've flashed the chip.
File site/docs/linux/grub_hardening.md changed (mode: 100644) (index 00875d6..c57ddab)
... ... The simplest way is to just do this:
125 125
126 126 If you did the step before, to compile `cbfstool`, you can find ifdtool in If you did the step before, to compile `cbfstool`, you can find ifdtool in
127 127 the `elf/` directory, e.g. `elf/ifdtool/default/ifdtool`. Use the ifdtool the `elf/` directory, e.g. `elf/ifdtool/default/ifdtool`. Use the ifdtool
128 version matching the coreboot tree for your mainboard.
128 version matching the coreboot tree for your motherboard.
129 129
130 130 Note that this only works for Intel-based systems that use an Intel Flash Note that this only works for Intel-based systems that use an Intel Flash
131 131 Descriptor, which is actually most Intel systems that Libreboot supports. Descriptor, which is actually most Intel systems that Libreboot supports.
File site/docs/maintain/index.md changed (mode: 100644) (index 05ecb62..4c617db)
... ... entire release archives, e.g. quad-core Haswell CPU or better.
121 121 NOTE: x86 boards require an *x86_64* host CPU with appropriate host toolchains NOTE: x86 boards require an *x86_64* host CPU with appropriate host toolchains
122 122 and libraries. We don't yet cross-compile x86 payloads. and libraries. We don't yet cross-compile x86 payloads.
123 123
124 NOTE2: ARM64 mainboards *are* cross compiled, so you can build for AArch64
124 NOTE2: ARM64 motherboards *are* cross compiled, so you can build for AArch64
125 125 machines quite easily, from x86 or ARM64 machines. machines quite easily, from x86 or ARM64 machines.
126 126
127 127 NOTE3: *32-bit* x86 (i686) machines can be used to compile Libreboot, but NOTE3: *32-bit* x86 (i686) machines can be used to compile Libreboot, but
 
... ... to extract SCH5545 EC (Environment Control) firmware.
367 367 Please also visit: <https://coreboot.org/> Please also visit: <https://coreboot.org/>
368 368
369 369 Coreboot is the main boot firmware, providing hardware initialisation. Libreboot Coreboot is the main boot firmware, providing hardware initialisation. Libreboot
370 makes extensive use of coreboot, on supported mainboards.
370 makes extensive use of coreboot, on supported motherboards.
371 371
372 372 Coreboot trees go here. Libreboot's build system does not simply use one tree, Coreboot trees go here. Libreboot's build system does not simply use one tree,
373 373 or multiple branches in the same tree; entirely separate directories are or multiple branches in the same tree; entirely separate directories are
374 374 created, for each revision of coreboot used, each able to have its own patches. created, for each revision of coreboot used, each able to have its own patches.
375 These can then be re-use appropriately, per mainboard. For example:
375 These can then be re-use appropriately, per motherboard. For example:
376 376
377 * `src/coreboot/default` is used by most mainboards.
377 * `src/coreboot/default` is used by most motherboards.
378 378 * `src/coreboot/cros` is used by cros devices. * `src/coreboot/cros` is used by cros devices.
379 379
380 380 This may be less efficient on disk usage, but it simplifies the logic greatly. This may be less efficient on disk usage, but it simplifies the logic greatly.
 
... ... which SeaBIOS revision (from Git) is to be used, when compiling SeaBIOS images.
1129 1129
1130 1130 ### config/u-boot/ ### config/u-boot/
1131 1131
1132 This directory contains configuration, patches and so on, for each mainboard
1132 This directory contains configuration, patches and so on, for each motherboard
1133 1133 that can use U-Boot as a payload in the `lbmk` build system. U-Boot doesn't yet that can use U-Boot as a payload in the `lbmk` build system. U-Boot doesn't yet
1134 1134 have reliable generic configurations that can work across all coreboot boards have reliable generic configurations that can work across all coreboot boards
1135 1135 (per-architecture), so these are used to build it per-board. (per-architecture), so these are used to build it per-board.
 
... ... a location under `elf/u-boot/`.
1142 1142
1143 1143 #### config/u-boot/TREENAME/ #### config/u-boot/TREENAME/
1144 1144
1145 Each `TREENAME` directory defines configuration for a corresponding mainboard.
1145 Each `TREENAME` directory defines configuration for a corresponding motherboard.
1146 1146 It doesn't actually have to be for a board; it can also be used to just define It doesn't actually have to be for a board; it can also be used to just define
1147 1147 a U-Boot revision, with patches and so on. To enable use as a payload in ROM a U-Boot revision, with patches and so on. To enable use as a payload in ROM
1148 1148 images, this must have the same name as its `config/coreboot/TREENAME/` images, this must have the same name as its `config/coreboot/TREENAME/`
 
... ... by lbmk is handled by the functions in this file.
1375 1375 This was previously a separate script. The download logic was removed, and This was previously a separate script. The download logic was removed, and
1376 1376 now the logic under `include/vendor.sh` is used for downloads. This file now now the logic under `include/vendor.sh` is used for downloads. This file now
1377 1377 only contains those functions used for extraction of MRC files from Google only contains those functions used for extraction of MRC files from Google
1378 Chromebook images, currently only used for Haswell mainboards.
1378 Chromebook images, currently only used for Haswell motherboards.
1379 1379
1380 1380 This is an include, used by `include/vendor.sh`, but it's here in This is an include, used by `include/vendor.sh`, but it's here in
1381 1381 this file because the vendor download script is GPLv3-only, while the MRC this file because the vendor download script is GPLv3-only, while the MRC
File site/docs/maintain/porting.md changed (mode: 100644) (index dff145f..a0b6b4d)
1 1 --- ---
2 title: Porting guide for new mainboards
2 title: Porting guide for new motherboards
3 3 ... ...
4 4
5 5 **NOTE: Libreboot standardises on [flashprog](https://flashprog.org/wiki/Flashprog) **NOTE: Libreboot standardises on [flashprog](https://flashprog.org/wiki/Flashprog)
 
... ... You can then easily modify the existing coreboot configs for you board via lbmk.
77 77
78 78 This script will provide a curses interface through which you can easily modify the This script will provide a curses interface through which you can easily modify the
79 79 necessary variables and settings. necessary variables and settings.
80 The most important thing to change is `Mainboard.`
81 You must make sure that the mainboard definition in this config matches `board.`
80 The most important thing to change is `Motherboard.`
81 You must make sure that the motherboard definition in this config matches `board.`
82 82 For example, you would want to change lenovo/t420 to lenovo/t420s. For example, you would want to change lenovo/t420 to lenovo/t420s.
83 83 Selecting `exit` in the curses interface will prompt you to ask if you want to save your Selecting `exit` in the curses interface will prompt you to ask if you want to save your
84 84 changes, make sure to answer yes. changes, make sure to answer yes.
File site/docs/maintain/porting.uk.md changed (mode: 100644) (index e33022a..e390d8e)
... ... libreboot як `плата.`
70 70
71 71 Цей сценарій надать інтерфейс curses, через який ви можете легко модифікувати Цей сценарій надать інтерфейс curses, через який ви можете легко модифікувати
72 72 потрібні змінні та налаштування. потрібні змінні та налаштування.
73 Найбліьш важлива річ - це змінити `Материнську плату (Mainboard).`
73 Найбліьш важлива річ - це змінити `Материнську плату (Motherboard).`
74 74 Ви мусити переконатись, що визначення материнської плати в цій конфігурації відповідає `платі.` Ви мусити переконатись, що визначення материнської плати в цій конфігурації відповідає `платі.`
75 75 Наприклад, ви би хотіли змінити lenovo/t420 на lenovo/t420s. Наприклад, ви би хотіли змінити lenovo/t420 на lenovo/t420s.
76 76 Вибір `exit` в інтерфейсі curses виведе вам пропозицію зберегти ваші Вибір `exit` в інтерфейсі curses виведе вам пропозицію зберегти ваші
File site/docs/maintain/testing.md changed (mode: 100644) (index aaa680a..3264170)
... ... maintainer or multiple maintainers; more is better.
35 35 Please read the following sections to understand the specifics of Please read the following sections to understand the specifics of
36 36 maintaining a board. maintaining a board.
37 37
38 NOTE: If there are already testers for a given mainboard, *you* can still
39 provide testing for the same mainboard if that's what you have. The more the
38 NOTE: If there are already testers for a given motherboard, *you* can still
39 provide testing for the same motherboard if that's what you have. The more the
40 40 merrier! merrier!
41 41
42 42 Be Contactable Be Contactable
File site/faq.md changed (mode: 100644) (index f1e7d13..2109de0)
... ... Refer to the [lbmk maintenance manual](docs/maintain/).
42 42
43 43 ### Do not use CH341A! ### Do not use CH341A!
44 44
45 This SPI flasher will damage your chip, and the mainboard that it is connected
45 This SPI flasher will damage your chip, and the motherboard that it is connected
46 46 to. to.
47 47
48 48 Read the notes about CH341A on [docs/install/spi.md](docs/install/spi.md) to Read the notes about CH341A on [docs/install/spi.md](docs/install/spi.md) to
 
... ... the CPU, and prevent the CPU from executing boot firmware that isn't
260 260 signed with their private key. This means that ***coreboot and libreboot signed with their private key. This means that ***coreboot and libreboot
261 261 are impossible to port*** to such PCs, without the OEM's private are impossible to port*** to such PCs, without the OEM's private
262 262 signing key. Note that systems assembled from separately purchased signing key. Note that systems assembled from separately purchased
263 mainboard and CPU parts are unaffected, since the vendor of the
264 mainboard (on which the boot firmware is stored) can't possibly affect
263 motherboard and CPU parts are unaffected, since the vendor of the
264 motherboard (on which the boot firmware is stored) can't possibly affect
265 265 the public key stored on the CPU. the public key stored on the CPU.
266 266
267 267 ME firmware versions 4.0 and later (Intel 4 Series and later chipsets) ME firmware versions 4.0 and later (Intel 4 Series and later chipsets)
 
... ... re-flash it.
564 564 ### How do I pad a ROM before flashing? ### How do I pad a ROM before flashing?
565 565
566 566 It is advisable to simply use a larger ROM image. This section was written It is advisable to simply use a larger ROM image. This section was written
567 mostly for ASUS KCMA-D8 and KGPE-D16 mainboards, where previously we only
567 mostly for ASUS KCMA-D8 and KGPE-D16 motherboards, where previously we only
568 568 provided 2MiB ROM images in libreboot, but we now provide 16MiB ROM images. provided 2MiB ROM images in libreboot, but we now provide 16MiB ROM images.
569 569 Other sizes are not provided because in practise, someone upgrading one of Other sizes are not provided because in practise, someone upgrading one of
570 570 these chips will just use a 16MiB one. Larger sizes are available, but 16MiB these chips will just use a 16MiB one. Larger sizes are available, but 16MiB
 
... ... on Void Linux (ThinkPad T480), Linux (or modprobe) may fail to load
646 646 modprobe: ERROR: could not insert 'thinkpad_acpi': "No such device" modprobe: ERROR: could not insert 'thinkpad_acpi': "No such device"
647 647 ``` ```
648 648
649 It is suspected that at least these mainboards are affected:
649 It is suspected that at least these motherboards are affected:
650 650
651 651 * [ThinkPad W541](docs/install/w541_external.md) * [ThinkPad W541](docs/install/w541_external.md)
652 652 * [ThinkPad T440p](docs/install/t440p_external.md) * [ThinkPad T440p](docs/install/t440p_external.md)
 
... ... What level of software freedom does libreboot give me?
991 991 Please read the [libreboot binary blob minimalisation policy](news/policy.md). Please read the [libreboot binary blob minimalisation policy](news/policy.md).
992 992
993 993 Please also read: Please also read:
994 [Software and hardware freedom status for each mainboard supported by
994 [Software and hardware freedom status for each motherboard supported by
995 995 Libreboot](software-freedom.md) Libreboot](software-freedom.md)
996 996
997 997 The libreboot firmware provides host hardware initialisation inside ROM files, The libreboot firmware provides host hardware initialisation inside ROM files,
998 998 that can be written to NOR flash, but on many systems there exist that can be written to NOR flash, but on many systems there exist
999 a lot more small computers on the mainboard running blob firmware.
999 a lot more small computers on the motherboard running blob firmware.
1000 1000 Some of them are not practicable to replace due to being located on Mask ROM. Some of them are not practicable to replace due to being located on Mask ROM.
1001 1001 Most laptops have EC (Embedded Controller) firmware, for example. Most laptops have EC (Embedded Controller) firmware, for example.
1002 1002
File site/freedom-status.md changed (mode: 100644) (index 2568f92..e176e21)
1 1 --- ---
2 title: Software and hardware freedom status for each mainboard supported by Libreboot
2 title: Software and hardware freedom status for each motherboard supported by Libreboot
3 3 x-toc-enable: true x-toc-enable: true
4 4 ... ...
5 5
 
... ... all) platforms, coreboot *requires* certain
18 18 [vendor files](https://en.wikipedia.org/wiki/Binary_blob) [vendor files](https://en.wikipedia.org/wiki/Binary_blob)
19 19 for things like raminit. *All* boards currently supported by Libreboot can be for things like raminit. *All* boards currently supported by Libreboot can be
20 20 initialised entirely with *free*, *libre* or *open source* code from *coreboot* initialised entirely with *free*, *libre* or *open source* code from *coreboot*
21 itself, because Libreboot currently only focuses on such mainboards. Libreboot's
22 goal is to eventually support *all* mainboards from coreboot.
21 itself, because Libreboot currently only focuses on such motherboards. Libreboot's
22 goal is to eventually support *all* motherboards from coreboot.
23 23
24 24 A more *pragmatic* [binary blob reduction policy](news/policy.md) was adopted A more *pragmatic* [binary blob reduction policy](news/policy.md) was adopted
25 25 by Libreboot during November 2022, as part of an ongoing campaign to support by Libreboot during November 2022, as part of an ongoing campaign to support
 
... ... Intel platforms
65 65
66 66 ### Descriptor vs descriptorless setup ### Descriptor vs descriptorless setup
67 67
68 Libreboot supports several mainboards using Intel platforms. Of these, there
68 Libreboot supports several motherboards using Intel platforms. Of these, there
69 69 are essentially two class of machine (for the purposes of this article): are essentially two class of machine (for the purposes of this article):
70 70
71 71 * Descriptorless configuration * Descriptorless configuration
 
... ... documentation for this, but it has been tested. Example: Dual Intel/Nvidia
183 183 graphics on some ivybridge or haswell thinkpads. graphics on some ivybridge or haswell thinkpads.
184 184
185 185 For *add-on* GPUs, SeaBIOS (payload) can typically scan a VGA ROM present on For *add-on* GPUs, SeaBIOS (payload) can typically scan a VGA ROM present on
186 the card and execute it. This has been tested on certain desktop mainboards
186 the card and execute it. This has been tested on certain desktop motherboards
187 187 that Libreboot supports, and works just fine; Libreboot does not need to handle that Libreboot supports, and works just fine; Libreboot does not need to handle
188 188 these files at all. these files at all.
189 189
 
... ... and on Skylake/newer, FSP-M is used.
205 205 ARM platforms (chromebooks) ARM platforms (chromebooks)
206 206 --------------------------- ---------------------------
207 207
208 Mostly free software, except for the requirement on `daisy` and `peach` mainboards
208 Mostly free software, except for the requirement on `daisy` and `peach` motherboards
209 209 to include BL1 bootloader files from the vendor. These are: to include BL1 bootloader files from the vendor. These are:
210 210
211 211 * HP Chromebook 11 G1 (daisy-spring) **(board removed from Libreboot, due to * HP Chromebook 11 G1 (daisy-spring) **(board removed from Libreboot, due to
File site/index.de.md changed (mode: 100644) (index f9e96a8..2fe49ce)
... ... am 6 December 2024.
27 27 Siehe auch: [Libreboot 20241206 release announcement](news/libreboot20241206.md).** Siehe auch: [Libreboot 20241206 release announcement](news/libreboot20241206.md).**
28 28
29 29 Libreboot provides [GRUB](docs/linux/) and SeaBIOS payloads on x86/x86\_64 Libreboot provides [GRUB](docs/linux/) and SeaBIOS payloads on x86/x86\_64
30 Intel/AMD mainboards, and a [U-Boot UEFI payload](docs/uboot/) *for coreboot*
31 on ARM64(Aarch64) mainboards.
30 Intel/AMD motherboards, and a [U-Boot UEFI payload](docs/uboot/) *for coreboot*
31 on ARM64(Aarch64) motherboards.
32 32 An [x86/x86\_64 U-Boot UEFI payload](docs/uboot/uboot-x86.md) is also available An [x86/x86\_64 U-Boot UEFI payload](docs/uboot/uboot-x86.md) is also available
33 33 on some boards. The x86, x86\_64 and arm64 U-Boot payloads provide a lightweight on some boards. The x86, x86\_64 and arm64 U-Boot payloads provide a lightweight
34 34 UEFI boot implementation, which can boot many Linux distros and BSD systems. UEFI boot implementation, which can boot many Linux distros and BSD systems.
 
... ... Wie kann ich helfen
104 104
105 105 <img tabindex=1 class="r" style="max-width:25%;" src="https://av.libreboot.org/t1650/t1650_grub.jpg" /><span class="f"><img src="https://av.libreboot.org/t1650/t1650_grub.jpg" /></span> <img tabindex=1 class="r" style="max-width:25%;" src="https://av.libreboot.org/t1650/t1650_grub.jpg" /><span class="f"><img src="https://av.libreboot.org/t1650/t1650_grub.jpg" /></span>
106 106
107 Der beste Weg wie Du helfen kannst, ist das *hinzufügen* neuer Mainboards in
107 Der beste Weg wie Du helfen kannst, ist das *hinzufügen* neuer Motherboards in
108 108 Libreboot, indem Du eine Konfiguration zur Verfügung stellst. Alles was von Libreboot, indem Du eine Konfiguration zur Verfügung stellst. Alles was von
109 109 Coreboot unterstützt wird kann auch in Libreboot integriert werden, mithilfe Coreboot unterstützt wird kann auch in Libreboot integriert werden, mithilfe
110 110 von ROM Images in den Veröffentlichungen. Siehe auch: von ROM Images in den Veröffentlichungen. Siehe auch:
111 111
112 112 * [Bewerbe dich um Boards zu testen oder zu pflegen](docs/maintain/testing.md) * [Bewerbe dich um Boards zu testen oder zu pflegen](docs/maintain/testing.md)
113 * [Anleitung um neue Mainboards hinzuzufügen](docs/maintain/porting.md)
113 * [Anleitung um neue Motherboards hinzuzufügen](docs/maintain/porting.md)
114 114 * [Libreboot Build System Dokumentation](docs/maintain/) * [Libreboot Build System Dokumentation](docs/maintain/)
115 115
116 116 Zudem ist da noch Pflege des Build Systems (siehe oben), sowie *Dokumentation* Zudem ist da noch Pflege des Build Systems (siehe oben), sowie *Dokumentation*
File site/index.fr.md changed (mode: 100644) (index 8a220b0..460cbb8)
... ... Leah Rowe, fondateur et principal développeur du projet Libreboot, est égaleme
17 17 le 6 December 2024.** le 6 December 2024.**
18 18
19 19 Libreboot provides [GRUB](docs/linux/) and SeaBIOS payloads on x86/x86\_64 Libreboot provides [GRUB](docs/linux/) and SeaBIOS payloads on x86/x86\_64
20 Intel/AMD mainboards, and a [U-Boot UEFI payload](docs/uboot/) *for coreboot*
21 on ARM64(Aarch64) mainboards.
20 Intel/AMD motherboards, and a [U-Boot UEFI payload](docs/uboot/) *for coreboot*
21 on ARM64(Aarch64) motherboards.
22 22 An [x86/x86\_64 U-Boot UEFI payload](docs/uboot/uboot-x86.md) is also available An [x86/x86\_64 U-Boot UEFI payload](docs/uboot/uboot-x86.md) is also available
23 23 on some boards. The x86, x86\_64 and arm64 U-Boot payloads provide a lightweight on some boards. The x86, x86\_64 and arm64 U-Boot payloads provide a lightweight
24 24 UEFI boot implementation, which can boot many Linux distros and BSD systems. UEFI boot implementation, which can boot many Linux distros and BSD systems.
File site/index.it.md changed (mode: 100644) (index 6c934e0..042f9da)
... ... Minifree; sales provide funding for Libreboot.
24 24 Vedi: [Libreboot 20241206 annuncio di rilascio](news/libreboot20241206.md).** Vedi: [Libreboot 20241206 annuncio di rilascio](news/libreboot20241206.md).**
25 25
26 26 Libreboot provides [GRUB](docs/linux/) and SeaBIOS payloads on x86/x86\_64 Libreboot provides [GRUB](docs/linux/) and SeaBIOS payloads on x86/x86\_64
27 Intel/AMD mainboards, and a [U-Boot UEFI payload](docs/uboot/) *for coreboot*
28 on ARM64(Aarch64) mainboards.
27 Intel/AMD motherboards, and a [U-Boot UEFI payload](docs/uboot/) *for coreboot*
28 on ARM64(Aarch64) motherboards.
29 29 An [x86/x86\_64 U-Boot UEFI payload](docs/uboot/uboot-x86.md) is also available An [x86/x86\_64 U-Boot UEFI payload](docs/uboot/uboot-x86.md) is also available
30 30 on some boards. The x86, x86\_64 and arm64 U-Boot payloads provide a lightweight on some boards. The x86, x86\_64 and arm64 U-Boot payloads provide a lightweight
31 31 UEFI boot implementation, which can boot many Linux distros and BSD systems. UEFI boot implementation, which can boot many Linux distros and BSD systems.
File site/index.md changed (mode: 100644) (index 4640701..6b90aca)
... ... the boot flash; coreboot works with many payloads, which boot your operating
49 49 system e.g. Linux/BSD. system e.g. Linux/BSD.
50 50
51 51 Libreboot provides [GRUB](docs/linux/) and SeaBIOS payloads on x86/x86\_64 Libreboot provides [GRUB](docs/linux/) and SeaBIOS payloads on x86/x86\_64
52 Intel/AMD mainboards, and a [U-Boot UEFI payload](docs/uboot/) *for coreboot*
53 on ARM64(Aarch64) mainboards.
52 Intel/AMD motherboards, and a [U-Boot UEFI payload](docs/uboot/) *for coreboot*
53 on ARM64(Aarch64) motherboards.
54 54 An [x86/x86\_64 U-Boot UEFI payload](docs/uboot/uboot-x86.md) is also available An [x86/x86\_64 U-Boot UEFI payload](docs/uboot/uboot-x86.md) is also available
55 55 on some boards. The x86, x86\_64 and arm64 U-Boot payloads provide a lightweight on some boards. The x86, x86\_64 and arm64 U-Boot payloads provide a lightweight
56 56 UEFI boot implementation. Libreboot's [design](docs/maintain/) incorporates all UEFI boot implementation. Libreboot's [design](docs/maintain/) incorporates all
 
... ... you could pick one of these tasks and work on it.
148 148
149 149 <img tabindex=1 class="l" style="max-width:15%;" src="https://av.libreboot.org/hp8200sff/grub_open.jpg" /><span class="f"><img src="https://av.libreboot.org/hp8200sff/grub_open.jpg" /></span> <img tabindex=1 class="l" style="max-width:15%;" src="https://av.libreboot.org/hp8200sff/grub_open.jpg" /><span class="f"><img src="https://av.libreboot.org/hp8200sff/grub_open.jpg" /></span>
150 150
151 The *single* biggest way you can help is to *add* new mainboards in Libreboot,
151 The *single* biggest way you can help is to *add* new motherboards in Libreboot,
152 152 by submitting a config. Anything coreboot supports can be integrated in by submitting a config. Anything coreboot supports can be integrated in
153 153 Libreboot, with ROM images provided in releases. See: Libreboot, with ROM images provided in releases. See:
154 154
155 155 * [Apply to become a board maintainer/tester](docs/maintain/testing.md) * [Apply to become a board maintainer/tester](docs/maintain/testing.md)
156 * [Porting guide for new mainboards](docs/maintain/porting.md)
156 * [Porting guide for new motherboards](docs/maintain/porting.md)
157 157 * [Libreboot build system documentation](docs/maintain/) * [Libreboot build system documentation](docs/maintain/)
158 158
159 159 After that, there is build system maintenance (see above), and *documentation* After that, there is build system maintenance (see above), and *documentation*
File site/index.ru.md changed (mode: 100644) (index 567c9ac..56fdd19)
... ... x-toc-enable: true
14 14 *Мы* верим, что свобода [изучать, делиться, модифицировать и использовать программное обеспечение](https://writefreesoftware.org/) без каких-либо ограничений, является одним из основных человеческих прав, который должен иметь каждый. В этом контексте, *свобода программного обеспечения* важна. Ваша свобода важна. Образование важно. [Право на ремонт](https://en.wikipedia.org/wiki/Right_to_repair) важно; Libreboot позволяет вам продолжить использовать ваше оборудование. Вот *почему* Libreboot существует. *Мы* верим, что свобода [изучать, делиться, модифицировать и использовать программное обеспечение](https://writefreesoftware.org/) без каких-либо ограничений, является одним из основных человеческих прав, который должен иметь каждый. В этом контексте, *свобода программного обеспечения* важна. Ваша свобода важна. Образование важно. [Право на ремонт](https://en.wikipedia.org/wiki/Right_to_repair) важно; Libreboot позволяет вам продолжить использовать ваше оборудование. Вот *почему* Libreboot существует.
15 15
16 16 Libreboot provides [GRUB](docs/linux/) and SeaBIOS payloads on x86/x86\_64 Libreboot provides [GRUB](docs/linux/) and SeaBIOS payloads on x86/x86\_64
17 Intel/AMD mainboards, and a [U-Boot UEFI payload](docs/uboot/) *for coreboot*
18 on ARM64(Aarch64) mainboards.
17 Intel/AMD motherboards, and a [U-Boot UEFI payload](docs/uboot/) *for coreboot*
18 on ARM64(Aarch64) motherboards.
19 19 An [x86/x86\_64 U-Boot UEFI payload](docs/uboot/uboot-x86.md) is also available An [x86/x86\_64 U-Boot UEFI payload](docs/uboot/uboot-x86.md) is also available
20 20 on some boards. The x86, x86\_64 and arm64 U-Boot payloads provide a lightweight on some boards. The x86, x86\_64 and arm64 U-Boot payloads provide a lightweight
21 21 UEFI boot implementation, which can boot many Linux distros and BSD systems. UEFI boot implementation, which can boot many Linux distros and BSD systems.
File site/index.uk.md changed (mode: 100644) (index 1ab6118..e625718)
... ... Minifree; sales provide funding for Libreboot.
25 25 Дивіться: [Оголошення про випуск Libreboot 20241206](news/libreboot20241206.md).** Дивіться: [Оголошення про випуск Libreboot 20241206](news/libreboot20241206.md).**
26 26
27 27 Libreboot provides [GRUB](docs/linux/) and SeaBIOS payloads on x86/x86\_64 Libreboot provides [GRUB](docs/linux/) and SeaBIOS payloads on x86/x86\_64
28 Intel/AMD mainboards, and a [U-Boot UEFI payload](docs/uboot/) *for coreboot*
29 on ARM64(Aarch64) mainboards.
28 Intel/AMD motherboards, and a [U-Boot UEFI payload](docs/uboot/) *for coreboot*
29 on ARM64(Aarch64) motherboards.
30 30 An [x86/x86\_64 U-Boot UEFI payload](docs/uboot/uboot-x86.md) is also available An [x86/x86\_64 U-Boot UEFI payload](docs/uboot/uboot-x86.md) is also available
31 31 on some boards. The x86, x86\_64 and arm64 U-Boot payloads provide a lightweight on some boards. The x86, x86\_64 and arm64 U-Boot payloads provide a lightweight
32 32 UEFI boot implementation, which can boot many Linux distros and BSD systems. UEFI boot implementation, which can boot many Linux distros and BSD systems.
File site/index.zh-cn.md changed (mode: 100644) (index ac0bac5..a9386e8)
... ... Libreboot 的创始人和主要开发者,Leah Rowe,也是 Minifree 的所有
15 15 **新版发布: 最新版本 Libreboot 20241206 已在 2024 年 12 月 06 日发布。详见: [Libreboot 20241206 发布公告](news/libreboot20241206.md).** **新版发布: 最新版本 Libreboot 20241206 已在 2024 年 12 月 06 日发布。详见: [Libreboot 20241206 发布公告](news/libreboot20241206.md).**
16 16
17 17 Libreboot provides [GRUB](docs/linux/) and SeaBIOS payloads on x86/x86\_64 Libreboot provides [GRUB](docs/linux/) and SeaBIOS payloads on x86/x86\_64
18 Intel/AMD mainboards, and a [U-Boot UEFI payload](docs/uboot/) *for coreboot*
19 on ARM64(Aarch64) mainboards.
18 Intel/AMD motherboards, and a [U-Boot UEFI payload](docs/uboot/) *for coreboot*
19 on ARM64(Aarch64) motherboards.
20 20 An [x86/x86\_64 U-Boot UEFI payload](docs/uboot/uboot-x86.md) is also available An [x86/x86\_64 U-Boot UEFI payload](docs/uboot/uboot-x86.md) is also available
21 21 on some boards. The x86, x86\_64 and arm64 U-Boot payloads provide a lightweight on some boards. The x86, x86\_64 and arm64 U-Boot payloads provide a lightweight
22 22 UEFI boot implementation, which can boot many Linux distros and BSD systems. UEFI boot implementation, which can boot many Linux distros and BSD systems.
File site/news/10.md changed (mode: 100644) (index b60b371..9402cb3)
... ... project.
982 982
983 983 Osboot greatly improved the configurability of everything. For example, it Osboot greatly improved the configurability of everything. For example, it
984 984 enabled you to more easily mix and match different payload combinations per enabled you to more easily mix and match different payload combinations per
985 mainboard, whereas the Libreboot 20160907 design only allowed *one* payload
985 motherboard, whereas the Libreboot 20160907 design only allowed *one* payload
986 986 type, per target, and it contained a lot of target-specific logic that was type, per target, and it contained a lot of target-specific logic that was
987 987 hardcoded, baked into the build system's design - even in December 2020 when hardcoded, baked into the build system's design - even in December 2020 when
988 988 osboot started, I envisioned that it would one day support many more boards, osboot started, I envisioned that it would one day support many more boards,
989 whereas Libreboot only supported like 15 mainboards in 2016.
989 whereas Libreboot only supported like 15 motherboards in 2016.
990 990
991 991 The osboot redesign, relative to Libreboot 20160907, made handling of source The osboot redesign, relative to Libreboot 20160907, made handling of source
992 992 tree revisions and patches much cleaner, especially for multi-tree projects tree revisions and patches much cleaner, especially for multi-tree projects
993 like coreboot, where multiple revisions could be used depending on mainboard.
993 like coreboot, where multiple revisions could be used depending on motherboard.
994 994
995 995 Of course, the first osboot revision also updated to a modern coreboot Of course, the first osboot revision also updated to a modern coreboot
996 996 revision at that time, which (in that month, December 2020) was revision at that time, which (in that month, December 2020) was
 
... ... Nowadays, that is completely [automated](../docs/install/ivy_has_common.md),
1187 1187 based on initial work done in osboot by Caleb La Grange. Caleb adapted logic based on initial work done in osboot by Caleb La Grange. Caleb adapted logic
1188 1188 from Heads that extracts Intel ME images from Lenovo UEFI firmware updates, from Heads that extracts Intel ME images from Lenovo UEFI firmware updates,
1189 1189 thus eliminating the need for vendor firmware dumps prior to flashing; though, thus eliminating the need for vendor firmware dumps prior to flashing; though,
1190 backing up the factory firmware is still recommended, on any mainboard.
1190 backing up the factory firmware is still recommended, on any motherboard.
1191 1191
1192 1192 I later expanded Caleb's work, making the logic much more generic, expandable I later expanded Caleb's work, making the logic much more generic, expandable
1193 1193 more easily to other boards/vendors and platforms. I also added support for more easily to other boards/vendors and platforms. I also added support for
File site/news/audit2.md changed (mode: 100644) (index e0c8b31..17bb9d5)
... ... improved greatly. The same care has been given to documentation aswell.
22 22 Many bugs have been fixed, and the Libreboot build system (lbmk) is generally Many bugs have been fixed, and the Libreboot build system (lbmk) is generally
23 23 much more efficient now, compared to the Libreboot 20230625 release. The main much more efficient now, compared to the Libreboot 20230625 release. The main
24 24 focus has been this audit, now concluded, and the next focus shall once again focus has been this audit, now concluded, and the next focus shall once again
25 be adding more mainboards to Libreboot, with a view to making a full new release
25 be adding more motherboards to Libreboot, with a view to making a full new release
26 26 some time during September 2023. some time during September 2023.
27 27
28 28 Before diving into details, here is a brief summary of the recent audit, and Before diving into details, here is a brief summary of the recent audit, and
 
... ... exhaustive:
96 96 * A lot of scripts have been removed entirely, and their logic not replaced; * A lot of scripts have been removed entirely, and their logic not replaced;
97 97 in many cases, Libreboot's build system contained logic that had gone unused in many cases, Libreboot's build system contained logic that had gone unused
98 98 for many years. for many years.
99 * More reliable configs now used on desktop mainboards: SeaBIOS-only for start,
99 * More reliable configs now used on desktop motherboards: SeaBIOS-only for start,
100 100 but GRUB still available where feasible (in the SeaBIOS menu). This makes it but GRUB still available where feasible (in the SeaBIOS menu). This makes it
101 101 more fool proof for a user who might use integrated graphics and then switch more fool proof for a user who might use integrated graphics and then switch
102 102 to a graphics card; the very same images will work. to a graphics card; the very same images will work.
 
... ... FULL list of changes (from lbmk git log)
115 115
116 116 Almost all of the changes are post-20230625 release, and almost all of them Almost all of the changes are post-20230625 release, and almost all of them
117 117 are audit-related, so I've simply pasted every commit between the last release are audit-related, so I've simply pasted every commit between the last release
118 and now. A few of them, e.g. the new mainboard ports, are not audited-related.
118 and now. A few of them, e.g. the new motherboard ports, are not audited-related.
119 119
120 120 Entries that give time frames such as *"14 hours ago"* are relative to Entries that give time frames such as *"14 hours ago"* are relative to
121 121 today, 11 September 2023, at some time around 3PM UK time. Changes on top are today, 11 September 2023, at some time around 3PM UK time. Changes on top are
 
... ... newer, and changes further down are older:
135 135 * d28ad6aa - build/release/roms: use -T0 on serprog tarballs (23 hours ago) <Leah Rowe> * d28ad6aa - build/release/roms: use -T0 on serprog tarballs (23 hours ago) <Leah Rowe>
136 136 * 308c21dd - build/boot/roms stragglers: properly handle errors (23 hours ago) <Leah Rowe> * 308c21dd - build/boot/roms stragglers: properly handle errors (23 hours ago) <Leah Rowe>
137 137 * c16b28ef - build/release/src: re-create symlinks, don't copy (2 days ago) <Leah Rowe> * c16b28ef - build/release/src: re-create symlinks, don't copy (2 days ago) <Leah Rowe>
138 * 32dcf9e5 - coreboot/qemu_x86_12mb: re-add this mainboard (2 days ago) <Leah Rowe>
138 * 32dcf9e5 - coreboot/qemu_x86_12mb: re-add this motherboard (2 days ago) <Leah Rowe>
139 139 * 5aef8156 - scripts: use printf, not echo, where appropriate (2 days ago) <Leah Rowe> * 5aef8156 - scripts: use printf, not echo, where appropriate (2 days ago) <Leah Rowe>
140 140 * 76e12cd4 - update/blobs printf statements: use double quotes (2 days ago) <Leah Rowe> * 76e12cd4 - update/blobs printf statements: use double quotes (2 days ago) <Leah Rowe>
141 141 * 84bf47b5 - scripts: better handling of printf: stdout/stderr (2 days ago) <Leah Rowe> * 84bf47b5 - scripts: better handling of printf: stdout/stderr (2 days ago) <Leah Rowe>
 
... ... newer, and changes further down are older:
184 184 * da3c9bb3 - merge config/ and resources/ (8 days ago) <Leah Rowe> * da3c9bb3 - merge config/ and resources/ (8 days ago) <Leah Rowe>
185 185 * a0501050 - blobs/download: don't handle ifd/gbe files (8 days ago) <Leah Rowe> * a0501050 - blobs/download: don't handle ifd/gbe files (8 days ago) <Leah Rowe>
186 186 * 03788d14 - move ifd/gbe configs into config/ifd/ (8 days ago) <Leah Rowe> * 03788d14 - move ifd/gbe configs into config/ifd/ (8 days ago) <Leah Rowe>
187 * 6ddb0e09 - run make oldconfig on coreboot/default mainboards (8 days ago) <Leah Rowe>
188 * 19efdf9e - ich9m mainboards: use pre-assembled ifd/gbe files (8 days ago) <Leah Rowe>
187 * 6ddb0e09 - run make oldconfig on coreboot/default motherboards (8 days ago) <Leah Rowe>
188 * 19efdf9e - ich9m motherboards: use pre-assembled ifd/gbe files (8 days ago) <Leah Rowe>
189 189 * af8d8cda - add ich9m ifd/gbe files (8 days ago) <Leah Rowe> * af8d8cda - add ich9m ifd/gbe files (8 days ago) <Leah Rowe>
190 190 * d554efae - build/release/src: copy e6430 ifd/gbe (8 days ago) <Leah Rowe> * d554efae - build/release/src: copy e6430 ifd/gbe (8 days ago) <Leah Rowe>
191 191 * 09aae7be - build/rpi-pico-serprog: better error handling (8 days ago) <Leah Rowe> * 09aae7be - build/rpi-pico-serprog: better error handling (8 days ago) <Leah Rowe>
File site/news/audit3.md changed (mode: 100644) (index 45ae5b1..83d4949)
... ... are also repeated below but in more detail:
121 121 * All helper scripts are now under `include/`, and main scripts in `script/`, * All helper scripts are now under `include/`, and main scripts in `script/`,
122 122 called by the main `build` script called by the main `build` script
123 123 * Intel ME extraction is now provided in one function, instead of two, when * Intel ME extraction is now provided in one function, instead of two, when
124 downloading vendor files per mainboard, before running it
124 downloading vendor files per motherboard, before running it
125 125 through `me_cleaner` through `me_cleaner`
126 126 * Unified checking of the destination file, when downloading vendor updates. * Unified checking of the destination file, when downloading vendor updates.
127 127 This results in more reliable checking of whether a vendor file has already This results in more reliable checking of whether a vendor file has already
 
... ... are also repeated below but in more detail:
164 164 * SECURITY: Use sha512sum (not sha1sum) when verifying certain downloads. This * SECURITY: Use sha512sum (not sha1sum) when verifying certain downloads. This
165 165 reduces the chance for collisions, during checksum verification. reduces the chance for collisions, during checksum verification.
166 166 * Set GRUB timout to 5s by default, but allow override and set to 10s or 15s * Set GRUB timout to 5s by default, but allow override and set to 10s or 15s
167 on some mainboards.
167 on some motherboards.
168 168 * Vendor scripts: don't use `/tmp` for ROM images when inserting vendor files. * Vendor scripts: don't use `/tmp` for ROM images when inserting vendor files.
169 169 In case `/tmp` is a tmpfs and not much RAM is available, it is paramount that In case `/tmp` is a tmpfs and not much RAM is available, it is paramount that
170 170 the user's file system is used instead, where there is likely greater capacity; the user's file system is used instead, where there is likely greater capacity;
 
... ... The commits are, thus:
635 635 * d28ad6aa build/release/roms: use -T0 on serprog tarballs * d28ad6aa build/release/roms: use -T0 on serprog tarballs
636 636 * 308c21dd build/boot/roms stragglers: properly handle errors * 308c21dd build/boot/roms stragglers: properly handle errors
637 637 * c16b28ef build/release/src: re-create symlinks, don't copy * c16b28ef build/release/src: re-create symlinks, don't copy
638 * 32dcf9e5 coreboot/qemu_x86_12mb: re-add this mainboard
638 * 32dcf9e5 coreboot/qemu_x86_12mb: re-add this motherboard
639 639 * 5aef8156 scripts: use printf, not echo, where appropriate * 5aef8156 scripts: use printf, not echo, where appropriate
640 640 * 76e12cd4 update/blobs printf statements: use double quotes * 76e12cd4 update/blobs printf statements: use double quotes
641 641 * 84bf47b5 scripts: better handling of printf: stdout/stderr * 84bf47b5 scripts: better handling of printf: stdout/stderr
 
... ... The commits are, thus:
684 684 * da3c9bb3 merge config/ and resources/ * da3c9bb3 merge config/ and resources/
685 685 * a0501050 blobs/download: don't handle ifd/gbe files * a0501050 blobs/download: don't handle ifd/gbe files
686 686 * 03788d14 move ifd/gbe configs into config/ifd/ * 03788d14 move ifd/gbe configs into config/ifd/
687 * 6ddb0e09 run make oldconfig on coreboot/default mainboards
688 * 19efdf9e ich9m mainboards: use pre-assembled ifd/gbe files
687 * 6ddb0e09 run make oldconfig on coreboot/default motherboards
688 * 19efdf9e ich9m motherboards: use pre-assembled ifd/gbe files
689 689 * af8d8cda add ich9m ifd/gbe files * af8d8cda add ich9m ifd/gbe files
690 690 * d554efae build/release/src: copy e6430 ifd/gbe * d554efae build/release/src: copy e6430 ifd/gbe
691 691 * 09aae7be build/rpi-pico-serprog: better error handling * 09aae7be build/rpi-pico-serprog: better error handling
File site/news/audit4.md changed (mode: 100644) (index 128f20d..f554e5d)
... ... And now, specific changes:
81 81 * `script/build/serprog`: Return error status (exit) if basename fails, when * `script/build/serprog`: Return error status (exit) if basename fails, when
82 82 processing various board targets available on stm32/rp2040 projects. Patch processing various board targets available on stm32/rp2040 projects. Patch
83 83 courtesy of Leah Rowe. courtesy of Leah Rowe.
84 * **NEW BOARD:** HP 8300 CMT mainboard, added by Riku Viitanen, who worked
84 * **NEW BOARD:** HP 8300 CMT motherboard, added by Riku Viitanen, who worked
85 85 on it with a tester in the IRC channel. on it with a tester in the IRC channel.
86 86 * Fixed implicit typecasting bug on flashprog 1.2 source code, thus preventing * Fixed implicit typecasting bug on flashprog 1.2 source code, thus preventing
87 87 a build issue (tested on Debian 12.2). Patch courtesy of Leah Rowe. a build issue (tested on Debian 12.2). Patch courtesy of Leah Rowe.
File site/news/audit5.md changed (mode: 100644) (index 126cb98..b0f04ae)
... ... Changes are in order per category, from newest to oldest:
101 101 * **GRUB is now a multi-tree project.** Each given coreboot target can * **GRUB is now a multi-tree project.** Each given coreboot target can
102 102 specify which GRUB tree it wants to use, each containing its own revision specify which GRUB tree it wants to use, each containing its own revision
103 103 and patches, with its own GRUB configuration file. This can be used later on and patches, with its own GRUB configuration file. This can be used later on
104 to provide specific optimisations on each given mainboard, but it is used
104 to provide specific optimisations on each given motherboard, but it is used
105 105 at present to exclude xHCI patches on boards that don't need it; please also at present to exclude xHCI patches on boards that don't need it; please also
106 106 read the bugfix section (of this audit report) pertaining to this same topic, read the bugfix section (of this audit report) pertaining to this same topic,
107 for more context. Before this change was implemented, all mainboards used
107 for more context. Before this change was implemented, all motherboards used
108 108 the exact same GRUB revision, with the same patches and the same config. the exact same GRUB revision, with the same patches and the same config.
109 109 * grub.cfg: scan `grub2/` last, on each given device/partition; this speeds * grub.cfg: scan `grub2/` last, on each given device/partition; this speeds
110 110 up the boot time in most tests, because most setups use `grub/`, up the boot time in most tests, because most setups use `grub/`,
 
... ... Changes are in order per category, from newest to oldest:
138 138 * script/roms: Allow to override `grub_scan_disk` via `-s`, for * script/roms: Allow to override `grub_scan_disk` via `-s`, for
139 139 example: `./build roms -s nvme t1650_12mb` example: `./build roms -s nvme t1650_12mb`
140 140 * **grub.cfg: Use `grub_scan_disk` to set boot order (rather, boot order by * **grub.cfg: Use `grub_scan_disk` to set boot order (rather, boot order by
141 device type).** It is possible now to configure each mainboard with this
141 device type).** It is possible now to configure each motherboard with this
142 142 variable, so that certain types of devices are scanned in a precise order; variable, so that certain types of devices are scanned in a precise order;
143 143 for example, scan NVMe SSDs first. for example, scan NVMe SSDs first.
144 144 * **include/git.sh: Allow manual override of `git submodule` handling**, instead * **include/git.sh: Allow manual override of `git submodule` handling**, instead
 
... ... Changes are in order per category, from newest to oldest:
153 153 later changed so as to be the ONLY method for downloading submodules, skipping later changed so as to be the ONLY method for downloading submodules, skipping
154 154 the actual git-submodule-update command entirely, on all projects.* the actual git-submodule-update command entirely, on all projects.*
155 155 * **Native NVMe driver added to the GRUB payload**, allowing users to boot from * **Native NVMe driver added to the GRUB payload**, allowing users to boot from
156 NVMe SSDs where present on a given mainboard. The patch is courtesy of
156 NVMe SSDs where present on a given motherboard. The patch is courtesy of
157 157 Mate Kukri, who ported SeaBIOS's own NVMe driver, converting all of the Mate Kukri, who ported SeaBIOS's own NVMe driver, converting all of the
158 158 code to run properly within GRUB's own kernel. NVMe SSDs are now fully code to run properly within GRUB's own kernel. NVMe SSDs are now fully
159 159 bootable on all machines that can have them, offering vastly superior bootable on all machines that can have them, offering vastly superior
 
... ... The changes are, from newest to earliest:
297 297 one you're reading about now so that they can be fixed, like this one was!) one you're reading about now so that they can be fixed, like this one was!)
298 298 * **Re-configured GRUB so that only the Haswell and Broadwell machines contain * **Re-configured GRUB so that only the Haswell and Broadwell machines contain
299 299 xHCI support**, where it doesn't cause any issues (and is required), while xHCI support**, where it doesn't cause any issues (and is required), while
300 other mainboards use a version of GRUB that lacks support for xHCI. This is a
300 other motherboards use a version of GRUB that lacks support for xHCI. This is a
301 301 mitigations against the bug reported in [lbmk mitigations against the bug reported in [lbmk
302 302 issue 216](https://codeberg.org/libreboot/lbmk/issues/216). This is done, by issue 216](https://codeberg.org/libreboot/lbmk/issues/216). This is done, by
303 303 using the new *multi-tree* GRUB handling, which is mentioned above in using the new *multi-tree* GRUB handling, which is mentioned above in
304 304 in the section (of this audit report) pertaining to *feature changes*, whereby in the section (of this audit report) pertaining to *feature changes*, whereby
305 each mainboard can have its own GRUB revisions and patches, with its own
305 each motherboard can have its own GRUB revisions and patches, with its own
306 306 GRUB configuration file (that could be uniquely optimised for it). GRUB configuration file (that could be uniquely optimised for it).
307 307 * **Fix vboot build issue when running lbmk in i686 (32-bit) host machines**. * **Fix vboot build issue when running lbmk in i686 (32-bit) host machines**.
308 308 The patch, courtesy of *Luke T. Schumaker*, adapts vboot's vmlinuz extract The patch, courtesy of *Luke T. Schumaker*, adapts vboot's vmlinuz extract
 
... ... The changes are, from newest to earliest:
346 346 supported a configuration whereby SeaBIOS reads a `bootorder` file in CBFS, supported a configuration whereby SeaBIOS reads a `bootorder` file in CBFS,
347 347 making it try to run the GRUB payload first, while still allowing you to making it try to run the GRUB payload first, while still allowing you to
348 348 interrupt by pressing ESC to bring up an alternative boot select menu. This interrupt by pressing ESC to bring up an alternative boot select menu. This
349 is now the *default*, on all x86 mainboards. This is a mitigation against
349 is now the *default*, on all x86 motherboards. This is a mitigation against
350 350 future instability in GRUB because, if such issues happen again, it will not future instability in GRUB because, if such issues happen again, it will not
351 351 cause a brick since you can just use SeaBIOS instead, and skip booting to cause a brick since you can just use SeaBIOS instead, and skip booting to
352 352 the GRUB payload (on the affected machines, BIOS GRUB still worked, which the GRUB payload (on the affected machines, BIOS GRUB still worked, which
353 353 your distro provides and SeaBIOS executes it). *NOTE: GRUB was later made your distro provides and SeaBIOS executes it). *NOTE: GRUB was later made
354 into a multi-tree project, with certain mainboards using a version that
354 into a multi-tree project, with certain motherboards using a version that
355 355 has the xHCI patches, if required, because the machines that actually need has the xHCI patches, if required, because the machines that actually need
356 356 xHCI support were not affected by the bug referenced in issue 216.* xHCI support were not affected by the bug referenced in issue 216.*
357 357 * Main build script: Check SUID before checking Git name/email, otherwise the * Main build script: Check SUID before checking Git name/email, otherwise the
File site/news/audit6.md changed (mode: 100644) (index 9bb3d93..75544c6)
... ... will be new payloads and boards, in addition to testing newer upstream revisions
62 62 of projects such as coreboot, on every machine supported by Libreboot. A release of projects such as coreboot, on every machine supported by Libreboot. A release
63 63 is planned for early August 2024. is planned for early August 2024.
64 64
65 A *lot* of work on new ports is planned. There are a number of new mainboards
65 A *lot* of work on new ports is planned. There are a number of new motherboards
66 66 that will be available, in the next Libreboot release. that will be available, in the next Libreboot release.
67 67
68 68 Summarised list of changes Summarised list of changes
 
... ... The changes are as follows:
97 97 enabling `CONFIG_PAYLOAD_NONE` exclusively. However, advanced users may enabling `CONFIG_PAYLOAD_NONE` exclusively. However, advanced users may
98 98 wish to use something else such as Tianocore, which Libreboot may/will not wish to use something else such as Tianocore, which Libreboot may/will not
99 99 provide (with Tianocore it's **will not**). Simply set `build_depend=""` provide (with Tianocore it's **will not**). Simply set `build_depend=""`
100 in the `target.cfg` file for a given mainboard, and then enable a payload
100 in the `target.cfg` file for a given motherboard, and then enable a payload
101 101 under coreboot's menuconfig interface, or by direct modification of under coreboot's menuconfig interface, or by direct modification of
102 102 the defconfig file. When `CONFIG_PAYLOAD_NONE` is not set, lbmk will skip the defconfig file. When `CONFIG_PAYLOAD_NONE` is not set, lbmk will skip
103 103 adding a payload, because it's a given that then coreboot's own build system adding a payload, because it's a given that then coreboot's own build system
 
... ... The changes are as follows:
146 146 downloading of vendor files, without needing specific hacks to be hardcoded downloading of vendor files, without needing specific hacks to be hardcoded
147 147 in `script/trees`. The `./update trees -b coreboot TREE utils` command is in `script/trees`. The `./update trees -b coreboot TREE utils` command is
148 148 no longer available; instead, do `./update trees -d coreboot TREE`; if no longer available; instead, do `./update trees -d coreboot TREE`; if
149 the TREE argument is instead an actual mainboard target, it also does the
149 the TREE argument is instead an actual motherboard target, it also does the
150 150 vendor file download, if required. The `./vendor download` command is still vendor file download, if required. The `./vendor download` command is still
151 151 available, and multiple board names can now be provided as argument, because available, and multiple board names can now be provided as argument, because
152 152 for example, `./build roms x220_8mb x230_12mb` would for example, `./build roms x220_8mb x230_12mb` would
 
... ... The changes are as follows:
203 203 single-tree projects, defined *by argument*, but it was quite error prone single-tree projects, defined *by argument*, but it was quite error prone
204 204 and there's no clean way to otherwise do it. We don't use the script this and there's no clean way to otherwise do it. We don't use the script this
205 205 way, anywhere in lbmk, and users are advised the same. way, anywhere in lbmk, and users are advised the same.
206 * **`script/roms`: *Only* Support SeaBIOS and Sea*GRUB*, on x86 mainboards**.
206 * **`script/roms`: *Only* Support SeaBIOS and Sea*GRUB*, on x86 motherboards**.
207 207 SeaGRUB is a configuration whereby SeaBIOS starts first, but immediately tries SeaGRUB is a configuration whereby SeaBIOS starts first, but immediately tries
208 208 to load GRUB from the flash. This complements the other change, listed below. to load GRUB from the flash. This complements the other change, listed below.
209 209 We will no longer provide configurations where GRUB is the primary payload, We will no longer provide configurations where GRUB is the primary payload,
210 210 precisely to mitigate the same issue as described below (lbmk issue 216). precisely to mitigate the same issue as described below (lbmk issue 216).
211 If *GRUB* is enabled, on a given mainboard, SeaBIOS-only setups are not
211 If *GRUB* is enabled, on a given motherboard, SeaBIOS-only setups are not
212 212 provided; only SeaGRUB is provided. You can press ESC in the SeaGRUB menu, provided; only SeaGRUB is provided. You can press ESC in the SeaGRUB menu,
213 213 to access other boot methods besides *GRUB from flash*, so you can use it to access other boot methods besides *GRUB from flash*, so you can use it
214 214 in the same way; additionally, you can remove the `bootorder` file from CBFS in the same way; additionally, you can remove the `bootorder` file from CBFS
 
... ... The changes are as follows:
269 269 This mkhelper config also integrates `include/rom.sh`, containing these This mkhelper config also integrates `include/rom.sh`, containing these
270 270 functions. This replicates the functionality originally provided functions. This replicates the functionality originally provided
271 271 by `script/roms`. by `script/roms`.
272 * coreboot: Set `build_depend` on `target.cfg` files for specific mainboards.
272 * coreboot: Set `build_depend` on `target.cfg` files for specific motherboards.
273 273 This is used to manually specify which GRUB and SeaBIOS trees should be This is used to manually specify which GRUB and SeaBIOS trees should be
274 274 compiled, required when compiling for a specific target, for the next compiled, required when compiling for a specific target, for the next
275 275 stage where a payload is added to the coreboot image, because lbmk does stage where a payload is added to the coreboot image, because lbmk does
File site/news/e6400nvidia.md changed (mode: 100644) (index c5d5107..c52c170)
... ... build lbmk from source, and it gets inserted automatically via download. The
11 11 same ROM, if it contains the Nvidia VGA ROM, supports both variants; if the VGA same ROM, if it contains the Nvidia VGA ROM, supports both variants; if the VGA
12 12 ROM is missing, then only the Intel GPU variant is supported. The same ROM ROM is missing, then only the Intel GPU variant is supported. The same ROM
13 13 will work on both variants, provided for by Libreboot patching the devicetree will work on both variants, provided for by Libreboot patching the devicetree
14 in coreboot, on this mainboard.**
14 in coreboot, on this motherboard.**
15 15
16 16 <img tabindex=1 class="r" style="max-width:35%" src="https://av.libreboot.org/e6400/e6400xfr-seabios.jpg" /><span class="f"><img src="https://av.libreboot.org/e6400/e6400xfr-seabios.jpg" /></span> <img tabindex=1 class="r" style="max-width:35%" src="https://av.libreboot.org/e6400/e6400xfr-seabios.jpg" /><span class="f"><img src="https://av.libreboot.org/e6400/e6400xfr-seabios.jpg" /></span>
17 17
File site/news/freedom.md changed (mode: 100644) (index 361f140..8894876)
... ... of the community, about what the policy means in practise.
19 19
20 20 Refer here to the new article, thus: Refer here to the new article, thus:
21 21
22 [Software and hardware freedom status for each mainboard supported by
22 [Software and hardware freedom status for each motherboard supported by
23 23 Libreboot](../freedom-status.md) Libreboot](../freedom-status.md)
24 24
25 25 The article describes, in great detail, the current status of licensing for The article describes, in great detail, the current status of licensing for
 
... ... Also, a new version of Libreboot was *released* yesterday. See:
47 47 It made several major fixes, and massively updated the revisions for each It made several major fixes, and massively updated the revisions for each
48 48 part used in ROM images (containing coreboot, GRUB and SeaBIOS). part used in ROM images (containing coreboot, GRUB and SeaBIOS).
49 49
50 I have a bunch of mainboards that I'm working on, and I hope to make another
50 I have a bunch of motherboards that I'm working on, and I hope to make another
51 51 release available as soon as possible. My priority for the next Libreboot release available as soon as possible. My priority for the next Libreboot
52 52 release is to add as many new boards as possible from coreboot, with minimal release is to add as many new boards as possible from coreboot, with minimal
53 53 changes to the build system itself; another focus this time is on improvements changes to the build system itself; another focus this time is on improvements
54 54 to the documentation. Several installation guides are missing, for example, on to the documentation. Several installation guides are missing, for example, on
55 specific mainboards.
55 specific motherboards.
56 56
57 57 Specifically, I have focus on some AMD platforms, Intel sandybridge/ivybridge, Specifically, I have focus on some AMD platforms, Intel sandybridge/ivybridge,
58 58 Intel Haswell and (more) GM45 platforms. Several boards exist in coreboot that Intel Haswell and (more) GM45 platforms. Several boards exist in coreboot that
File site/news/hp820g2.md changed (mode: 100644) (index 33a60a5..6eda589)
... ... This is a nice portable machine, with very reasonable performance. Most people
43 43 should be very satisfied with it, in daily use. It is widely available in should be very satisfied with it, in daily use. It is widely available in
44 44 online market places. This page will tell you how to flash it! online market places. This page will tell you how to flash it!
45 45
46 All variants of this mainboard will come with Intel HD 5500 graphics, which has
46 All variants of this motherboard will come with Intel HD 5500 graphics, which has
47 47 completely free software initialisation in coreboot, provided by *libgfxinit*. completely free software initialisation in coreboot, provided by *libgfxinit*.
48 48
49 49 How to install Libreboot How to install Libreboot
File site/news/libreboot20140911.md changed (mode: 100644) (index 408c7ad..566f5d8)
26 26 digitizer support digitizer support
27 27 - See **hardware/\#supported\_x60t\_list** for list of supported LCD - See **hardware/\#supported\_x60t\_list** for list of supported LCD
28 28 panels panels
29 - It is unknown whether an X61 Tablet can have its mainboard
29 - It is unknown whether an X61 Tablet can have its motherboard
30 30 replaced with an X60 Tablet motherboard. replaced with an X60 Tablet motherboard.
31 31 - **Lenovo ThinkPad T60** (Intel GPU) (there are issues; see below) - **Lenovo ThinkPad T60** (Intel GPU) (there are issues; see below)
32 32 - See notes below for exceptions, and - See notes below for exceptions, and
33 33 **hardware/\#supported\_t60\_list** for known working LCD panels. **hardware/\#supported\_t60\_list** for known working LCD panels.
34 - It is unknown whether a T61 can have its mainboard replaced with
34 - It is unknown whether a T61 can have its motherboard replaced with
35 35 a T60 motherboard. a T60 motherboard.
36 36 - T60p (and T60 variants with ATI GPU) will likely never be supported: - T60p (and T60 variants with ATI GPU) will likely never be supported:
37 37 **hardware/\#t60\_ati\_intel** **hardware/\#t60\_ati\_intel**
File site/news/libreboot20141015.md changed (mode: 100644) (index d7e9087..06e2f27)
... ... Machines supported in this release:
13 13 digitizer support digitizer support
14 14 - See **hardware/\#supported\_x60t\_list** for list of supported LCD - See **hardware/\#supported\_x60t\_list** for list of supported LCD
15 15 panels panels
16 - It is unknown whether an X61 Tablet can have its mainboard
16 - It is unknown whether an X61 Tablet can have its motherboard
17 17 replaced with an X60 Tablet motherboard. replaced with an X60 Tablet motherboard.
18 18 - **Lenovo ThinkPad T60** (Intel GPU) (there are issues; see below): - **Lenovo ThinkPad T60** (Intel GPU) (there are issues; see below):
19 19 - See notes below for exceptions, and - See notes below for exceptions, and
20 20 **hardware/\#supported\_t60\_list** for known working LCD panels. **hardware/\#supported\_t60\_list** for known working LCD panels.
21 - It is unknown whether a T61 can have its mainboard replaced with
21 - It is unknown whether a T61 can have its motherboard replaced with
22 22 a T60 motherboard. a T60 motherboard.
23 23 - See **future/\#t60\_cpu\_microcode**. - See **future/\#t60\_cpu\_microcode**.
24 24 - T60p (and T60 variants with ATI GPU) will likely never be supported: - T60p (and T60 variants with ATI GPU) will likely never be supported:
File site/news/libreboot20150124.md changed (mode: 100644) (index b051942..a2d3814)
... ... Machines supported in this release:
13 13 digitizer support digitizer support
14 14 - See **hardware/\#supported\_x60t\_list** for list of supported LCD - See **hardware/\#supported\_x60t\_list** for list of supported LCD
15 15 panels panels
16 - It is unknown whether an X61 Tablet can have it's mainboard
16 - It is unknown whether an X61 Tablet can have it's motherboard
17 17 replaced with an X60 Tablet motherboard. replaced with an X60 Tablet motherboard.
18 18 - **Lenovo ThinkPad T60** (Intel GPU) (there are - **Lenovo ThinkPad T60** (Intel GPU) (there are
19 19 issuesinstall/x200\_external.html; see below): issuesinstall/x200\_external.html; see below):
20 20 - See notes below for exceptions, and - See notes below for exceptions, and
21 21 **hardware/\#supported\_t60\_list** for known working LCD panels. **hardware/\#supported\_t60\_list** for known working LCD panels.
22 - It is unknown whether a T61 can have it's mainboard replaced
22 - It is unknown whether a T61 can have it's motherboard replaced
23 23 with a T60 motherboard. with a T60 motherboard.
24 24 - See **future/\#t60\_cpu\_microcode**. - See **future/\#t60\_cpu\_microcode**.
25 25 - T60p (and T60 laptops with ATI GPU) will likely never be - T60p (and T60 laptops with ATI GPU) will likely never be
File site/news/libreboot20150126.md changed (mode: 100644) (index f419ea1..25a0f0e)
... ... Machines supported in this release:
13 13 digitizer support digitizer support
14 14 - See **hardware/\#supported\_x60t\_list** for list of supported LCD - See **hardware/\#supported\_x60t\_list** for list of supported LCD
15 15 panels panels
16 - It is unknown whether an X61 Tablet can have it's mainboard
16 - It is unknown whether an X61 Tablet can have it's motherboard
17 17 replaced with an X60 Tablet motherboard. replaced with an X60 Tablet motherboard.
18 18 - **Lenovo ThinkPad T60** (Intel GPU) (there are - **Lenovo ThinkPad T60** (Intel GPU) (there are
19 19 issuesinstall/x200\_external.html; see below): issuesinstall/x200\_external.html; see below):
20 20 - See notes below for exceptions, and - See notes below for exceptions, and
21 21 **hardware/\#supported\_t60\_list** for known working LCD panels. **hardware/\#supported\_t60\_list** for known working LCD panels.
22 - It is unknown whether a T61 can have it's mainboard replaced
22 - It is unknown whether a T61 can have it's motherboard replaced
23 23 with a T60 motherboard. with a T60 motherboard.
24 24 - See **future/\#t60\_cpu\_microcode**. - See **future/\#t60\_cpu\_microcode**.
25 25 - T60p (and T60 laptops with ATI GPU) will likely never be - T60p (and T60 laptops with ATI GPU) will likely never be
File site/news/libreboot20150208.md changed (mode: 100644) (index 44aa332..a0f8345)
... ... Machines supported in this release:
13 13 digitizer support digitizer support
14 14 - See **hardware/\#supported\_x60t\_list** for list of supported LCD - See **hardware/\#supported\_x60t\_list** for list of supported LCD
15 15 panels panels
16 - It is unknown whether an X61 Tablet can have it's mainboard
16 - It is unknown whether an X61 Tablet can have it's motherboard
17 17 replaced with an X60 Tablet motherboard. replaced with an X60 Tablet motherboard.
18 18 - **Lenovo ThinkPad T60** (Intel GPU) (there are - **Lenovo ThinkPad T60** (Intel GPU) (there are
19 19 issuesinstall/x200\_external.html; see below): issuesinstall/x200\_external.html; see below):
20 20 - See notes below for exceptions, and - See notes below for exceptions, and
21 21 **hardware/\#supported\_t60\_list** for known working LCD panels. **hardware/\#supported\_t60\_list** for known working LCD panels.
22 - It is unknown whether a T61 can have it's mainboard replaced
22 - It is unknown whether a T61 can have it's motherboard replaced
23 23 with a T60 motherboard. with a T60 motherboard.
24 24 - See **future/\#t60\_cpu\_microcode**. - See **future/\#t60\_cpu\_microcode**.
25 25 - T60p (and T60 laptops with ATI GPU) will likely never be - T60p (and T60 laptops with ATI GPU) will likely never be
File site/news/libreboot20150518.md changed (mode: 100644) (index 34e9ba1..69db4a9)
... ... Machines supported in this release:
16 16 support support
17 17 - See ***docs/hardware/\#supported\_x60t\_list*** for list of supported - See ***docs/hardware/\#supported\_x60t\_list*** for list of supported
18 18 LCD panels LCD panels
19 - It is unknown whether an X61 Tablet can have it's mainboard
19 - It is unknown whether an X61 Tablet can have it's motherboard
20 20 replaced with an X60 Tablet motherboard. replaced with an X60 Tablet motherboard.
21 21 - **ThinkPad T60** (Intel GPU) (there are issues; see below): - **ThinkPad T60** (Intel GPU) (there are issues; see below):
22 22 - See notes below for exceptions, and - See notes below for exceptions, and
23 23 ***docs/hardware/\#supported\_t60\_list*** for known working LCD ***docs/hardware/\#supported\_t60\_list*** for known working LCD
24 24 panels. panels.
25 - It is unknown whether a T61 can have it's mainboard replaced
25 - It is unknown whether a T61 can have it's motherboard replaced
26 26 with a T60 motherboard. with a T60 motherboard.
27 27 - See ***docs/future/\#t60\_cpu\_microcode***. - See ***docs/future/\#t60\_cpu\_microcode***.
28 28 - T60p (and T60 laptops with ATI GPU) will likely never be - T60p (and T60 laptops with ATI GPU) will likely never be
File site/news/libreboot20160818.md changed (mode: 100644) (index a41175b..cd11112)
... ... Machines supported in this release:
35 35 support support
36 36 - See ***docs/hardware/\#supported\_x60t\_list*** for list of supported - See ***docs/hardware/\#supported\_x60t\_list*** for list of supported
37 37 LCD panels LCD panels
38 - It is unknown whether an X61 Tablet can have it's mainboard
38 - It is unknown whether an X61 Tablet can have it's motherboard
39 39 replaced with an X60 Tablet motherboard. replaced with an X60 Tablet motherboard.
40 40 - **ThinkPad T60** (Intel GPU) (there are issues; see below): - **ThinkPad T60** (Intel GPU) (there are issues; see below):
41 41 - See notes below for exceptions, and - See notes below for exceptions, and
42 42 ***docs/hardware/\#supported\_t60\_list*** for known working LCD ***docs/hardware/\#supported\_t60\_list*** for known working LCD
43 43 panels. panels.
44 - It is unknown whether a T61 can have it's mainboard replaced
44 - It is unknown whether a T61 can have it's motherboard replaced
45 45 with a T60 motherboard. with a T60 motherboard.
46 46 - See ***docs/future/\#t60\_cpu\_microcode***. - See ***docs/future/\#t60\_cpu\_microcode***.
47 47 - T60p (and T60 laptops with ATI GPU) will likely never be - T60p (and T60 laptops with ATI GPU) will likely never be
File site/news/libreboot20160907.md changed (mode: 100644) (index fa3ba03..a2efc71)
... ... In comparison to Libreboot 20160902:
6 6
7 7 For existing boards, there are no new board specific changes. For existing boards, there are no new board specific changes.
8 8
9 This release adds one new mainboard to libreboot:
9 This release adds one new motherboard to libreboot:
10 10
11 11 - Intel D945GCLF desktop motherboard (thanks to Arthur Heymans) - Intel D945GCLF desktop motherboard (thanks to Arthur Heymans)
12 12
File site/news/libreboot20210522.md changed (mode: 100644) (index 6370871..90ffe98)
... ... New boards
44 44
45 45 #### Acer G43T-AM3 #### Acer G43T-AM3
46 46
47 This is a desktop mainboard, with similar hardware to the already supported
47 This is a desktop motherboard, with similar hardware to the already supported
48 48 Gigabyte GA-G41M-ES2L Gigabyte GA-G41M-ES2L
49 49
50 50 ### Laptops ### Laptops
 
... ... However, the following fixes were made for Lenovo X200 recently:
635 635
636 636 * Mostly re-factoring and minor bug fixes, but it has some interesting fixes * Mostly re-factoring and minor bug fixes, but it has some interesting fixes
637 637 that benefit libreboot that benefit libreboot
638 * Acer G43T-AM3 mainboard added. This is also in the Libreboot release. This
638 * Acer G43T-AM3 motherboard added. This is also in the Libreboot release. This
639 639 board was also present in Libreboot, prior to it updating to use coreboot board was also present in Libreboot, prior to it updating to use coreboot
640 640 4.14, but now it is in the latest coreboot stable release 4.14, but now it is in the latest coreboot stable release
641 641 * Initial support for x86\_64. Not yet used by Libreboot, but it might be * Initial support for x86\_64. Not yet used by Libreboot, but it might be
 
... ... However, the following fixes were made for Lenovo X200 recently:
697 697
698 698 ### coreboot 4.6 ### coreboot 4.6
699 699
700 * fix buggy S3 suspend/resume on Gigabyte GA-G41M-ES2L mainboard, and fix bugs
700 * fix buggy S3 suspend/resume on Gigabyte GA-G41M-ES2L motherboard, and fix bugs
701 701 in raminit in raminit
702 702 * intel x4x/gm45/i945 boards: improvements/fixes to raminit and native video * intel x4x/gm45/i945 boards: improvements/fixes to raminit and native video
703 703 initialization initialization
 
... ... Detailed coreboot git logs
711 711 -------------------------- --------------------------
712 712
713 713 The following are lists of changes in coreboot 4.14, versus coreboot revisions The following are lists of changes in coreboot 4.14, versus coreboot revisions
714 used in various platforms/mainboards from Libreboot 20160907. These lists are
714 used in various platforms/motherboards from Libreboot 20160907. These lists are
715 715 mostly pulled directly from the coreboot git log. mostly pulled directly from the coreboot git log.
716 716
717 717 These logs are made by copying the coreboot git log, on specific directories These logs are made by copying the coreboot git log, on specific directories
718 such as directories for mainboards, or entire platforms, in the git log of
718 such as directories for motherboards, or entire platforms, in the git log of
719 719 coreboot. coreboot.
720 720
721 721 These changes will be split into distinct categories: These changes will be split into distinct categories:
 
... ... i945 hardware that Libreboot supports.
803 803 * fd054bc7d4 nb/intel/i945: Simplify GMA SSDT generator * fd054bc7d4 nb/intel/i945: Simplify GMA SSDT generator
804 804 * 68680dd7cd Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator` * 68680dd7cd Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`
805 805 * 95cdd9f21b nb/intel/i945: Make some cosmetic changes * 95cdd9f21b nb/intel/i945: Make some cosmetic changes
806 * f3f36faf35 src (minus soc and mainboard): Remove copyright notices
806 * f3f36faf35 src (minus soc and motherboard): Remove copyright notices
807 807 * b4d9f229d4 nb/intel/i945/raminit: Simplify if condition * b4d9f229d4 nb/intel/i945/raminit: Simplify if condition
808 808 * d789b658f7 nb/intel/i945/raminit: Use boolean type for helper variables * d789b658f7 nb/intel/i945/raminit: Use boolean type for helper variables
809 809 * 842dd3328d nb/intel/i945/raminit: Remove space for correct alignment * 842dd3328d nb/intel/i945/raminit: Remove space for correct alignment
 
... ... i945 hardware that Libreboot supports.
1022 1022
1023 1023 ### git log src/northbridge/intel/pineview/ ### git log src/northbridge/intel/pineview/
1024 1024
1025 This benefits the Intel D510MO / D410PT mainboards, and any other pineview
1025 This benefits the Intel D510MO / D410PT motherboards, and any other pineview
1026 1026 board that Libreboot has added or will add. board that Libreboot has added or will add.
1027 1027
1028 1028 ```` ````
 
... ... board that Libreboot has added or will add.
1090 1090 * deeccbf4e9 Drop explicit NULL initializations from `device_operations` * deeccbf4e9 Drop explicit NULL initializations from `device_operations`
1091 1091 * affd771ba3 nb/intel/pineview: drop intel_gma_get_controller_info() * affd771ba3 nb/intel/pineview: drop intel_gma_get_controller_info()
1092 1092 * 68680dd7cd Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator` * 68680dd7cd Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`
1093 * f3f36faf35 src (minus soc and mainboard): Remove copyright notices
1093 * f3f36faf35 src (minus soc and motherboard): Remove copyright notices
1094 1094 * 39ff703aa9 nb/intel/pineview: Clean up code and comments * 39ff703aa9 nb/intel/pineview: Clean up code and comments
1095 1095 * 8247cc3328 northbridge: Remove unused include <device/pci.h> * 8247cc3328 northbridge: Remove unused include <device/pci.h>
1096 1096 * 2119d0ba43 treewide: Capitalize 'CMOS' * 2119d0ba43 treewide: Capitalize 'CMOS'
 
... ... board that Libreboot has added or will add.
1161 1161 * 20f71369d9 nb/intel/pineview: Put stage cache in TSEG * 20f71369d9 nb/intel/pineview: Put stage cache in TSEG
1162 1162 * 84fdda3812 nb/intel/pineview: Use parallel MP init * 84fdda3812 nb/intel/pineview: Use parallel MP init
1163 1163 * da44e34743 nb/intel/pineview: Select 1M TSEG * da44e34743 nb/intel/pineview: Select 1M TSEG
1164 * c6ff1ac29e nb/intel/pineview: Move the boilerplate mainboard_romstage_entry
1164 * c6ff1ac29e nb/intel/pineview: Move the boilerplate motherboard_romstage_entry
1165 1165 * b31aee9973 nb/intel/{i945,pineview}: Remove unused function * b31aee9973 nb/intel/{i945,pineview}: Remove unused function
1166 1166 * c70eed1e62 device: Use pcidev_on_root() * c70eed1e62 device: Use pcidev_on_root()
1167 1167 * 66b462dd4f nb/intel/pineview/raminit.c: Remove unused variable * 66b462dd4f nb/intel/pineview/raminit.c: Remove unused variable
 
... ... This benefits GM45 ThinkPads in Libreboot e.g. X200, T400, T500, R500, W500 etc
1286 1286 * 68680dd7cd Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator` * 68680dd7cd Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`
1287 1287 * 6343cd846a drivers/intel/gma: fold gma.asl into default_brightness_levels.asl * 6343cd846a drivers/intel/gma: fold gma.asl into default_brightness_levels.asl
1288 1288 * 612a867677 drivers/intel/gma/acpi: Add Kconfigs for backlight registers * 612a867677 drivers/intel/gma/acpi: Add Kconfigs for backlight registers
1289 * f3f36faf35 src (minus soc and mainboard): Remove copyright notices
1289 * f3f36faf35 src (minus soc and motherboard): Remove copyright notices
1290 1290 * 8247cc3328 northbridge: Remove unused include <device/pci.h> * 8247cc3328 northbridge: Remove unused include <device/pci.h>
1291 1291 * 2119d0ba43 treewide: Capitalize 'CMOS' * 2119d0ba43 treewide: Capitalize 'CMOS'
1292 1292 * ef90609cbb src: capitalize 'RAM' * ef90609cbb src: capitalize 'RAM'
 
... ... This benefits GM45 ThinkPads in Libreboot e.g. X200, T400, T500, R500, W500 etc
1448 1448
1449 1449 ### git log src/northbridge/intel/x4x/ ### git log src/northbridge/intel/x4x/
1450 1450
1451 This benefits mainly the Gigabyte GA-G41M-ES2L mainboard in Libreboot, and other
1451 This benefits mainly the Gigabyte GA-G41M-ES2L motherboard in Libreboot, and other
1452 1452 x4x boards that have now been added. In Libreboot 20160907, the only x4x board x4x boards that have now been added. In Libreboot 20160907, the only x4x board
1453 1453 was the Gigabyte GA-G41M-ES2L was the Gigabyte GA-G41M-ES2L
1454 1454
 
... ... was the Gigabyte GA-G41M-ES2L
1549 1549 * 68680dd7cd Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator` * 68680dd7cd Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`
1550 1550 * 6343cd846a drivers/intel/gma: fold gma.asl into default_brightness_levels.asl * 6343cd846a drivers/intel/gma: fold gma.asl into default_brightness_levels.asl
1551 1551 * 612a867677 drivers/intel/gma/acpi: Add Kconfigs for backlight registers * 612a867677 drivers/intel/gma/acpi: Add Kconfigs for backlight registers
1552 * f3f36faf35 src (minus soc and mainboard): Remove copyright notices
1552 * f3f36faf35 src (minus soc and motherboard): Remove copyright notices
1553 1553 * 8247cc3328 northbridge: Remove unused include <device/pci.h> * 8247cc3328 northbridge: Remove unused include <device/pci.h>
1554 1554 * 2119d0ba43 treewide: Capitalize 'CMOS' * 2119d0ba43 treewide: Capitalize 'CMOS'
1555 1555 * ef90609cbb src: capitalize 'RAM' * ef90609cbb src: capitalize 'RAM'
 
... ... Running `git log src/northbridge/amd/amdfam10/` we get these commits:
1810 1810 * 1f4cb326fa northbridge: Remove useless include <device/pci_ids.h> * 1f4cb326fa northbridge: Remove useless include <device/pci_ids.h>
1811 1811 * 586f24dab4 northbridge: Remove unneeded include <pc80/mc146818rtc.h> * 586f24dab4 northbridge: Remove unneeded include <pc80/mc146818rtc.h>
1812 1812 * 134da98a51 amd/{nb/amdfam10,cpu/pi}/Kconfig: Remove unused symbols * 134da98a51 amd/{nb/amdfam10,cpu/pi}/Kconfig: Remove unused symbols
1813 * 414779db10 src/mainboard: Remove unused "HW_MEM_HOLE_SIZE_AUTO_INC"
1813 * 414779db10 src/motherboard: Remove unused "HW_MEM_HOLE_SIZE_AUTO_INC"
1814 1814 * f765d4f275 src: Remove unneeded include <lib.h> * f765d4f275 src: Remove unneeded include <lib.h>
1815 1815 * e9a0130879 src: Remove unneeded include <console/console.h> * e9a0130879 src: Remove unneeded include <console/console.h>
1816 1816 * d2b9ec1362 src: Remove unneeded include "{arch,cpu}/cpu.h" * d2b9ec1362 src: Remove unneeded include "{arch,cpu}/cpu.h"
 
... ... Running `git log src/mainboard/asus/kgpe-d16/` we get:
1952 1952 * cb3e16f287 AMD fam10: Remove HAVE_ACPI_RESUME support * cb3e16f287 AMD fam10: Remove HAVE_ACPI_RESUME support
1953 1953 * 04d025cf50 amdfam10: Declare get_sysinfo() * 04d025cf50 amdfam10: Declare get_sysinfo()
1954 1954 * 8560db6116 amdfam10: Declare empty activate_spd_rom() stub * 8560db6116 amdfam10: Declare empty activate_spd_rom() stub
1955 * e39db681df src/mainboard: Add missing 'include <types.h>'
1955 * e39db681df src/motherboard: Add missing 'include <types.h>'
1956 1956 * a1e22b8192 src: Use 'include <string.h>' when appropriate * a1e22b8192 src: Use 'include <string.h>' when appropriate
1957 1957 * cd49cce7b7 coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) * cd49cce7b7 coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
1958 1958 * 13f66507af device/mmio.h: Add include file for MMIO ops * 13f66507af device/mmio.h: Add include file for MMIO ops
 
... ... Running `git log src/mainboard/asus/kgpe-d16/` we get:
1979 1979 * 1db4e3a358 amdfam10 boards: Declare get_pci1234() just once * 1db4e3a358 amdfam10 boards: Declare get_pci1234() just once
1980 1980 * a79b3f1c63 amdfam10 boards: Drop unused mb_sysconf.h * a79b3f1c63 amdfam10 boards: Drop unused mb_sysconf.h
1981 1981 * a26b02466e drivers/aspeed/ast: Select `MAINBOARD_HAS_NATIVE_VGA_INIT` * a26b02466e drivers/aspeed/ast: Select `MAINBOARD_HAS_NATIVE_VGA_INIT`
1982 * 21c8f9cab3 mainboard: Remove useless include <device/pci_ids.h>
1982 * 21c8f9cab3 motherboard: Remove useless include <device/pci_ids.h>
1983 1983 * 472d68b066 mb/asus/kgpe-d16: Set ASpeed GPIO SPD mux lines during boot * 472d68b066 mb/asus/kgpe-d16: Set ASpeed GPIO SPD mux lines during boot
1984 1984 * f0c5be2a4f mb/*/*/Kconfig: Remove useless comment * f0c5be2a4f mb/*/*/Kconfig: Remove useless comment
1985 1985 * 6d19a20f5f mb: Set coreboot as DSDT's manufacturer model ID * 6d19a20f5f mb: Set coreboot as DSDT's manufacturer model ID
 
... ... Running `git log src/mainboard/asus/kgpe-d16/` we get:
1987 1987 * f765d4f275 src: Remove unneeded include <lib.h> * f765d4f275 src: Remove unneeded include <lib.h>
1988 1988 * ead574ed02 src: Get rid of duplicated includes * ead574ed02 src: Get rid of duplicated includes
1989 1989 * d2b9ec1362 src: Remove unneeded include "{arch,cpu}/cpu.h" * d2b9ec1362 src: Remove unneeded include "{arch,cpu}/cpu.h"
1990 * 1156b35a23 mainboard: Remove unneeded include <console/console.h>
1990 * 1156b35a23 motherboard: Remove unneeded include <console/console.h>
1991 1991 * 718c6faff4 reset: Finalize move to new API * 718c6faff4 reset: Finalize move to new API
1992 1992 * e20dd19dde amdfam10: Convert to `board_reset()` * e20dd19dde amdfam10: Convert to `board_reset()`
1993 1993 * 2c5652d72b mb: Fix non-local header treated as local * 2c5652d72b mb: Fix non-local header treated as local
 
... ... Running `git log src/mainboard/asus/kgpe-d16/` we get:
1996 1996 * 068253c369 mb/*/*/cmos.default: Harmonise CMOS files syntax * 068253c369 mb/*/*/cmos.default: Harmonise CMOS files syntax
1997 1997 * f716f2ac1a mb/*/*/cmos.default: Decrease debug_level to 'Debug' * f716f2ac1a mb/*/*/cmos.default: Decrease debug_level to 'Debug'
1998 1998 * 65bb5434f6 src: Get rid of non-local header treated as local * 65bb5434f6 src: Get rid of non-local header treated as local
1999 * 08fc8fff25 src/mainboard: Fix typo
1999 * 08fc8fff25 src/motherboard: Fix typo
2000 2000 * db70f3bb4d drivers/tpm: Add TPM ramstage driver for devices without vboot. * db70f3bb4d drivers/tpm: Add TPM ramstage driver for devices without vboot.
2001 2001 * 95bca33efa src/mb: Use "foo *bar" instead of "foo* bar" * 95bca33efa src/mb: Use "foo *bar" instead of "foo* bar"
2002 2002 * c07f8fbe6f security/tpm: Unify the coreboot TPM software stack * c07f8fbe6f security/tpm: Unify the coreboot TPM software stack
 
... ... Running `git log src/mainboard/asus/kgpe-d16/` we get:
2006 2006 * 02b05d1f6b mb/asus: Get rid of device_t * 02b05d1f6b mb/asus: Get rid of device_t
2007 2007 * d88fb36e61 security/tpm: Change TPM naming for different layers. * d88fb36e61 security/tpm: Change TPM naming for different layers.
2008 2008 * 64e2d19082 security/tpm: Move tpm TSS and TSPI layer to security section * 64e2d19082 security/tpm: Move tpm TSS and TSPI layer to security section
2009 * 482d16fb0a src/mainboard: Fix various typos
2009 * 482d16fb0a src/motherboard: Fix various typos
2010 2010 * ec48c749c2 AMD boards: Fix function name (soft_reset) in message * ec48c749c2 AMD boards: Fix function name (soft_reset) in message
2011 2011 * 74bd2b0e4c mb/asus/kcma-d8,kgde-d16: Don't select SPI_FLASH_WINBOND * 74bd2b0e4c mb/asus/kcma-d8,kgde-d16: Don't select SPI_FLASH_WINBOND
2012 2012 * b29078e401 mb/*/*: Remove rtc nvram configurable baud rate * b29078e401 mb/*/*: Remove rtc nvram configurable baud rate
 
... ... Running `git log src/mainboard/asus/kgpe-d16/` we get:
2022 2022 * eca093ecfe mainboard/asus/kgpe-d16: Remove obsolete reference to TPM ASL file * eca093ecfe mainboard/asus/kgpe-d16: Remove obsolete reference to TPM ASL file
2023 2023 * 06a629e4b1 arch/x86: do not define type of SPIN_LOCK_UNLOCKED * 06a629e4b1 arch/x86: do not define type of SPIN_LOCK_UNLOCKED
2024 2024 * 75a3d1fb7c amdfam10: Perform major include ".c" cleanup * 75a3d1fb7c amdfam10: Perform major include ".c" cleanup
2025 * a8025db49f amd-based mainboards: Fix whitespace in _PTS comments
2025 * a8025db49f amd-based motherboards: Fix whitespace in _PTS comments
2026 2026 * 3a0cb458dc cpu/amd/mtrr.h: Drop excessive includes * 3a0cb458dc cpu/amd/mtrr.h: Drop excessive includes
2027 2027 * 4607cacf30 cpu/x86/msr.h: Drop excessive includes * 4607cacf30 cpu/x86/msr.h: Drop excessive includes
2028 2028 * 425890e59a AMD fam10h-15h: MMCONF_SUPPORT_DEFAULT is already set * 425890e59a AMD fam10h-15h: MMCONF_SUPPORT_DEFAULT is already set
 
... ... Running `git log src/mainboard/asus/kgpe-d16/` we get:
2032 2032 * 6350a2e43f src/mainboard/a-trend - emulation: Add space around operators * 6350a2e43f src/mainboard/a-trend - emulation: Add space around operators
2033 2033 * 7931c6a81d mb/asus/kgpe-d16: Add TPM support * 7931c6a81d mb/asus/kgpe-d16: Add TPM support
2034 2034 * 64444268e2 mb/asus/[kgpe-d16|kcma-d8]: Fix whitespace errors in devicetree.cb * 64444268e2 mb/asus/[kgpe-d16|kcma-d8]: Fix whitespace errors in devicetree.cb
2035 * d23ee5de22 mainboard: Clean up boot_option/reboot_bits in cmos.layout
2036 * 8ab989e315 src/mainboard: Capitalize ROM, RAM, CPU and APIC
2035 * d23ee5de22 motherboard: Clean up boot_option/reboot_bits in cmos.layout
2036 * 8ab989e315 src/motherboard: Capitalize ROM, RAM, CPU and APIC
2037 2037 * bb9722bd77 Add newlines at the end of all coreboot files * bb9722bd77 Add newlines at the end of all coreboot files
2038 * 95fe8fb1e0 mainboard: Format irq_tables.c
2038 * 95fe8fb1e0 motherboard: Format irq_tables.c
2039 2039 * 150f476c96 timestamp: Drop duplicate TS_END_ROMSTAGE entries * 150f476c96 timestamp: Drop duplicate TS_END_ROMSTAGE entries
2040 2040 * ca543396a7 mainboard/asus/[kgpe-d16|kcma-d8]: Enable secondary serial port header * ca543396a7 mainboard/asus/[kgpe-d16|kcma-d8]: Enable secondary serial port header
2041 2041 * 99894127ab mainboard/asus/[kgpe-di6|kcma-d8]: Fix board ROM information * 99894127ab mainboard/asus/[kgpe-di6|kcma-d8]: Fix board ROM information
 
... ... Running `git log src/mainboard/asus/kcma-d8/` we get:
2049 2049 * cb3e16f287 AMD fam10: Remove HAVE_ACPI_RESUME support * cb3e16f287 AMD fam10: Remove HAVE_ACPI_RESUME support
2050 2050 * 04d025cf50 amdfam10: Declare get_sysinfo() * 04d025cf50 amdfam10: Declare get_sysinfo()
2051 2051 * 8560db6116 amdfam10: Declare empty activate_spd_rom() stub * 8560db6116 amdfam10: Declare empty activate_spd_rom() stub
2052 * e39db681df src/mainboard: Add missing 'include <types.h>'
2052 * e39db681df src/motherboard: Add missing 'include <types.h>'
2053 2053 * a1e22b8192 src: Use 'include <string.h>' when appropriate * a1e22b8192 src: Use 'include <string.h>' when appropriate
2054 2054 * cd49cce7b7 coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) * cd49cce7b7 coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
2055 2055 * 13f66507af device/mmio.h: Add include file for MMIO ops * 13f66507af device/mmio.h: Add include file for MMIO ops
 
... ... Running `git log src/mainboard/asus/kcma-d8/` we get:
2074 2074 * 1db4e3a358 amdfam10 boards: Declare get_pci1234() just once * 1db4e3a358 amdfam10 boards: Declare get_pci1234() just once
2075 2075 * a79b3f1c63 amdfam10 boards: Drop unused mb_sysconf.h * a79b3f1c63 amdfam10 boards: Drop unused mb_sysconf.h
2076 2076 * a26b02466e drivers/aspeed/ast: Select `MAINBOARD_HAS_NATIVE_VGA_INIT` * a26b02466e drivers/aspeed/ast: Select `MAINBOARD_HAS_NATIVE_VGA_INIT`
2077 * 21c8f9cab3 mainboard: Remove useless include <device/pci_ids.h>
2077 * 21c8f9cab3 motherboard: Remove useless include <device/pci_ids.h>
2078 2078 * f0c5be2a4f mb/*/*/Kconfig: Remove useless comment * f0c5be2a4f mb/*/*/Kconfig: Remove useless comment
2079 2079 * 6d19a20f5f mb: Set coreboot as DSDT's manufacturer model ID * 6d19a20f5f mb: Set coreboot as DSDT's manufacturer model ID
2080 2080 * 0cca6e24b7 ACPI: Fix DSDT's revision field * 0cca6e24b7 ACPI: Fix DSDT's revision field
2081 2081 * f765d4f275 src: Remove unneeded include <lib.h> * f765d4f275 src: Remove unneeded include <lib.h>
2082 2082 * ead574ed02 src: Get rid of duplicated includes * ead574ed02 src: Get rid of duplicated includes
2083 2083 * d2b9ec1362 src: Remove unneeded include "{arch,cpu}/cpu.h" * d2b9ec1362 src: Remove unneeded include "{arch,cpu}/cpu.h"
2084 * 1156b35a23 mainboard: Remove unneeded include <console/console.h>
2084 * 1156b35a23 motherboard: Remove unneeded include <console/console.h>
2085 2085 * 718c6faff4 reset: Finalize move to new API * 718c6faff4 reset: Finalize move to new API
2086 2086 * e20dd19dde amdfam10: Convert to `board_reset()` * e20dd19dde amdfam10: Convert to `board_reset()`
2087 2087 * 2c5652d72b mb: Fix non-local header treated as local * 2c5652d72b mb: Fix non-local header treated as local
 
... ... Running `git log src/mainboard/asus/kcma-d8/` we get:
2090 2090 * 068253c369 mb/*/*/cmos.default: Harmonise CMOS files syntax * 068253c369 mb/*/*/cmos.default: Harmonise CMOS files syntax
2091 2091 * f716f2ac1a mb/*/*/cmos.default: Decrease debug_level to 'Debug' * f716f2ac1a mb/*/*/cmos.default: Decrease debug_level to 'Debug'
2092 2092 * 65bb5434f6 src: Get rid of non-local header treated as local * 65bb5434f6 src: Get rid of non-local header treated as local
2093 * 08fc8fff25 src/mainboard: Fix typo
2093 * 08fc8fff25 src/motherboard: Fix typo
2094 2094 * 95bca33efa src/mb: Use "foo *bar" instead of "foo* bar" * 95bca33efa src/mb: Use "foo *bar" instead of "foo* bar"
2095 2095 * e0e1e64855 amdfam10: Drop tests for LATE_CBMEM_INIT * e0e1e64855 amdfam10: Drop tests for LATE_CBMEM_INIT
2096 2096 * d54e859ace mb/asus: Get rid of whitespace before tab * d54e859ace mb/asus: Get rid of whitespace before tab
2097 2097 * 1bad4ce421 sb/amd/sr5650: Fix invalid function declarations * 1bad4ce421 sb/amd/sr5650: Fix invalid function declarations
2098 2098 * 02b05d1f6b mb/asus: Get rid of device_t * 02b05d1f6b mb/asus: Get rid of device_t
2099 * 482d16fb0a src/mainboard: Fix various typos
2099 * 482d16fb0a src/motherboard: Fix various typos
2100 2100 * ec48c749c2 AMD boards: Fix function name (soft_reset) in message * ec48c749c2 AMD boards: Fix function name (soft_reset) in message
2101 2101 * 74bd2b0e4c mb/asus/kcma-d8,kgde-d16: Don't select SPI_FLASH_WINBOND * 74bd2b0e4c mb/asus/kcma-d8,kgde-d16: Don't select SPI_FLASH_WINBOND
2102 2102 * b29078e401 mb/*/*: Remove rtc nvram configurable baud rate * b29078e401 mb/*/*: Remove rtc nvram configurable baud rate
 
... ... Running `git log src/mainboard/asus/kcma-d8/` we get:
2109 2109 * 00b9f4c4b1 mb/*/*/cmos.layout: Make multibyte options byte aligned * 00b9f4c4b1 mb/*/*/cmos.layout: Make multibyte options byte aligned
2110 2110 * 06a629e4b1 arch/x86: do not define type of SPIN_LOCK_UNLOCKED * 06a629e4b1 arch/x86: do not define type of SPIN_LOCK_UNLOCKED
2111 2111 * 75a3d1fb7c amdfam10: Perform major include ".c" cleanup * 75a3d1fb7c amdfam10: Perform major include ".c" cleanup
2112 * a8025db49f amd-based mainboards: Fix whitespace in _PTS comments
2112 * a8025db49f amd-based motherboards: Fix whitespace in _PTS comments
2113 2113 * 3a0cb458dc cpu/amd/mtrr.h: Drop excessive includes * 3a0cb458dc cpu/amd/mtrr.h: Drop excessive includes
2114 2114 * 4607cacf30 cpu/x86/msr.h: Drop excessive includes * 4607cacf30 cpu/x86/msr.h: Drop excessive includes
2115 2115 * 425890e59a AMD fam10h-15h: MMCONF_SUPPORT_DEFAULT is already set * 425890e59a AMD fam10h-15h: MMCONF_SUPPORT_DEFAULT is already set
 
... ... Running `git log src/mainboard/asus/kcma-d8/` we get:
2118 2118 * b87a734771 mainboard/*/*/dsdt.asl: Use tabs for indents * b87a734771 mainboard/*/*/dsdt.asl: Use tabs for indents
2119 2119 * 6350a2e43f src/mainboard/a-trend - emulation: Add space around operators * 6350a2e43f src/mainboard/a-trend - emulation: Add space around operators
2120 2120 * 64444268e2 mb/asus/[kgpe-d16|kcma-d8]: Fix whitespace errors in devicetree.cb * 64444268e2 mb/asus/[kgpe-d16|kcma-d8]: Fix whitespace errors in devicetree.cb
2121 * d23ee5de22 mainboard: Clean up boot_option/reboot_bits in cmos.layout
2122 * 8ab989e315 src/mainboard: Capitalize ROM, RAM, CPU and APIC
2121 * d23ee5de22 motherboard: Clean up boot_option/reboot_bits in cmos.layout
2122 * 8ab989e315 src/motherboard: Capitalize ROM, RAM, CPU and APIC
2123 2123 * bb9722bd77 Add newlines at the end of all coreboot files * bb9722bd77 Add newlines at the end of all coreboot files
2124 * 95fe8fb1e0 mainboard: Format irq_tables.c
2124 * 95fe8fb1e0 motherboard: Format irq_tables.c
2125 2125 * 150f476c96 timestamp: Drop duplicate TS_END_ROMSTAGE entries * 150f476c96 timestamp: Drop duplicate TS_END_ROMSTAGE entries
2126 2126 * ca543396a7 mainboard/asus/[kgpe-d16|kcma-d8]: Enable secondary serial port header * ca543396a7 mainboard/asus/[kgpe-d16|kcma-d8]: Enable secondary serial port header
2127 2127 * 99894127ab mainboard/asus/[kgpe-di6|kcma-d8]: Fix board ROM information * 99894127ab mainboard/asus/[kgpe-di6|kcma-d8]: Fix board ROM information
 
... ... Running `git log src/mainboard/asus/kcma-d8/` we get:
2132 2132 Running `git log src/mainboard/asus/kfsn4-dre/` we get: Running `git log src/mainboard/asus/kfsn4-dre/` we get:
2133 2133
2134 2134 ```` ````
2135 * ad0f485361 src/mainboard: change "unsigned" to "unsigned int"
2135 * ad0f485361 src/motherboard: change "unsigned" to "unsigned int"
2136 2136 * 12ef4f2d71 mb/asus/kfsn4-dre: Return early if CK804 not found * 12ef4f2d71 mb/asus/kfsn4-dre: Return early if CK804 not found
2137 2137 * 04d025cf50 amdfam10: Declare get_sysinfo() * 04d025cf50 amdfam10: Declare get_sysinfo()
2138 2138 * 8560db6116 amdfam10: Declare empty activate_spd_rom() stub * 8560db6116 amdfam10: Declare empty activate_spd_rom() stub
 
... ... Running `git log src/mainboard/asus/kfsn4-dre/` we get:
2156 2156 * a2cfe9e900 amdfam10 boards: Add Makefiles and fix resourcemap.c * a2cfe9e900 amdfam10 boards: Add Makefiles and fix resourcemap.c
2157 2157 * d482c7dace amdfam10 boards: Drop global bus_isa variable * d482c7dace amdfam10 boards: Drop global bus_isa variable
2158 2158 * 1db4e3a358 amdfam10 boards: Declare get_pci1234() just once * 1db4e3a358 amdfam10 boards: Declare get_pci1234() just once
2159 * 21c8f9cab3 mainboard: Remove useless include <device/pci_ids.h>
2159 * 21c8f9cab3 motherboard: Remove useless include <device/pci_ids.h>
2160 2160 * f0c5be2a4f mb/*/*/Kconfig: Remove useless comment * f0c5be2a4f mb/*/*/Kconfig: Remove useless comment
2161 2161 * 6d19a20f5f mb: Set coreboot as DSDT's manufacturer model ID * 6d19a20f5f mb: Set coreboot as DSDT's manufacturer model ID
2162 2162 * f765d4f275 src: Remove unneeded include <lib.h> * f765d4f275 src: Remove unneeded include <lib.h>
2163 2163 * ead574ed02 src: Get rid of duplicated includes * ead574ed02 src: Get rid of duplicated includes
2164 2164 * d2b9ec1362 src: Remove unneeded include "{arch,cpu}/cpu.h" * d2b9ec1362 src: Remove unneeded include "{arch,cpu}/cpu.h"
2165 * 1156b35a23 mainboard: Remove unneeded include <console/console.h>
2165 * 1156b35a23 motherboard: Remove unneeded include <console/console.h>
2166 2166 * 718c6faff4 reset: Finalize move to new API * 718c6faff4 reset: Finalize move to new API
2167 2167 * e20dd19dde amdfam10: Convert to `board_reset()` * e20dd19dde amdfam10: Convert to `board_reset()`
2168 2168 * 400ce55566 cpu/amd: Use common AMD's MSR * 400ce55566 cpu/amd: Use common AMD's MSR
 
... ... Running `git log src/mainboard/asus/kfsn4-dre/` we get:
2171 2171 * 068253c369 mb/*/*/cmos.default: Harmonise CMOS files syntax * 068253c369 mb/*/*/cmos.default: Harmonise CMOS files syntax
2172 2172 * f716f2ac1a mb/*/*/cmos.default: Decrease debug_level to 'Debug' * f716f2ac1a mb/*/*/cmos.default: Decrease debug_level to 'Debug'
2173 2173 * 65bb5434f6 src: Get rid of non-local header treated as local * 65bb5434f6 src: Get rid of non-local header treated as local
2174 * 08fc8fff25 src/mainboard: Fix typo
2174 * 08fc8fff25 src/motherboard: Fix typo
2175 2175 * b0f1988f89 src: Get rid of unneeded whitespace * b0f1988f89 src: Get rid of unneeded whitespace
2176 2176 * 448d9fb431 src: Use "foo *bar" instead of "foo* bar" * 448d9fb431 src: Use "foo *bar" instead of "foo* bar"
2177 2177 * 7f268eab78 mainboard/asus: Add license headers * 7f268eab78 mainboard/asus: Add license headers
 
... ... Running `git log src/mainboard/asus/kfsn4-dre/` we get:
2185 2185 * 00b9f4c4b1 mb/*/*/cmos.layout: Make multibyte options byte aligned * 00b9f4c4b1 mb/*/*/cmos.layout: Make multibyte options byte aligned
2186 2186 * ce642f08b9 Kconfig: Rework MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG * ce642f08b9 Kconfig: Rework MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
2187 2187 * 75a3d1fb7c amdfam10: Perform major include ".c" cleanup * 75a3d1fb7c amdfam10: Perform major include ".c" cleanup
2188 * a8025db49f amd-based mainboards: Fix whitespace in _PTS comments
2188 * a8025db49f amd-based motherboards: Fix whitespace in _PTS comments
2189 2189 * 3a0cb458dc cpu/amd/mtrr.h: Drop excessive includes * 3a0cb458dc cpu/amd/mtrr.h: Drop excessive includes
2190 2190 * 4607cacf30 cpu/x86/msr.h: Drop excessive includes * 4607cacf30 cpu/x86/msr.h: Drop excessive includes
2191 2191 * 425890e59a AMD fam10h-15h: MMCONF_SUPPORT_DEFAULT is already set * 425890e59a AMD fam10h-15h: MMCONF_SUPPORT_DEFAULT is already set
 
... ... Running `git log src/mainboard/asus/kfsn4-dre/` we get:
2193 2193 * b87a734771 mainboard/*/*/dsdt.asl: Use tabs for indents * b87a734771 mainboard/*/*/dsdt.asl: Use tabs for indents
2194 2194 * 6350a2e43f src/mainboard/a-trend - emulation: Add space around operators * 6350a2e43f src/mainboard/a-trend - emulation: Add space around operators
2195 2195 * 837618bf20 mainboard/asus/*: transition away from device_t * 837618bf20 mainboard/asus/*: transition away from device_t
2196 * d23ee5de22 mainboard: Clean up boot_option/reboot_bits in cmos.layout
2197 * 8ab989e315 src/mainboard: Capitalize ROM, RAM, CPU and APIC
2196 * d23ee5de22 motherboard: Clean up boot_option/reboot_bits in cmos.layout
2197 * 8ab989e315 src/motherboard: Capitalize ROM, RAM, CPU and APIC
2198 2198 * bb9722bd77 Add newlines at the end of all coreboot files * bb9722bd77 Add newlines at the end of all coreboot files
2199 2199 ```` ````
2200 2200
File site/news/libreboot20221214.md changed (mode: 100644) (index 0a45579..d6e7dd7)
... ... would simply merge)
402 402 | * 7fdfb07 added ability to detect if the board needs the mrc and download it | * 7fdfb07 added ability to detect if the board needs the mrc and download it
403 403 | * b8bd895 added mrc download script from old osbmk but changed to agnostic shebang | * b8bd895 added mrc download script from old osbmk but changed to agnostic shebang
404 404 | * d80bcfb added x230 coreboot config as an example of a config using the blobs extracted with the extraction script | * d80bcfb added x230 coreboot config as an example of a config using the blobs extracted with the extraction script
405 | * d40b01c add script to extract blobs from the vendor rom image for ivy bridge lenovo boards. Could possible work/be extended for other mainboards
405 | * d40b01c add script to extract blobs from the vendor rom image for ivy bridge lenovo boards. Could possible work/be extended for other motherboards
406 406 | * c3dfcf4 re-add me_cleaner and change to agnostic shebang | * c3dfcf4 re-add me_cleaner and change to agnostic shebang
407 407 * | f70c5cc lenovo/x230: set me_state=Disabled in cmos.default * | f70c5cc lenovo/x230: set me_state=Disabled in cmos.default
408 408 * | 9b4afd1 x230_12mb: set cbfs back to 7mb. i will add special truncated configs instead * | 9b4afd1 x230_12mb: set cbfs back to 7mb. i will add special truncated configs instead
File site/news/libreboot20230413.md changed (mode: 100644) (index 629aaad..cf8839b)
... ... The priority of this release has been build system fixes/improvements. For the
33 33 time being, no more code changes will be made unless needed, in coreboot, for time being, no more code changes will be made unless needed, in coreboot, for
34 34 existing supported hardware; the focus is going to be on adding *more* boards existing supported hardware; the focus is going to be on adding *more* boards
35 35 to Libreboot, to support more hardware. I've been on a spree, buying lots of to Libreboot, to support more hardware. I've been on a spree, buying lots of
36 mainboards that coreboot supports, that would be interesting in Libreboot.
36 motherboards that coreboot supports, that would be interesting in Libreboot.
37 37
38 38 ### Build from source ### Build from source
39 39
 
... ... Changelog:
95 95 ROM image archives in releases now contain lists of SHA1 hashes, matching ROM image archives in releases now contain lists of SHA1 hashes, matching
96 96 what each file should be when running `blobutil/inject` what each file should be when running `blobutil/inject`
97 97 * `blobutil/inject`: It is now possible to insert MRC and neutered ME images, * `blobutil/inject`: It is now possible to insert MRC and neutered ME images,
98 where required on specific mainboards, into *all* ROM images of a given
98 where required on specific motherboards, into *all* ROM images of a given
99 99 tar archive, in addition to single ROM images. The patch for this is tar archive, in addition to single ROM images. The patch for this is
100 100 courtesy of Caleb La Grange (`shmalebx9` on libreboot IRC) courtesy of Caleb La Grange (`shmalebx9` on libreboot IRC)
101 101 * Removed daisy/peach chromebooks: The machines are believed to boot properly, * Removed daisy/peach chromebooks: The machines are believed to boot properly,
 
... ... Changelog:
134 134 the script easier to read/work on. the script easier to read/work on.
135 135 * `blobutil/inject`: use correct offset for insertion of `mrc.bin` (Haswell * `blobutil/inject`: use correct offset for insertion of `mrc.bin` (Haswell
136 136 platform, e.g. ThinkPad T440p) - as written above. platform, e.g. ThinkPad T440p) - as written above.
137 * Removed mainboard: `d945gclf` - known to be problematic at boot. I have one,
137 * Removed motherboard: `d945gclf` - known to be problematic at boot. I have one,
138 138 and I'm going to test it for re-entry in a future release. and I'm going to test it for re-entry in a future release.
139 139 * Added missing dependency in Arch Linux dependencies installation script, * Added missing dependency in Arch Linux dependencies installation script,
140 140 patch courtesy of Andreas Hartmann. patch courtesy of Andreas Hartmann.
File site/news/libreboot20230423.md changed (mode: 100644) (index 1033a4d..83fc8ae)
... ... in 2023. *This* new release, Libreboot 20230423, is released today on
26 26 April 23rd, 2023. April 23rd, 2023.
27 27
28 28 This is marked as a *testing* release, though it is *basically stable*. This is marked as a *testing* release, though it is *basically stable*.
29 We've been going at it like crazy, on a big spree adding more mainboards from
29 We've been going at it like crazy, on a big spree adding more motherboards from
30 30 coreboot. Some fixes to the build system were also made, since the last release coreboot. Some fixes to the build system were also made, since the last release
31 31 only *10 days ago*. only *10 days ago*.
32 32
 
... ... Ergo, this is a very conservative changelog. It seems Libreboot has been
56 56 releasing almost fortnightly, as of late; perhaps this could continue from releasing almost fortnightly, as of late; perhaps this could continue from
57 57 now on. now on.
58 58
59 ### New mainboards now supported:
59 ### New motherboards now supported:
60 60
61 61 * **Dell Latitude E6400 (laptop)** (GM45, blob-free, flashable entirely in * **Dell Latitude E6400 (laptop)** (GM45, blob-free, flashable entirely in
62 62 software, no disassembly required!) - courtesy Nicholas Chin, `nic3-14159` on software, no disassembly required!) - courtesy Nicholas Chin, `nic3-14159` on
 
... ... please contact the Libreboot project. They are:
162 162 More boards soon! More boards soon!
163 163 --------------- ---------------
164 164
165 I've purchased about ~10 HP mainboards, all of the viable sandybridge,
165 I've purchased about ~10 HP motherboards, all of the viable sandybridge,
166 166 ivybridge and haswell ones from coreboot. I'm going to add them all. ivybridge and haswell ones from coreboot. I'm going to add them all.
167 167
168 168 I also have Dell Optiplex 7020 and 9020; these are on coreboot gerrit and I also have Dell Optiplex 7020 and 9020; these are on coreboot gerrit and
File site/news/libreboot20230625.md changed (mode: 100644) (index 368e406..d8baa69)
... ... mileage may vary, with other distros. Refer to Libreboot documentation.
54 54 Work done since last release Work done since last release
55 55 ---------------------------- ----------------------------
56 56
57 ### New mainboards now supported:
57 ### New motherboards now supported:
58 58
59 59 These boards were added to Libreboot: These boards were added to Libreboot:
60 60
 
... ... focus on hardware support in addition to payloads (linux boot, UEFI etc).
73 73 ### No-microcode ROMs available ### No-microcode ROMs available
74 74
75 75 Since Libreboot 20221214 and up, CPU microcode is Since Libreboot 20221214 and up, CPU microcode is
76 included by default on all applicable x86 mainboards. However,
76 included by default on all applicable x86 motherboards. However,
77 77 Libreboot provided (and still provides) documentation for how Libreboot provided (and still provides) documentation for how
78 78 to manually remove it. to manually remove it.
79 79
80 80 Such removal is still possible, but *this* release now provides Such removal is still possible, but *this* release now provides
81 two sets of ROM images for each x86 mainboard: one set of ROMs
81 two sets of ROM images for each x86 motherboard: one set of ROMs
82 82 will *contain* CPU microcode, and another set *excludes* them. will *contain* CPU microcode, and another set *excludes* them.
83 83 For more context, see [Binary Blob Reduction Policy](policy.md) For more context, see [Binary Blob Reduction Policy](policy.md)
84 84 and [Freedom Status](../freedom-status.md). and [Freedom Status](../freedom-status.md).
 
... ... Newest changes first, oldest changes last:
118 118 * `u-boot`: Increase EFI variable buffer size. This fixes an error where * `u-boot`: Increase EFI variable buffer size. This fixes an error where
119 119 Debian's signed shim allocates too many EFI variables to fit in the space Debian's signed shim allocates too many EFI variables to fit in the space
120 120 provided, breaking the boot process in Debian. Patch courtesy Alper Nebi Yasak provided, breaking the boot process in Debian. Patch courtesy Alper Nebi Yasak
121 * Re-added Gigabyte GA-G41M-ES2L mainboard. It actually does boot, but we have
121 * Re-added Gigabyte GA-G41M-ES2L motherboard. It actually does boot, but we have
122 122 always known that raminit is quite experimental on this board. You just have always known that raminit is quite experimental on this board. You just have
123 123 to cycle through RAM until you find modules that work. to cycle through RAM until you find modules that work.
124 124 * `nyan` chromebooks: Removed for now (not yet stable) - this release only * `nyan` chromebooks: Removed for now (not yet stable) - this release only
 
... ... Newest changes first, oldest changes last:
137 137 ROMs that include microcode by default. This change is also alluded to in ROMs that include microcode by default. This change is also alluded to in
138 138 the sections above. the sections above.
139 139 * `blobutil/download`: Cache downloads based on checksum, to avoid needlessly * `blobutil/download`: Cache downloads based on checksum, to avoid needlessly
140 re-downloading files per mainboard. This is useful when compiling multiple
141 ROM images, for multiple mainboards. Patch courtesy Riku Viitanen.
140 re-downloading files per motherboard. This is useful when compiling multiple
141 ROM images, for multiple motherboards. Patch courtesy Riku Viitanen.
142 142 * Dell Latitude E6400 (board): Fix SD cards (SD cards now work fine). Patch * Dell Latitude E6400 (board): Fix SD cards (SD cards now work fine). Patch
143 143 courtesy Nicholas Chin. courtesy Nicholas Chin.
144 144 * `util/nvmutil`: Vastly more efficient code (part of the audit, referenced in * `util/nvmutil`: Vastly more efficient code (part of the audit, referenced in
 
... ... Newest changes first, oldest changes last:
199 199 an `extra.sh` script, but it can be used to extend the default functionality an `extra.sh` script, but it can be used to extend the default functionality
200 200 of lbmk where lots of custom logic is needed for a given board. For example, of lbmk where lots of custom logic is needed for a given board. For example,
201 201 if you needed to apply lots of patches from gerrit in a specific order, in a if you needed to apply lots of patches from gerrit in a specific order, in a
202 way that could not be generalised for other mainboards where it's really
203 only applicable to that mainboard, you might use `extra.sh`. This was briefly
202 way that could not be generalised for other motherboards where it's really
203 only applicable to that motherboard, you might use `extra.sh`. This was briefly
204 204 used in the erstwhile osboot project, on a few boards. used in the erstwhile osboot project, on a few boards.
205 205 * download/coreboot: Use the `gitclone` script for actually cloning coreboot, * download/coreboot: Use the `gitclone` script for actually cloning coreboot,
206 206 while still using the main script for handling trees/revisions and such. while still using the main script for handling trees/revisions and such.
File site/news/libreboot20231021.md changed (mode: 100644) (index 8b73915..21daf40)
... ... firmware, but not Libreboot! Booting Linux/BSD is also [well](../docs/linux/)
39 39 Work done since last release Work done since last release
40 40 -------------------------- --------------------------
41 41
42 ### New mainboards now supported:
42 ### New motherboards now supported:
43 43
44 44 The *primary* focus of this release has been build system improvements, and new The *primary* focus of this release has been build system improvements, and new
45 45 build system features. However, these boards were added to Libreboot: build system features. However, these boards were added to Libreboot:
 
... ... Full list of changes (detail)
211 211 -------------------- --------------------
212 212
213 213 The changes are (not necessarily in order), but they do not necessarily cover The changes are (not necessarily in order), but they do not necessarily cover
214 things like mainboards or extra features added; these are covered in sections
214 things like motherboards or extra features added; these are covered in sections
215 215 above. This list is essentially a combination of the audit2 and audit3 change above. This list is essentially a combination of the audit2 and audit3 change
216 216 logs, combined: logs, combined:
217 217
 
... ... logs, combined:
261 261 * All helper scripts are now under `include/`, and main scripts in `script/`, * All helper scripts are now under `include/`, and main scripts in `script/`,
262 262 called by the main `build` script called by the main `build` script
263 263 * Intel ME extraction is now provided in one function, instead of two, when * Intel ME extraction is now provided in one function, instead of two, when
264 downloading vendor files per mainboard, before running it
264 downloading vendor files per motherboard, before running it
265 265 through `me_cleaner` through `me_cleaner`
266 266 * Unified checking of the destination file, when downloading vendor updates. * Unified checking of the destination file, when downloading vendor updates.
267 267 This results in more reliable checking of whether a vendor file has already This results in more reliable checking of whether a vendor file has already
 
... ... logs, combined:
304 304 * SECURITY: Use sha512sum (not sha1sum) when verifying certain downloads. This * SECURITY: Use sha512sum (not sha1sum) when verifying certain downloads. This
305 305 reduces the chance for collisions, during checksum verification. reduces the chance for collisions, during checksum verification.
306 306 * Set GRUB timout to 5s by default, but allow override and set to 10s or 15s * Set GRUB timout to 5s by default, but allow override and set to 10s or 15s
307 on some mainboards.
307 on some motherboards.
308 308 * Vendor scripts: don't use `/tmp` for ROM images when inserting vendor files. * Vendor scripts: don't use `/tmp` for ROM images when inserting vendor files.
309 309 In case `/tmp` is a tmpfs and not much RAM is available, it is paramount that In case `/tmp` is a tmpfs and not much RAM is available, it is paramount that
310 310 the user's file system is used instead, where there is likely greater capacity; the user's file system is used instead, where there is likely greater capacity;
 
... ... logs, combined:
548 548 * A lot of scripts have been removed entirely, and their logic not replaced; * A lot of scripts have been removed entirely, and their logic not replaced;
549 549 in many cases, Libreboot's build system contained logic that had gone unused in many cases, Libreboot's build system contained logic that had gone unused
550 550 for many years. for many years.
551 * More reliable configs now used on desktop mainboards: SeaBIOS-only for start,
551 * More reliable configs now used on desktop motherboards: SeaBIOS-only for start,
552 552 but GRUB still available where feasible (in the SeaBIOS menu). This makes it but GRUB still available where feasible (in the SeaBIOS menu). This makes it
553 553 more fool proof for a user who might use integrated graphics and then switch more fool proof for a user who might use integrated graphics and then switch
554 554 to a graphics card; the very same images will work. to a graphics card; the very same images will work.
 
... ... The log is as follows, relative to Libreboot 20230625:
849 849 * d28ad6aa build/release/roms: use -T0 on serprog tarballs * d28ad6aa build/release/roms: use -T0 on serprog tarballs
850 850 * 308c21dd build/boot/roms stragglers: properly handle errors * 308c21dd build/boot/roms stragglers: properly handle errors
851 851 * c16b28ef build/release/src: re-create symlinks, don't copy * c16b28ef build/release/src: re-create symlinks, don't copy
852 * 32dcf9e5 coreboot/qemu_x86_12mb: re-add this mainboard
852 * 32dcf9e5 coreboot/qemu_x86_12mb: re-add this motherboard
853 853 * 5aef8156 scripts: use printf, not echo, where appropriate * 5aef8156 scripts: use printf, not echo, where appropriate
854 854 * 76e12cd4 update/blobs printf statements: use double quotes * 76e12cd4 update/blobs printf statements: use double quotes
855 855 * 84bf47b5 scripts: better handling of printf: stdout/stderr * 84bf47b5 scripts: better handling of printf: stdout/stderr
 
... ... The log is as follows, relative to Libreboot 20230625:
898 898 * da3c9bb3 merge config/ and resources/ * da3c9bb3 merge config/ and resources/
899 899 * a0501050 blobs/download: don't handle ifd/gbe files * a0501050 blobs/download: don't handle ifd/gbe files
900 900 * 03788d14 move ifd/gbe configs into config/ifd/ * 03788d14 move ifd/gbe configs into config/ifd/
901 * 6ddb0e09 run make oldconfig on coreboot/default mainboards
902 * 19efdf9e ich9m mainboards: use pre-assembled ifd/gbe files
901 * 6ddb0e09 run make oldconfig on coreboot/default motherboards
902 * 19efdf9e ich9m motherboards: use pre-assembled ifd/gbe files
903 903 * af8d8cda add ich9m ifd/gbe files * af8d8cda add ich9m ifd/gbe files
904 904 * d554efae build/release/src: copy e6430 ifd/gbe * d554efae build/release/src: copy e6430 ifd/gbe
905 905 * 09aae7be build/rpi-pico-serprog: better error handling * 09aae7be build/rpi-pico-serprog: better error handling
File site/news/libreboot20240126.md changed (mode: 100644) (index 343b9c3..c7aa54f)
... ... have [external flashing gear](../docs/install/spi.md) ready just in case!
40 40 Work done since last release Work done since last release
41 41 ---------------------------- ----------------------------
42 42
43 ### New mainboards supported
43 ### New motherboards supported
44 44
45 These new mainboards have been added:
45 These new motherboards have been added:
46 46
47 47 * [HP EliteBook 820 G2](hp820g2.md), added by Leah Rowe to lbmk, using the * [HP EliteBook 820 G2](hp820g2.md), added by Leah Rowe to lbmk, using the
48 48 coreboot port done by Iru Cai. coreboot port done by Iru Cai.
 
... ... changes first):
107 107 using the `xtree` and `tree_depend` variables in `target.cfg` files, for using the `xtree` and `tree_depend` variables in `target.cfg` files, for
108 108 each coreboot tree and, in the case of xtree, it can be defined in a given each coreboot tree and, in the case of xtree, it can be defined in a given
109 109 coreboot board target. coreboot board target.
110 * Removed mainboard: Lenovo X201 (due to thermal safety issues on this machine,
110 * Removed motherboard: Lenovo X201 (due to thermal safety issues on this machine,
111 111 when using a neutered ME - this issue only affects systems that use ME6, when using a neutered ME - this issue only affects systems that use ME6,
112 112 whereas older/newer platfroms are unaffected). whereas older/newer platfroms are unaffected).
113 113 * coreboot/fam15h: More fixes, e.g. disable `-Werror` on binutils 2.32, and * coreboot/fam15h: More fixes, e.g. disable `-Werror` on binutils 2.32, and
 
... ... changes first):
147 147 * `script/build/serprog`: Return error status (exit) if basename fails, when * `script/build/serprog`: Return error status (exit) if basename fails, when
148 148 processing various board targets available on stm32/rp2040 projects. Patch processing various board targets available on stm32/rp2040 projects. Patch
149 149 courtesy of Leah Rowe. courtesy of Leah Rowe.
150 * **NEW BOARD:** HP 8300 CMT mainboard, added by Riku Viitanen, who worked
150 * **NEW BOARD:** HP 8300 CMT motherboard, added by Riku Viitanen, who worked
151 151 on it with a tester in the IRC channel. on it with a tester in the IRC channel.
152 152 * Fixed implicit typecasting bug on flashprog 1.2 source code, thus preventing * Fixed implicit typecasting bug on flashprog 1.2 source code, thus preventing
153 153 a build issue (tested on Debian 12.2). Patch courtesy of Leah Rowe. a build issue (tested on Debian 12.2). Patch courtesy of Leah Rowe.
 
... ... changes first):
366 366 * dcf7da9a coreboot/fam15h_udimm: define xtree * dcf7da9a coreboot/fam15h_udimm: define xtree
367 367 * f72a72af don't download projects on release archives * f72a72af don't download projects on release archives
368 368 * 435441d0 update/release: generate changelogs * 435441d0 update/release: generate changelogs
369 * a225e4d5 fix amd mainboard configs
369 * a225e4d5 fix amd motherboard configs
370 370 * c9961182 git.sh: fix bad call to ./update * c9961182 git.sh: fix bad call to ./update
371 371 * 3e7e0c7d git.sh: support downloading dependency trees * 3e7e0c7d git.sh: support downloading dependency trees
372 372 * 8f3d3ead re-use crossgcc builds on the coreboot trees * 8f3d3ead re-use crossgcc builds on the coreboot trees
File site/news/libreboot20240225.md changed (mode: 100644) (index 758b857..a95aecd)
... ... Work done since last release
109 109
110 110 With the exception of pico-serprog and replacing flashrom with flashprog (more With the exception of pico-serprog and replacing flashrom with flashprog (more
111 111 on this later), the current upstream revisions remain unchanged, but this on this later), the current upstream revisions remain unchanged, but this
112 release has fixed a few issues and added more mainboards, relative to last
112 release has fixed a few issues and added more motherboards, relative to last
113 113 month's release. month's release.
114 114
115 ### New mainboards
115 ### New motherboards
116 116
117 117 * **HP EliteBook 8560w** - added to lbmk by Riku Viitanen, using the coreboot port * **HP EliteBook 8560w** - added to lbmk by Riku Viitanen, using the coreboot port
118 118 written by Iru Cai, with Riku's MXM support added on top (more on this later) written by Iru Cai, with Riku's MXM support added on top (more on this later)
 
... ... fixed this issue:
184 184 <https://codeberg.org/libreboot/lbmk/issues/182> <https://codeberg.org/libreboot/lbmk/issues/182>
185 185
186 186 Riku also increased the default drive strength to 12mA on all RP2024 boards, Riku also increased the default drive strength to 12mA on all RP2024 boards,
187 increasing reliabily when externally flashing certain mainboards (e.g. PCH
187 increasing reliabily when externally flashing certain motherboards (e.g. PCH
188 188 having low/no resistance on connections to the data lines for the flash). having low/no resistance on connections to the data lines for the flash).
189 189
190 190 ### Flashprog now used, instead of flashrom ### Flashprog now used, instead of flashrom
File site/news/libreboot20240504.md changed (mode: 100644) (index 6198a04..712c0dc)
... ... a major new release of Libreboot. The previous stable release was
48 48 Libreboot 20230625 released on 25 June 2023, and the previous *testing* release Libreboot 20230625 released on 25 June 2023, and the previous *testing* release
49 49 was Libreboot 20240225 released on 25 February 2024. Extreme care has been was Libreboot 20240225 released on 25 February 2024. Extreme care has been
50 50 taken with this release, but it adds a host of new features such as USB3 taken with this release, but it adds a host of new features such as USB3
51 support in the GRUB payload, and a slew of mainboard fixes. *Read on* to learn
51 support in the GRUB payload, and a slew of motherboard fixes. *Read on* to learn
52 52 more. more.
53 53
54 54 The main purpose of this release has been to fix bugs. A lot more work will now The main purpose of this release has been to fix bugs. A lot more work will now
 
... ... This release supports the following hardware:
129 129 - [ASUS Chromebook Flip C101 (gru-bob)](../docs/install/chromebooks.md) - [ASUS Chromebook Flip C101 (gru-bob)](../docs/install/chromebooks.md)
130 130 - [Samsung Chromebook Plus (v1) (gru-kevin)](../docs/install/chromebooks.md) - [Samsung Chromebook Plus (v1) (gru-kevin)](../docs/install/chromebooks.md)
131 131
132 New mainboard added
132 New motherboard added
133 133 ------------------- -------------------
134 134
135 This release adds support for the following mainboard:
135 This release adds support for the following motherboard:
136 136
137 137 * Dell Latitude E5420, courtesy of Nicholas Chin * Dell Latitude E5420, courtesy of Nicholas Chin
138 138
 
... ... are highlighted in bold:
262 262 * Simpler, safer error handling in the build system * Simpler, safer error handling in the build system
263 263 * **util/autoport:** New utility, imported from coreboot's version but with extra * **util/autoport:** New utility, imported from coreboot's version but with extra
264 264 patches merged for Haswell platforms. This can be used in future, tied heavily patches merged for Haswell platforms. This can be used in future, tied heavily
265 to Libreboot's own coreboot trees, to more easily add new mainboards.
265 to Libreboot's own coreboot trees, to more easily add new motherboards.
266 266 * **util/dell-flash-unlock: NetBSD support added**, courtesy of the developer * **util/dell-flash-unlock: NetBSD support added**, courtesy of the developer
267 267 who goes by the name *Linear Cannon*. Here is that person's website as of who goes by the name *Linear Cannon*. Here is that person's website as of
268 268 today: <https://linear.network/> today: <https://linear.network/>
 
... ... It is now the default behaviour, in the next release, that certain images
482 482 contain a bootorder file in CBFS, making SeaBIOS try GRUB first, but you can contain a bootorder file in CBFS, making SeaBIOS try GRUB first, but you can
483 483 still press ESC to access the SeaBIOS boot menu if you want to directly boot still press ESC to access the SeaBIOS boot menu if you want to directly boot
484 484 an OS from that. This, and the other change mentioned above, will guarantee an OS from that. This, and the other change mentioned above, will guarantee
485 stability. GRUB is *no longer* the primary payload, on any mainboard.
485 stability. GRUB is *no longer* the primary payload, on any motherboard.
486 486
487 487 However, it was later decided to put this release in the `testing` However, it was later decided to put this release in the `testing`
488 488 directory instead; it was initially designated as a stable release. directory instead; it was initially designated as a stable release.
File site/news/libreboot20240612.md changed (mode: 100644) (index 6d1d1d2..26b9614)
... ... The [errata](libreboot20240504.md#errata) on Libreboot 20240504 meant that all
31 31 ROM images had to be removed, so a new stable release had to be made ASAP to ROM images had to be removed, so a new stable release had to be made ASAP to
32 32 compensate. compensate.
33 33
34 A new *testing* release is planned for July, adding many more new mainboards;
34 A new *testing* release is planned for July, adding many more new motherboards;
35 35 today's stable release only fixes bugs and adds some new features to the build today's stable release only fixes bugs and adds some new features to the build
36 36 system, which have been rigorously tested during the course of the recent audit. system, which have been rigorously tested during the course of the recent audit.
37 37
 
... ... Changes are in order per category, from newest to oldest:
148 148 * **GRUB is now a multi-tree project.** Each given coreboot target can * **GRUB is now a multi-tree project.** Each given coreboot target can
149 149 specify which GRUB tree it wants to use, each containing its own revision specify which GRUB tree it wants to use, each containing its own revision
150 150 and patches, with its own GRUB configuration file. This can be used later on and patches, with its own GRUB configuration file. This can be used later on
151 to provide specific optimisations on each given mainboard, but it is used
151 to provide specific optimisations on each given motherboard, but it is used
152 152 at present to exclude xHCI patches on boards that don't need it; please also at present to exclude xHCI patches on boards that don't need it; please also
153 153 read the bugfix section (of this audit report) pertaining to this same topic, read the bugfix section (of this audit report) pertaining to this same topic,
154 for more context. Before this change was implemented, all mainboards used
154 for more context. Before this change was implemented, all motherboards used
155 155 the exact same GRUB revision, with the same patches and the same config. the exact same GRUB revision, with the same patches and the same config.
156 156 * grub.cfg: scan `grub2/` last, on each given device/partition; this speeds * grub.cfg: scan `grub2/` last, on each given device/partition; this speeds
157 157 up the boot time in most tests, because most setups use `grub/`, up the boot time in most tests, because most setups use `grub/`,
 
... ... Changes are in order per category, from newest to oldest:
185 185 * script/roms: Allow to override `grub_scan_disk` via `-s`, for * script/roms: Allow to override `grub_scan_disk` via `-s`, for
186 186 example: `./build roms -s nvme t1650_12mb` example: `./build roms -s nvme t1650_12mb`
187 187 * **grub.cfg: Use `grub_scan_disk` to set boot order (rather, boot order by * **grub.cfg: Use `grub_scan_disk` to set boot order (rather, boot order by
188 device type).** It is possible now to configure each mainboard with this
188 device type).** It is possible now to configure each motherboard with this
189 189 variable, so that certain types of devices are scanned in a precise order; variable, so that certain types of devices are scanned in a precise order;
190 190 for example, scan NVMe SSDs first. for example, scan NVMe SSDs first.
191 191 * **include/git.sh: Allow manual override of `git submodule` handling**, instead * **include/git.sh: Allow manual override of `git submodule` handling**, instead
 
... ... Changes are in order per category, from newest to oldest:
200 200 later changed so as to be the ONLY method for downloading submodules, skipping later changed so as to be the ONLY method for downloading submodules, skipping
201 201 the actual git-submodule-update command entirely, on all projects.* the actual git-submodule-update command entirely, on all projects.*
202 202 * **Native NVMe driver added to the GRUB payload**, allowing users to boot from * **Native NVMe driver added to the GRUB payload**, allowing users to boot from
203 NVMe SSDs where present on a given mainboard. The patch is courtesy of
203 NVMe SSDs where present on a given motherboard. The patch is courtesy of
204 204 Mate Kukri, who ported SeaBIOS's own NVMe driver, converting all of the Mate Kukri, who ported SeaBIOS's own NVMe driver, converting all of the
205 205 code to run properly within GRUB's own kernel. NVMe SSDs are now fully code to run properly within GRUB's own kernel. NVMe SSDs are now fully
206 206 bootable on all machines that can have them, offering vastly superior bootable on all machines that can have them, offering vastly superior
 
... ... The changes are, from newest to earliest:
344 344 one you're reading about now so that they can be fixed, like this one was!) one you're reading about now so that they can be fixed, like this one was!)
345 345 * **Re-configured GRUB so that only the Haswell and Broadwell machines contain * **Re-configured GRUB so that only the Haswell and Broadwell machines contain
346 346 xHCI support**, where it doesn't cause any issues (and is required), while xHCI support**, where it doesn't cause any issues (and is required), while
347 other mainboards use a version of GRUB that lacks support for xHCI. This is a
347 other motherboards use a version of GRUB that lacks support for xHCI. This is a
348 348 mitigations against the bug reported in [lbmk mitigations against the bug reported in [lbmk
349 349 issue 216](https://codeberg.org/libreboot/lbmk/issues/216). This is done, by issue 216](https://codeberg.org/libreboot/lbmk/issues/216). This is done, by
350 350 using the new *multi-tree* GRUB handling, which is mentioned above in using the new *multi-tree* GRUB handling, which is mentioned above in
351 351 in the section (of this audit report) pertaining to *feature changes*, whereby in the section (of this audit report) pertaining to *feature changes*, whereby
352 each mainboard can have its own GRUB revisions and patches, with its own
352 each motherboard can have its own GRUB revisions and patches, with its own
353 353 GRUB configuration file (that could be uniquely optimised for it). GRUB configuration file (that could be uniquely optimised for it).
354 354 * **Fix vboot build issue when running lbmk in i686 (32-bit) host machines**. * **Fix vboot build issue when running lbmk in i686 (32-bit) host machines**.
355 355 The patch, courtesy of *Luke T. Schumaker*, adapts vboot's vmlinuz extract The patch, courtesy of *Luke T. Schumaker*, adapts vboot's vmlinuz extract
 
... ... The changes are, from newest to earliest:
393 393 supported a configuration whereby SeaBIOS reads a `bootorder` file in CBFS, supported a configuration whereby SeaBIOS reads a `bootorder` file in CBFS,
394 394 making it try to run the GRUB payload first, while still allowing you to making it try to run the GRUB payload first, while still allowing you to
395 395 interrupt by pressing ESC to bring up an alternative boot select menu. This interrupt by pressing ESC to bring up an alternative boot select menu. This
396 is now the *default*, on all x86 mainboards. This is a mitigation against
396 is now the *default*, on all x86 motherboards. This is a mitigation against
397 397 future instability in GRUB because, if such issues happen again, it will not future instability in GRUB because, if such issues happen again, it will not
398 398 cause a brick since you can just use SeaBIOS instead, and skip booting to cause a brick since you can just use SeaBIOS instead, and skip booting to
399 399 the GRUB payload (on the affected machines, BIOS GRUB still worked, which the GRUB payload (on the affected machines, BIOS GRUB still worked, which
400 400 your distro provides and SeaBIOS executes it). *NOTE: GRUB was later made your distro provides and SeaBIOS executes it). *NOTE: GRUB was later made
401 into a multi-tree project, with certain mainboards using a version that
401 into a multi-tree project, with certain motherboards using a version that
402 402 has the xHCI patches, if required, because the machines that actually need has the xHCI patches, if required, because the machines that actually need
403 403 xHCI support were not affected by the bug referenced in issue 216.* xHCI support were not affected by the bug referenced in issue 216.*
404 404 * Main build script: Check SUID before checking Git name/email, otherwise the * Main build script: Check SUID before checking Git name/email, otherwise the
File site/news/libreboot20241008.md changed (mode: 100644) (index 20ac041..baf52f9)
... ... The following boards have been added since the Libreboot 20240612 release:
70 70 ### About the Dell Latitude ports ### About the Dell Latitude ports
71 71
72 72 These are yet more Ivybridge (Intel 3rd gen) and Sandybridge (Intel 2nd gen) These are yet more Ivybridge (Intel 3rd gen) and Sandybridge (Intel 2nd gen)
73 mainboards, using the same EC as on other Latitudes supported in Libreboot, so
73 motherboards, using the same EC as on other Latitudes supported in Libreboot, so
74 74 they are all internally flashable from the factory firmware. they are all internally flashable from the factory firmware.
75 75
76 76 Installation instructions, pertaining to Dell Latitude models, can be found on Installation instructions, pertaining to Dell Latitude models, can be found on
 
... ... Mate Kukri's excellent *[deguard](https://review.coreboot.org/admin/repos/deguar
106 106 utility is automatically used at build time, utility is automatically used at build time,
107 107 to modify the ME, which has a bug on that platform allowing arbitrary execution. to modify the ME, which has a bug on that platform allowing arbitrary execution.
108 108 Using this bug, Mate was able to disable the Intel Boot Guard, on this 7th gen Using this bug, Mate was able to disable the Intel Boot Guard, on this 7th gen
109 mainboard. Without such a hack, coreboot would have previously been impossible!
109 motherboard. Without such a hack, coreboot would have previously been impossible!
110 110
111 111 I've made some fixes on top of it myself: adding HDA verb configuration, and I've made some fixes on top of it myself: adding HDA verb configuration, and
112 112 a VBT file. Mate will incorporate these changes in the patchset, which is still a VBT file. Mate will incorporate these changes in the patchset, which is still
 
... ... is also working on a ThinkPad T480 port, that is not yet ready on this day (the
119 119 port is on Gerrit but lacks EC support at the moment). port is on Gerrit but lacks EC support at the moment).
120 120
121 121 It may be possible to add many more Dell OptiPlex and other 7th gen (Intel It may be possible to add many more Dell OptiPlex and other 7th gen (Intel
122 Kaby Lake) mainboards to coreboot, using this hack. The *Boot Guard* is Intel
122 Kaby Lake) motherboards to coreboot, using this hack. The *Boot Guard* is Intel
123 123 DRM that normally checks a cryptographic signature on the bootblock in the DRM that normally checks a cryptographic signature on the bootblock in the
124 124 machine, and that bootblock cannot be changed. Various other hacks have also machine, and that bootblock cannot be changed. Various other hacks have also
125 125 been discovered in the past, such as Trammell been discovered in the past, such as Trammell
 
... ... The changes are as follows:
168 168 A bug in MEv11, on earlier revisions, enables arbitrary code execution. Mate A bug in MEv11, on earlier revisions, enables arbitrary code execution. Mate
169 169 was able to exploit this bug, to disable the Intel Boot Guard, which is was able to exploit this bug, to disable the Intel Boot Guard, which is
170 170 handled by the Intel ME. Currently used on the Dell OptiPlex 3050 Micro, but handled by the Intel ME. Currently used on the Dell OptiPlex 3050 Micro, but
171 could be expanded to support more mainboards. (**yes, you could have a libre
171 could be expanded to support more motherboards. (**yes, you could have a libre
172 172 ME firmware in the future, because of this bug! Though the Intel ME is ME firmware in the future, because of this bug! Though the Intel ME is
173 173 still required, albeit it with this hack and lbmk also runs `me_cleaner`**) still required, albeit it with this hack and lbmk also runs `me_cleaner`**)
174 174 * Relative to audit6: `lib.sh`: New `mk()` function can be used as shorthand * Relative to audit6: `lib.sh`: New `mk()` function can be used as shorthand
 
... ... The changes are as follows:
203 203 enabling `CONFIG_PAYLOAD_NONE` exclusively. However, advanced users may enabling `CONFIG_PAYLOAD_NONE` exclusively. However, advanced users may
204 204 wish to use something else such as Tianocore, which Libreboot may/will not wish to use something else such as Tianocore, which Libreboot may/will not
205 205 provide (with Tianocore it's **will not**). Simply set `build_depend=""` provide (with Tianocore it's **will not**). Simply set `build_depend=""`
206 in the `target.cfg` file for a given mainboard, and then enable a payload
206 in the `target.cfg` file for a given motherboard, and then enable a payload
207 207 under coreboot's menuconfig interface, or by direct modification of under coreboot's menuconfig interface, or by direct modification of
208 208 the defconfig file. When `CONFIG_PAYLOAD_NONE` is not set, lbmk will skip the defconfig file. When `CONFIG_PAYLOAD_NONE` is not set, lbmk will skip
209 209 adding a payload, because it's a given that then coreboot's own build system adding a payload, because it's a given that then coreboot's own build system
 
... ... The changes are as follows:
252 252 downloading of vendor files, without needing specific hacks to be hardcoded downloading of vendor files, without needing specific hacks to be hardcoded
253 253 in `script/trees`. The `./update trees -b coreboot TREE utils` command is in `script/trees`. The `./update trees -b coreboot TREE utils` command is
254 254 no longer available; instead, do `./update trees -d coreboot TREE`; if no longer available; instead, do `./update trees -d coreboot TREE`; if
255 the TREE argument is instead an actual mainboard target, it also does the
255 the TREE argument is instead an actual motherboard target, it also does the
256 256 vendor file download, if required. The `./vendor download` command is still vendor file download, if required. The `./vendor download` command is still
257 257 available, and multiple board names can now be provided as argument, because available, and multiple board names can now be provided as argument, because
258 258 for example, `./build roms x220_8mb x230_12mb` would for example, `./build roms x220_8mb x230_12mb` would
 
... ... The changes are as follows:
309 309 single-tree projects, defined *by argument*, but it was quite error prone single-tree projects, defined *by argument*, but it was quite error prone
310 310 and there's no clean way to otherwise do it. We don't use the script this and there's no clean way to otherwise do it. We don't use the script this
311 311 way, anywhere in lbmk, and users are advised the same. way, anywhere in lbmk, and users are advised the same.
312 * **`script/roms`: *Only* Support SeaBIOS and Sea*GRUB*, on x86 mainboards**.
312 * **`script/roms`: *Only* Support SeaBIOS and Sea*GRUB*, on x86 motherboards**.
313 313 SeaGRUB is a configuration whereby SeaBIOS starts first, but immediately tries SeaGRUB is a configuration whereby SeaBIOS starts first, but immediately tries
314 314 to load GRUB from the flash. This complements the other change, listed below. to load GRUB from the flash. This complements the other change, listed below.
315 315 We will no longer provide configurations where GRUB is the primary payload, We will no longer provide configurations where GRUB is the primary payload,
316 316 precisely to mitigate the same issue as described below (lbmk issue 216). precisely to mitigate the same issue as described below (lbmk issue 216).
317 If *GRUB* is enabled, on a given mainboard, SeaBIOS-only setups are not
317 If *GRUB* is enabled, on a given motherboard, SeaBIOS-only setups are not
318 318 provided; only SeaGRUB is provided. You can press ESC in the SeaGRUB menu, provided; only SeaGRUB is provided. You can press ESC in the SeaGRUB menu,
319 319 to access other boot methods besides *GRUB from flash*, so you can use it to access other boot methods besides *GRUB from flash*, so you can use it
320 320 in the same way; additionally, you can remove the `bootorder` file from CBFS in the same way; additionally, you can remove the `bootorder` file from CBFS
 
... ... The changes are as follows:
381 381 This mkhelper config also integrates `include/rom.sh`, containing these This mkhelper config also integrates `include/rom.sh`, containing these
382 382 functions. This replicates the functionality originally provided functions. This replicates the functionality originally provided
383 383 by `script/roms`. by `script/roms`.
384 * coreboot: Set `build_depend` on `target.cfg` files for specific mainboards.
384 * coreboot: Set `build_depend` on `target.cfg` files for specific motherboards.
385 385 This is used to manually specify which GRUB and SeaBIOS trees should be This is used to manually specify which GRUB and SeaBIOS trees should be
386 386 compiled, required when compiling for a specific target, for the next compiled, required when compiling for a specific target, for the next
387 387 stage where a payload is added to the coreboot image, because lbmk does stage where a payload is added to the coreboot image, because lbmk does
File site/news/libreboot20241206.Revisions.md changed (mode: 100644) (index 3595d7d..aec9d61)
... ... Revision 7 (18 December 2024)
122 122 ---------- ----------
123 123
124 124 Added support for fetching ThunderBolt firmware and padding it, on ThinkPad Added support for fetching ThunderBolt firmware and padding it, on ThinkPad
125 T480 and T480s mainboards. This can be used for externally flashing the newer
125 T480 and T480s motherboards. This can be used for externally flashing the newer
126 126 firmware update, without the need to boot Windows to use Lenovo's own updater. firmware update, without the need to boot Windows to use Lenovo's own updater.
127 127
128 128 Revision 8 (6 January 2025) Revision 8 (6 January 2025)
File site/news/libreboot20241206.md changed (mode: 100644) (index 0c9fe5e..56b32f9)
... ... implementation; that machine could not originally do UEFI.
56 56 This page lists all changes made since the *Libreboot 20241008* release. Since This page lists all changes made since the *Libreboot 20241008* release. Since
57 57 Libreboot 20241206 is a stable release, there has been a more conservative focus Libreboot 20241206 is a stable release, there has been a more conservative focus
58 58 on fixing bugs and in general polishing, though several interesting features on fixing bugs and in general polishing, though several interesting features
59 have been added, in addition to numerous new mainboards.
59 have been added, in addition to numerous new motherboards.
60 60
61 61 Summarised list of changes Summarised list of changes
62 62 ------------------------- -------------------------
 
... ... In descending order from latest changes to earliest changes:
84 84 generally for any MEv11-based board, whereas the previous version contained generally for any MEv11-based board, whereas the previous version contained
85 85 hacky hardcoded logic for only the Dell OptiPlex 3050 Micro. In this Libreboot hacky hardcoded logic for only the Dell OptiPlex 3050 Micro. In this Libreboot
86 86 release, deguard supports the 3050, but also the ThinkPad T480 and T480S, release, deguard supports the 3050, but also the ThinkPad T480 and T480S,
87 providing machine-specific ME configurations for each mainboard. Mate's new
87 providing machine-specific ME configurations for each motherboard. Mate's new
88 88 deguard implementation essentially does the same thing as Intel's FITC tool, deguard implementation essentially does the same thing as Intel's FITC tool,
89 89 though with a much more terse and minimalist design. It could be expanded for though with a much more terse and minimalist design. It could be expanded for
90 90 many other things in the future, related to Intel ME. many other things in the future, related to Intel ME.
 
... ... In descending order from the latest changes to the earliest changes:
143 143 boards will have U-Boot tweaks made to them, in subsequent hotfixes to boards will have U-Boot tweaks made to them, in subsequent hotfixes to
144 144 the Libreboot 20241206 release, and hotfixes to U-Boot itself are also likely, the Libreboot 20241206 release, and hotfixes to U-Boot itself are also likely,
145 145 since U-Boot still requires a lot more testing. U-Boot does work quite well since U-Boot still requires a lot more testing. U-Boot does work quite well
146 on a number of tested mainboards; if yours works, or doesn't work, please get
146 on a number of tested motherboards; if yours works, or doesn't work, please get
147 147 in touch with the Libreboot project, so that a tally can be kept. in touch with the Libreboot project, so that a tally can be kept.
148 148 * Added Libreboot branding/versioning to the U-Boot bootflow menu, showing * Added Libreboot branding/versioning to the U-Boot bootflow menu, showing
149 149 the Libreboot logo instead of the U-Boot one, and with a purple background the Libreboot logo instead of the U-Boot one, and with a purple background
 
... ... changes to the earliest changes):
206 206 on the host's x86\_64 toolchain, on an x86\_64 host. on the host's x86\_64 toolchain, on an x86\_64 host.
207 207 * Enabled the legacy 8254 timer on Dell OptiPlex 3050 Micro, to work around a * Enabled the legacy 8254 timer on Dell OptiPlex 3050 Micro, to work around a
208 208 hanging bug in SeaBIOS. This board was previously GRUB only, but now once again hanging bug in SeaBIOS. This board was previously GRUB only, but now once again
209 uses a more flexible SeaGRUB setup like other mainboards do. The static option
209 uses a more flexible SeaGRUB setup like other motherboards do. The static option
210 210 table was also disabled. table was also disabled.
211 211 * Merged a patch from Nicholas Chin, that tells the MEC5035 EC to send a correct * Merged a patch from Nicholas Chin, that tells the MEC5035 EC to send a correct
212 212 shutdown signal to the operating system when the power button is pressed. shutdown signal to the operating system when the power button is pressed.
 
... ... This log is relative to Libreboot 20241008:
299 299 * 0c7fb21a062 enable the serial console on thinkpad t60 * 0c7fb21a062 enable the serial console on thinkpad t60
300 300 * eb14a176bc8 Only boot 32-bit u-boot from grub, 64 from seabios * eb14a176bc8 Only boot 32-bit u-boot from grub, 64 from seabios
301 301 * 279e69172f7 make the u-boot grub menuentry more useful * 279e69172f7 make the u-boot grub menuentry more useful
302 * fdbdf0449b3 Re-enable U-Boot x86 on real mainboards
302 * fdbdf0449b3 Re-enable U-Boot x86 on real motherboards
303 303 * b549d1e5f38 u-boot x86 serial/ns16550: disable UART as needed * b549d1e5f38 u-boot x86 serial/ns16550: disable UART as needed
304 304 * eba73c778a8 Disable U-Boot x86 except on Qemu * eba73c778a8 Disable U-Boot x86 except on Qemu
305 305 * 4bc6ca545e7 fix U-Boot hotkey mention in grub.cfg * 4bc6ca545e7 fix U-Boot hotkey mention in grub.cfg
File site/news/microcode.md changed (mode: 100644) (index 74319a0..7f84567)
... ... about microcode on the [FAQ](../faq.md#microcode) and
21 21
22 22 In the next Libreboot releases, ROM images that *exclude* CPU microcode updates In the next Libreboot releases, ROM images that *exclude* CPU microcode updates
23 23 will once again be available. Libreboot's [Binary Blob Reduction will once again be available. Libreboot's [Binary Blob Reduction
24 Policy](policy.md) dictates that each mainboard must be provided with **as few**
24 Policy](policy.md) dictates that each motherboard must be provided with **as few**
25 25 binary blobs as possible, ideally **none**. *At present*, *all* x86 and ARM binary blobs as possible, ideally **none**. *At present*, *all* x86 and ARM
26 mainboards supported in Libreboot (in `lbmk.git` and in releases) can boot
26 motherboards supported in Libreboot (in `lbmk.git` and in releases) can boot
27 27 with entirely [free software](https://writefreesoftware.org/), with entirely [free software](https://writefreesoftware.org/),
28 28 requiring *zero* vendor files of any kind within *coreboot*. requiring *zero* vendor files of any kind within *coreboot*.
29 29
 
... ... these, or mitigate their existence (for example, `me_cleaner` is used on newer
37 37 Intel platforms). Intel platforms).
38 38
39 39 One exception made in that policy is that CPU microcode updates *must* be One exception made in that policy is that CPU microcode updates *must* be
40 provided by default, on all x86 mainboards. The ARM platforms do not use
40 provided by default, on all x86 motherboards. The ARM platforms do not use
41 41 microcode at all. This is a correct policy, because these updates fix critical microcode at all. This is a correct policy, because these updates fix critical
42 42 security and stability issues in the silicon; more information about that security and stability issues in the silicon; more information about that
43 43 can be found [here](policy.md#more-detailed-insight-about-microcode). Since can be found [here](policy.md#more-detailed-insight-about-microcode). Since
 
... ... The change was implemented by [this
81 81 patch](https://browse.libreboot.org/lbmk.git/commit/?id=f338697b96757977d2a14da00a91236595704fed) patch](https://browse.libreboot.org/lbmk.git/commit/?id=f338697b96757977d2a14da00a91236595704fed)
82 82 on 19 June 2023, in the Libreboot build system. on 19 June 2023, in the Libreboot build system.
83 83
84 In `board.cfg` for each mainboard defined (in Libreboot's build system, lbmk),
84 In `board.cfg` for each motherboard defined (in Libreboot's build system, lbmk),
85 85 the following entries are available: the following entries are available:
86 86
87 87 * `microcode_required="n" or "y"` (it's "n" on ALL boards) * `microcode_required="n" or "y"` (it's "n" on ALL boards)
 
... ... If `microcode_required="n"`, the given ROM image `filename.rom`
102 102 is either: is either:
103 103
104 104 * If no microcode file exists within it already, such as on ARM * If no microcode file exists within it already, such as on ARM
105 mainboards, the ROM is simply copied to: `filename_nomicrocode.rom`
105 motherboards, the ROM is simply copied to: `filename_nomicrocode.rom`
106 106 * If the ROM contains microcode (default on most x86 boards, except Qemu * If the ROM contains microcode (default on most x86 boards, except Qemu
107 107 or in rare cases where none are advised), `filename.rom` is retained and or in rare cases where none are advised), `filename.rom` is retained and
108 108 is copied to `filename_nomicrocode.rom`, and the CPU microcode update file is copied to `filename_nomicrocode.rom`, and the CPU microcode update file
109 109 shall be removed from `filename_nomicrocode.rom`. shall be removed from `filename_nomicrocode.rom`.
110 110
111 111 What this means is that ROMs *with* OR *without* microcode will be present, What this means is that ROMs *with* OR *without* microcode will be present,
112 where applicable, on ROM images for each given mainboard. This will be the case
112 where applicable, on ROM images for each given motherboard. This will be the case
113 113 by default, for ROM images provided in the next release of Libreboot and all by default, for ROM images provided in the next release of Libreboot and all
114 114 releases that follow. releases that follow.
115 115
 
... ... Example:
119 119 * `seabios_e6400_4mb_libgfxinit_txtmode_noblobs_nomicrocode.rom` * `seabios_e6400_4mb_libgfxinit_txtmode_noblobs_nomicrocode.rom`
120 120
121 121 It is *strongly* recommended, by the Libreboot project, that you It is *strongly* recommended, by the Libreboot project, that you
122 do *not* use the `_nomicrocode` ROMs on x86 mainboards. These updates
122 do *not* use the `_nomicrocode` ROMs on x86 motherboards. These updates
123 123 are *required* to implement stable x86 ISA, otherwise your CPU will behave are *required* to implement stable x86 ISA, otherwise your CPU will behave
124 124 in strange, unpredictable ways, which could cause severe bugs in software in strange, unpredictable ways, which could cause severe bugs in software
125 125 that cause *real* issues. Issues such as data loss. that cause *real* issues. Issues such as data loss.
 
... ... is what people would otherwise use; thus, Libreboot's modern policy is
143 143 pragmatic, advancing further the cause of *software freedom*. pragmatic, advancing further the cause of *software freedom*.
144 144
145 145 By contrast, Libreboot's previous policy was to *ban all binary blobs*, which By contrast, Libreboot's previous policy was to *ban all binary blobs*, which
146 meant that many mainboards from coreboot were excluded. This resulted in less
146 meant that many motherboards from coreboot were excluded. This resulted in less
147 147 people achieving a level of software freedom, because to this day, nothing people achieving a level of software freedom, because to this day, nothing
148 148 quite like Libreboot exists with the scope and ambition that it has. Libreboot quite like Libreboot exists with the scope and ambition that it has. Libreboot
149 149 makes coreboot as easy to use as possible for normal, non-technical people who makes coreboot as easy to use as possible for normal, non-technical people who
 
... ... like the idea of coreboot, but are not competent to configure it from scratch.
152 152 Accordingly, the old Libreboot policy, prior to November 2022, *harmed* the Accordingly, the old Libreboot policy, prior to November 2022, *harmed* the
153 153 Free Software movement. Such harm was *corrected* in November 2022 and, going Free Software movement. Such harm was *corrected* in November 2022 and, going
154 154 forward, it is the intention of the Libreboot project to eventually have forward, it is the intention of the Libreboot project to eventually have
155 build targets *for every mainboard that coreboot supports!*
155 build targets *for every motherboard that coreboot supports!*
156 156
157 157 ARM platforms ARM platforms
158 158 ------------- -------------
File site/news/policy.de.md changed (mode: 100644) (index 9d8136e..da0acd8)
... ... Einleitung
8 8 Dieser Artikel beschreibt die *Prinzipien* die das Libreboot Projekt definieren. Dieser Artikel beschreibt die *Prinzipien* die das Libreboot Projekt definieren.
9 9 Für Informationen darüber *wie diese Prinzipien in der Praxis angewendet Für Informationen darüber *wie diese Prinzipien in der Praxis angewendet
10 10 werden*, bitte lies diesen Artikel stattdessen: [Software and hardware werden*, bitte lies diesen Artikel stattdessen: [Software and hardware
11 freedom status for each mainboard supported by Libreboot](../freedom-status.md)
11 freedom status for each motherboard supported by Libreboot](../freedom-status.md)
12 12
13 13 Libreboot's Richtlinie ist für jeden Benutzer so viel Software Freiheit Libreboot's Richtlinie ist für jeden Benutzer so viel Software Freiheit
14 14 zu bieten wie möglich, auf jeglichem Bit von unterstützter Hardware, und zu bieten wie möglich, auf jeglichem Bit von unterstützter Hardware, und
 
... ... Blob *reduction* policy
68 68 Coreboot, upon which Libreboot is based, is mostly libre software but does Coreboot, upon which Libreboot is based, is mostly libre software but does
69 69 require vendor files on some platforms. A most common example might be raminit require vendor files on some platforms. A most common example might be raminit
70 70 (memory controller initialisation) or video framebuffer initialisation. The (memory controller initialisation) or video framebuffer initialisation. The
71 coreboot firmware uses certain vendor code for some of these tasks, on some mainboards,
72 but some mainboards from coreboot can be initialised with 100% libre source
71 coreboot firmware uses certain vendor code for some of these tasks, on some motherboards,
72 but some motherboards from coreboot can be initialised with 100% libre source
73 73 code, which you can inspect, and compile for your use. code, which you can inspect, and compile for your use.
74 74
75 75 Libreboot deals with this situation in a *strict* and *principled* way. The Libreboot deals with this situation in a *strict* and *principled* way. The
 
... ... The libreboot project has the following policy:
97 97 fact *required* as per libreboot policy. These updates fix CPU bugs, including fact *required* as per libreboot policy. These updates fix CPU bugs, including
98 98 security bugs, and since the CPU already has non-libre microcode burned into security bugs, and since the CPU already has non-libre microcode burned into
99 99 ROM anyway, the only choice is either *x86* or *broken x86*. Thus, libreboot ROM anyway, the only choice is either *x86* or *broken x86*. Thus, libreboot
100 will only allow coreboot mainboard configurations where microcode updates
101 are *enabled*, if available for the CPU on that mainboard.
100 will only allow coreboot motherboard configurations where microcode updates
101 are *enabled*, if available for the CPU on that motherboard.
102 102 [Releases after 20230423 will provide separate ROM images with microcode [Releases after 20230423 will provide separate ROM images with microcode
103 103 excluded, alongside the default ones that include microcode.](microcode.md) excluded, alongside the default ones that include microcode.](microcode.md)
104 104 * Intel Management Engine: in the libreboot documentation, words *must* be written * Intel Management Engine: in the libreboot documentation, words *must* be written
 
... ... FREEDOM CATALOG
144 144 A *[freedom status](../freedom-status.md)* page should also be made available, A *[freedom status](../freedom-status.md)* page should also be made available,
145 145 educating people about the software freedom status on each machine supported by educating people about the software freedom status on each machine supported by
146 146 the Libreboot build system. Please read: the Libreboot build system. Please read:
147 [Software and hardware freedom status for each mainboard supported by
147 [Software and hardware freedom status for each motherboard supported by
148 148 Libreboot](../freedom-status.md). Libreboot](../freedom-status.md).
149 149
150 150 It is desirable to see a world where all hardware and software is libre, under It is desirable to see a world where all hardware and software is libre, under
 
... ... You may ask: should the other firmwares be free too? The answer is **yes**, but
261 261 it's complicated: it's not always practical to even study those firmwares. For it's complicated: it's not always practical to even study those firmwares. For
262 262 example, there are so many webcams out there, so many SSDs, so many devices example, there are so many webcams out there, so many SSDs, so many devices
263 263 all doing the same thing, but implemented differently. Coreboot is already all doing the same thing, but implemented differently. Coreboot is already
264 hard enough, and there are so many mainboards out there.
264 hard enough, and there are so many motherboards out there.
265 265
266 266 For example: every SSD has its own controller, and it has to do a lot of For example: every SSD has its own controller, and it has to do a lot of
267 267 error correction at great speed, to mitigate the inherent unreliability of error correction at great speed, to mitigate the inherent unreliability of
 
... ... proprietary software at all, but in order to have less of it, we have to
381 381 have more - for now. have more - for now.
382 382
383 383 Let's take an extreme example: what if coreboot was entirely binary blobs Let's take an extreme example: what if coreboot was entirely binary blobs
384 for a given mainboard? Coreboot itself only initialises the hardware, and
384 for a given motherboard? Coreboot itself only initialises the hardware, and
385 385 jumps to a payload in the flash; in this case, the payload (e.g. GRUB) jumps to a payload in the flash; in this case, the payload (e.g. GRUB)
386 386 would still be free software. Surely, all free firmware would be better, would still be free software. Surely, all free firmware would be better,
387 387 but this is still an improvement over the original vendor firmware. The but this is still an improvement over the original vendor firmware. The
File site/news/policy.md changed (mode: 100644) (index 516855d..f16916d)
... ... Free as in freedom!
7 7
8 8 This article describes the *principles* that govern the Libreboot project. For This article describes the *principles* that govern the Libreboot project. For
9 9 information about *how those principles are applied in practise*, please read information about *how those principles are applied in practise*, please read
10 this article instead: [Software and hardware freedom status for each mainboard
10 this article instead: [Software and hardware freedom status for each motherboard
11 11 supported by Libreboot](../freedom-status.md) supported by Libreboot](../freedom-status.md)
12 12
13 13 Libreboot's policy is to provide as much Libreboot's policy is to provide as much
 
... ... Blob *reduction* policy
59 59 Coreboot, upon which Libreboot is based, is mostly libre software but does Coreboot, upon which Libreboot is based, is mostly libre software but does
60 60 require certain vendor code on some platforms. A most common example might be raminit require certain vendor code on some platforms. A most common example might be raminit
61 61 (memory controller initialisation) or video framebuffer initialisation. The (memory controller initialisation) or video framebuffer initialisation. The
62 coreboot firmware uses certain vendor code for some of these tasks, on some mainboards,
63 but some mainboards from coreboot can be initialised with 100% libre source
62 coreboot firmware uses certain vendor code for some of these tasks, on some motherboards,
63 but some motherboards from coreboot can be initialised with 100% libre source
64 64 code, which you can inspect, and compile for your use. code, which you can inspect, and compile for your use.
65 65
66 66 Libreboot deals with this situation in a *strict* and *principled* way. The Libreboot deals with this situation in a *strict* and *principled* way. The
 
... ... The libreboot project has the following policy:
88 88 fact *required* as per libreboot policy. These updates fix CPU bugs, including fact *required* as per libreboot policy. These updates fix CPU bugs, including
89 89 security bugs, and since the CPU already has non-libre microcode burned into security bugs, and since the CPU already has non-libre microcode burned into
90 90 ROM anyway, the only choice is either *x86* or *broken x86*. Thus, libreboot ROM anyway, the only choice is either *x86* or *broken x86*. Thus, libreboot
91 will only allow coreboot mainboard configurations where microcode updates
92 are *enabled*, if available for the CPU on that mainboard.
91 will only allow coreboot motherboard configurations where microcode updates
92 are *enabled*, if available for the CPU on that motherboard.
93 93 [Releases after 20230423 will provide separate ROM images with microcode [Releases after 20230423 will provide separate ROM images with microcode
94 94 excluded, alongside the default ones that include microcode.](microcode.md) excluded, alongside the default ones that include microcode.](microcode.md)
95 95 * Intel Management Engine: in the libreboot documentation, words *must* be written * Intel Management Engine: in the libreboot documentation, words *must* be written
 
... ... FREEDOM CATALOG
209 209 A *[freedom status](../freedom-status.md)* page should also be made available, A *[freedom status](../freedom-status.md)* page should also be made available,
210 210 educating people about the software freedom status on each machine supported by educating people about the software freedom status on each machine supported by
211 211 the Libreboot build system. Please read: the Libreboot build system. Please read:
212 [Software and hardware freedom status for each mainboard supported by
212 [Software and hardware freedom status for each motherboard supported by
213 213 Libreboot](../freedom-status.md). Libreboot](../freedom-status.md).
214 214
215 215 It is desirable to see a world where all hardware and software is libre, under It is desirable to see a world where all hardware and software is libre, under
 
... ... You may ask: should the other firmwares be free too? The answer is **yes**, but
323 323 it's complicated: it's not always practical to even study those firmwares. For it's complicated: it's not always practical to even study those firmwares. For
324 324 example, there are so many webcams out there, so many SSDs, so many devices example, there are so many webcams out there, so many SSDs, so many devices
325 325 all doing the same thing, but implemented differently. Coreboot is already all doing the same thing, but implemented differently. Coreboot is already
326 hard enough, and there are so many mainboards out there.
326 hard enough, and there are so many motherboards out there.
327 327
328 328 For example: every SSD has its own controller, and it has to do a lot of For example: every SSD has its own controller, and it has to do a lot of
329 329 error correction at great speed, to mitigate the inherent unreliability of error correction at great speed, to mitigate the inherent unreliability of
 
... ... proprietary software at all, but in order to have less of it, we have to
443 443 have more - for now. have more - for now.
444 444
445 445 Let's take an extreme example: what if coreboot was entirely binary blobs Let's take an extreme example: what if coreboot was entirely binary blobs
446 for a given mainboard? Coreboot itself only initialises the hardware, and
446 for a given motherboard? Coreboot itself only initialises the hardware, and
447 447 jumps to a payload in the flash; in this case, the payload (e.g. GRUB) jumps to a payload in the flash; in this case, the payload (e.g. GRUB)
448 448 would still be free software. Surely, all free firmware would be better, would still be free software. Surely, all free firmware would be better,
449 449 but this is still an improvement over the original vendor firmware. The but this is still an improvement over the original vendor firmware. The
File site/news/policy.uk.md changed (mode: 100644) (index 4b7eef4..1ce0d15)
... ... You may ask: should the other firmwares be free too? The answer is **yes**, but
252 252 it's complicated: it's not always practical to even study those firmwares. For it's complicated: it's not always practical to even study those firmwares. For
253 253 example, there are so many webcams out there, so many SSDs, so many devices example, there are so many webcams out there, so many SSDs, so many devices
254 254 all doing the same thing, but implemented differently. Coreboot is already all doing the same thing, but implemented differently. Coreboot is already
255 hard enough, and there are so many mainboards out there.
255 hard enough, and there are so many motherboards out there.
256 256
257 257 For example: every SSD has its own controller, and it has to do a lot of For example: every SSD has its own controller, and it has to do a lot of
258 258 error correction at great speed, to mitigate the inherent unreliability of error correction at great speed, to mitigate the inherent unreliability of
 
... ... proprietary software at all, but in order to have less of it, we have to
372 372 have more - for now. have more - for now.
373 373
374 374 Let's take an extreme example: what if coreboot was entirely binary blobs Let's take an extreme example: what if coreboot was entirely binary blobs
375 for a given mainboard? Coreboot itself only initialises the hardware, and
375 for a given motherboard? Coreboot itself only initialises the hardware, and
376 376 jumps to a payload in the flash; in this case, the payload (e.g. GRUB) jumps to a payload in the flash; in this case, the payload (e.g. GRUB)
377 377 would still be free software. Surely, all free firmware would be better, would still be free software. Surely, all free firmware would be better,
378 378 but this is still an improvement over the original vendor firmware. The but this is still an improvement over the original vendor firmware. The
File site/news/ports202402.md changed (mode: 100644) (index 6b8b2f8..417b59e)
4 4
5 5 Libreboot is a free/open source BIOS/UEFI replacement, providing boot firmware that initialises the hardware in your computer, to then load an operating system (e.g. Linux/BSD). It provides many additional benefits such as fast boot speeds, greater security and greater customisation, but the *primary* benefit is [software freedom](https://writefreesoftware.org/learn). Libreboot is a free/open source BIOS/UEFI replacement, providing boot firmware that initialises the hardware in your computer, to then load an operating system (e.g. Linux/BSD). It provides many additional benefits such as fast boot speeds, greater security and greater customisation, but the *primary* benefit is [software freedom](https://writefreesoftware.org/learn).
6 6
7 Libreboot has had a slew of new mainboards added recently. The work doesn't
7 Libreboot has had a slew of new motherboards added recently. The work doesn't
8 8 stop. Many more will be added, for the next Libreboot release. stop. Many more will be added, for the next Libreboot release.
9 9
10 10 The boards are: The boards are:
File site/news/safety.md changed (mode: 100644) (index 00883bd..14ce48f)
... ... Article
46 46 **If unsure, just follow this guide. If you follow this guide on a board that **If unsure, just follow this guide. If you follow this guide on a board that
47 47 does not need vendor files, the resulting ROM images will be identical and does not need vendor files, the resulting ROM images will be identical and
48 48 therefore nothing will have happened. The inject script is designed to insert therefore nothing will have happened. The inject script is designed to insert
49 certain files, only if required on a given mainboard.**
49 certain files, only if required on a given motherboard.**
50 50
51 51 **NOTE: Libreboot standardises on [flashprog](https://flashprog.org/wiki/Flashprog) **NOTE: Libreboot standardises on [flashprog](https://flashprog.org/wiki/Flashprog)
52 52 now, as of 27 January 2024, which is a fork of flashrom. now, as of 27 January 2024, which is a fork of flashrom.
 
... ... to any system that requires vendor code to be inserted inside ROM images.**
64 64 20240612, 20241008 and 20241206) 20240612, 20241008 and 20241206)
65 65
66 66 **UPDATE (16 August 2023): This also applies to the recently added Dell **UPDATE (16 August 2023): This also applies to the recently added Dell
67 Precision T1650 mainboard.**
67 Precision T1650 motherboard.**
68 68
69 69 As I write this post, [Libreboot 20230625](libreboot20230625.md) recently came As I write this post, [Libreboot 20230625](libreboot20230625.md) recently came
70 70 out. There's technically nothing unsafe about the release itself, but certain out. There's technically nothing unsafe about the release itself, but certain
71 users have been bricking their machines, on the following mainboards:
71 users have been bricking their machines, on the following motherboards:
72 72
73 73 * Sandybridge platforms (e.g. ThinkPad X220, T420) * Sandybridge platforms (e.g. ThinkPad X220, T420)
74 74 * Ivybridge platforms (e.g. ThinkPad X230, T430) * Ivybridge platforms (e.g. ThinkPad X230, T430)
 
... ... Instructions are given here, for how to insert these files on release ROMs:
102 102 [Insert vendor files on Sandybridge/Ivybridge/Haswell](../docs/install/ivy_has_common.md) [Insert vendor files on Sandybridge/Ivybridge/Haswell](../docs/install/ivy_has_common.md)
103 103
104 104 The linked guide makes use of vendor scripts, that The linked guide makes use of vendor scripts, that
105 handles *all* firmwares, automatically for each given mainboard. It can
105 handles *all* firmwares, automatically for each given motherboard. It can
106 106 automatically download and insert all of the following: automatically download and insert all of the following:
107 107
108 108 * Intel ME firmware * Intel ME firmware
File site/news/update202308.md changed (mode: 100644) (index 9f76866..f4112b9)
... ... Introduction
16 16
17 17 ### SeaBIOS and GRUB updates ### SeaBIOS and GRUB updates
18 18
19 For *all* mainboards that provide GRUB or SeaBIOS revisions, new versions of
19 For *all* motherboards that provide GRUB or SeaBIOS revisions, new versions of
20 20 these payloads are now used in Libreboot, as implemented by these patches: these payloads are now used in Libreboot, as implemented by these patches:
21 21
22 22 * GRUB is now on version 2.12-rc1 from 10 July 2023, where previously it was on * GRUB is now on version 2.12-rc1 from 10 July 2023, where previously it was on
File site/news/x201.md changed (mode: 100644) (index a9bffff..9b5f0e4)
4 4
5 5 Builds have also been removed from rsync, and build logic has been Builds have also been removed from rsync, and build logic has been
6 6 removed from lbmk. It was discovered that fan controls fail on this removed from lbmk. It was discovered that fan controls fail on this
7 mainboard, when you use a neutered Intel ME image. This issue seems
7 motherboard, when you use a neutered Intel ME image. This issue seems
8 8 to only affect these older arrandale machines; the issue was discovered to only affect these older arrandale machines; the issue was discovered
9 9 on X201 but probably affects the thinkpad T410, and other mobile on X201 but probably affects the thinkpad T410, and other mobile
10 10 arrandale machines. arrandale machines.
File site/other.md changed (mode: 100644) (index caab302..cdbe3e2)
... ... Several coreboot ports (e.g. MSI Z690-A PRO) were implemented directly by
82 82 the Dasharo project, and later upstreamed into the regular coreboot project. the Dasharo project, and later upstreamed into the regular coreboot project.
83 83
84 84 Dasharo has a special emphasis on commercial application, providing tailored Dasharo has a special emphasis on commercial application, providing tailored
85 coreboot images for each supported mainboard, with an emphasis on stability.
85 coreboot images for each supported motherboard, with an emphasis on stability.
86 86 It's a very different approach than Libreboot's approach; Libreboot provides It's a very different approach than Libreboot's approach; Libreboot provides
87 87 a more generalised design in its build system and infrastructure. a more generalised design in its build system and infrastructure.
88 88
File site/tasks/index.md changed (mode: 100644) (index 0bafb80..400742b)
... ... is not exhaustive, it just lists boards that are interesting to us at this time:
84 84 * HP EliteBook Folio 9480m * HP EliteBook Folio 9480m
85 85 * HP EliteBook 8770w * HP EliteBook 8770w
86 86 * HP EliteBook 840 G2 (not in coreboot yet, but should be similar to 820 G2) * HP EliteBook 840 G2 (not in coreboot yet, but should be similar to 820 G2)
87 * HP Z220 CMI and SFF mainboards
88 * MSI PRO Z690-A mainboard (supported by Dasharo, not sure about coreboot) -
89 also, Dasharo supports several more mainboards that aren't in coreboot
87 * HP Z220 CMI and SFF motherboards
88 * MSI PRO Z690-A motherboard (supported by Dasharo, not sure about coreboot) -
89 also, Dasharo supports several more motherboards that aren't in coreboot
90 90 proper. proper.
91 91 * KGPE-D16 and KCMA-D8: use the Dasharo fork of coreboot, instead * KGPE-D16 and KCMA-D8: use the Dasharo fork of coreboot, instead
92 92 of coreboot `4.11_branch`, because Dasharo's version is much more up to of coreboot `4.11_branch`, because Dasharo's version is much more up to
93 93 date and more reliable with raminit. D8 isn't supported by Dasharo, but it's date and more reliable with raminit. D8 isn't supported by Dasharo, but it's
94 not much different code-wise to the D16 mainboard, so differences
94 not much different code-wise to the D16 motherboard, so differences
95 95 in coreboot `4.11_branch` could be adapted to provide a Dasharo port. in coreboot `4.11_branch` could be adapted to provide a Dasharo port.
96 96
97 97 ### ThinkPad T430s and T431s ### ThinkPad T430s and T431s
 
... ... Not yet supported, but interesting for the project. Separated thus:
123 123
124 124 already supported by coreboot: already supported by coreboot:
125 125
126 * [ASUS P5Q mainboard](https://doc.coreboot.org/mainboard/asus/p5q.html) (ICH10 / i82801jx),
126 * [ASUS P5Q motherboard](https://doc.coreboot.org/mainboard/asus/p5q.html) (ICH10 / i82801jx),
127 127 known variants, e.g.: Pro, C, L-Pro, SE known variants, e.g.: Pro, C, L-Pro, SE
128 128 * Scan coreboot code for ICH9/ICH10 systems, or boards with x4x/gm45 based * Scan coreboot code for ICH9/ICH10 systems, or boards with x4x/gm45 based
129 129 northbridges. Many of these can boot blobless. northbridges. Many of these can boot blobless.
 
... ... being maintained anymore, so they were dropped. Some of those boards are
296 296 still quite decent today. Various efforts here and there have revived some still quite decent today. Various efforts here and there have revived some
297 297 of them, e.g. the Dasharo project. of them, e.g. the Dasharo project.
298 298
299 Also referenced there: Biostar A68N-5200 mainboard. Check
299 Also referenced there: Biostar A68N-5200 motherboard. Check
300 300 coreboot `4.18_branch` for these boards. Coreboot started removing the coreboot `4.18_branch` for these boards. Coreboot started removing the
301 301 AGESA boards after release 4.11. AGESA boards after release 4.11.
302 302
 
... ... before [argon2 kdf support](../news/argon2.md) was merged in Libreboot GRUB.
501 501 Seek QUBES endorsement Seek QUBES endorsement
502 502 ---------------------- ----------------------
503 503
504 Libreboot is compatible with Qubes, on several supported mainboards. This could
504 Libreboot is compatible with Qubes, on several supported motherboards. This could
505 505 be audited, to provide a complete list. Qubes has a page on their website which be audited, to provide a complete list. Qubes has a page on their website which
506 506 lists compatible devices. lists compatible devices.
507 507
 
... ... This is the preferred method and should be the default (enabled by default),
605 605 because it can be done from GRUB. So, it could be provided on GRUB setups. because it can be done from GRUB. So, it could be provided on GRUB setups.
606 606
607 607 We could make it so that all menuentries in the default Libreboot GRUB menu We could make it so that all menuentries in the default Libreboot GRUB menu
608 enable this, when possible on a given mainboard. The GRUB *shell* would not
608 enable this, when possible on a given motherboard. The GRUB *shell* would not
609 609 enable it, and special menuentries that don't enable it could be provided (or enable it, and special menuentries that don't enable it could be provided (or
610 610 an entirely separate GRUB config, e.g. `grub_unprotected.cfg`). an entirely separate GRUB config, e.g. `grub_unprotected.cfg`).
611 611
 
... ... or it isn't a VGA ROM. We currently extract an nvidia ROM for certain models
842 842 of Dell Latitude E6400, but the logic is more or less hardcoded. of Dell Latitude E6400, but the logic is more or less hardcoded.
843 843
844 844 The script at `script/vendor/download` auto-downloads vendor firmwares needed The script at `script/vendor/download` auto-downloads vendor firmwares needed
845 on certain mainboards, during build time. Libreboot's build system
845 on certain motherboards, during build time. Libreboot's build system
846 846 uses the script at `script/vendor/inject` to add or remove such files after uses the script at `script/vendor/inject` to add or remove such files after
847 847 the fact, on release ROMs, because those firmwares are *deleted* at release the fact, on release ROMs, because those firmwares are *deleted* at release
848 848 time. This work began mostly after mid-2022, and has since been expanded to time. This work began mostly after mid-2022, and has since been expanded to
849 cover many types of firmwares, used on various mainboards.
849 cover many types of firmwares, used on various motherboards.
850 850
851 851 Investigate 16MB flash setups Investigate 16MB flash setups
852 852 ----------------------------- -----------------------------
 
... ... documentation whenever possible.
936 936 Static compiled utils in releases Static compiled utils in releases
937 937 --------------------------------- ---------------------------------
938 938
939 We curerntly only provide binaries of the firmware itself, for each mainboard,
939 We curerntly only provide binaries of the firmware itself, for each motherboard,
940 940 but we do not provide utilities compiled. We provide only source code, and the but we do not provide utilities compiled. We provide only source code, and the
941 941 user is expected to compile utilities from source. user is expected to compile utilities from source.
942 942
 
... ... Download repositories in bulk
949 949
950 950 At present, lbmk does what it needs to do, and downloads repositories only as At present, lbmk does what it needs to do, and downloads repositories only as
951 951 required, upon each stage of the boot process. For example, it may download required, upon each stage of the boot process. For example, it may download
952 gnulib when downloading GRUb, after having maybe built 5 mainboards all with
952 gnulib when downloading GRUb, after having maybe built 5 motherboards all with
953 953 only SeaBIOS, having built SeaBIOS before those 5 - it doesn't build SeaBIOS only SeaBIOS, having built SeaBIOS before those 5 - it doesn't build SeaBIOS
954 954 and GRUB before the 5. and GRUB before the 5.
955 955
 
... ... fewer bytes of code within it.
1049 1049
1050 1050 From an lbmk perspective, the upsides are largely ignored because we want to From an lbmk perspective, the upsides are largely ignored because we want to
1051 1051 build hundreds and hundreds of ROM images, fast. That means reducing the amount build hundreds and hundreds of ROM images, fast. That means reducing the amount
1052 of time spent to compile for each mainboard.
1052 of time spent to compile for each motherboard.
1053 1053
1054 We currently do this on each mainboard:
1054 We currently do this on each motherboard:
1055 1055
1056 1056 * libgfxinit with text mode startup, if possible * libgfxinit with text mode startup, if possible
1057 1057 * libgfxinit with coreboot framebuffer, if possible * libgfxinit with coreboot framebuffer, if possible
 
... ... This might be useful for:
1270 1270 ### Partial coreboot re-builds ### Partial coreboot re-builds
1271 1271
1272 1272 A lot of the time in lbmk, we are building multiple variants of the same A lot of the time in lbmk, we are building multiple variants of the same
1273 mainboard, for different setups. We could skip a lot of the re-building.
1273 motherboard, for different setups. We could skip a lot of the re-building.
1274 1274 This pretty much goes hand in hand with the other entry on this TODO page, This pretty much goes hand in hand with the other entry on this TODO page,
1275 1275 about spliting up the various stages in coreboot, and handling CBFS generation about spliting up the various stages in coreboot, and handling CBFS generation
1276 1276 within lbmk. within lbmk.
 
... ... It allows the host CPU to access all of VRAM at once, without 32-bit legacy
1605 1605 code. The above repository is a proof of concept that shows it working, though code. The above repository is a proof of concept that shows it working, though
1606 1606 the work there is not directly applicable to us. the work there is not directly applicable to us.
1607 1607
1608 This feature is only supported commercially on much newer mainboards, and is
1609 unavailable on many older mainboards, but it can be added if the firmware is
1608 This feature is only supported commercially on much newer motherboards, and is
1609 unavailable on many older motherboards, but it can be added if the firmware is
1610 1610 updated. This is one of the benefits of the *freedom* coreboot gives you. We updated. This is one of the benefits of the *freedom* coreboot gives you. We
1611 1611 could enable this on all the older desktop machines, where otherwise their could enable this on all the older desktop machines, where otherwise their
1612 1612 factory firmware does not and will not enable it (and the above link is for factory firmware does not and will not enable it (and the above link is for
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