Subject | Hash | Author | Date (UTC) |
---|---|---|---|
add CPs interrupts | 35f9940a0ac89e875d852b8ca32009954d92faa5 | Sylvain BERTRAND | 2012-10-06 13:23:06 |
tiling, hdp fixes | aacf6796f68771f4f6b680844ae495147849ec64 | Sylvain BERTRAND | 2012-10-06 02:51:51 |
minor cps cleanup | ed2a417ef5177972951226b2d6988257ab66c935 | Sylvain BERTRAND | 2012-10-05 11:04:15 |
pattern: triangle, not crashing the GPU anymore | 8d21ea32a699a9796e2c89fd69469d4f3da3f96d | Sylvain BERTRAND | 2012-09-27 13:09:55 |
triangle pattern code, not working | 750cb80c49e44266398ff9c920192b5b5d7ba5a1 | Sylvain BERTRAND | 2012-09-26 18:13:46 |
linux 3.5.3 | abd704f81d01024f1398b51fbb29e429f6f60ec2 | Sylvain BERTRAND | 2012-09-12 12:08:29 |
hw deals properly with pwr gating crtc pairs | b5c8a75222e00819814dcff0a4042cd186ebb4ec | Sylvain BERTRAND | 2012-09-03 09:39:54 |
upstream: agressive shutdown of memory requests | 1e88e5a202ba227e7d5e95f7047b8ee7ca647792 | Sylvain BERTRAND | 2012-08-22 23:19:59 |
towards basic GPU programming | 01acf921a2efddf521967487865a49347f3f4045 | Sylvain BERTRAND | 2012-08-16 00:28:19 |
triangle pattern plumbering | 853a73e0052f48b9183f16d02ea9398a2556d040 | Sylvain BERTRAND | 2012-08-13 15:26:43 |
pattern ioctl, framebuffer fill pattern | 9c59bb9b9c16bbb822587b2a44ab38f38a4371ac | Sylvain BERTRAND | 2012-08-12 10:51:09 |
context clear of command processors | 9e02a78b903706e3df0af0abc24322c62317c13e | Sylvain BERTRAND | 2012-08-09 23:09:38 |
register love | de4d6c0aa40f2ca9f2d69190d14bc651f7612b06 | Sylvain BERTRAND | 2012-08-09 22:55:11 |
mainly cosmetics | 11a2377b2c41cc118078170e6e6fb589fc5937a0 | Sylvain BERTRAND | 2012-08-09 08:04:21 |
try to improve stability | 25211097e7ecfd370feed5c5d682d26d80c96ae2 | Sylvain BERTRAND | 2012-08-05 18:40:17 |
wrong micro engine magic init magic numbers | 0d2d45c69b909788418b0d87b7c6727292d2ef70 | Sylvain BERTRAND | 2012-08-05 16:57:34 |
relocate set pci master | b62baf5e967e3ad6b4f4c5319beec6f7a5225de0 | Sylvain BERTRAND | 2012-08-04 21:10:37 |
don't be too hasty at dp hotplug connexion | 17a2687ef35639fe70d860b46e45ed061b04999f | Sylvain BERTRAND | 2012-08-04 20:24:12 |
near-stateless drive code update finish | aecf726cba83d6df6e1f49c88d69d2c9ccdda2a8 | Sylvain BERTRAND | 2012-08-04 14:51:30 |
PCI ids and ih start update and check | 1508d1084e1878b57091a81177667709408d6c0d | Sylvain BERTRAND | 2012-08-02 12:34:20 |
File | Lines added | Lines deleted |
---|---|---|
drivers/gpu/alga/amd/si/drv.c | 1 | 0 |
drivers/gpu/alga/amd/si/gpu/cps.c | 17 | 0 |
drivers/gpu/alga/amd/si/gpu/cps.h | 2 | 0 |
drivers/gpu/alga/amd/si/intr_irq.c | 1 | 5 |
File drivers/gpu/alga/amd/si/drv.c changed (mode: 100644) (index d6d7f00..82a375a) | |||
... | ... | static int __devinit probe(struct pci_dev *dev, const struct pci_device_id *id) | |
408 | 408 | ||
409 | 409 | pci_set_master(dev); | pci_set_master(dev); |
410 | 410 | dce6_hpds_intr_ena(dd->dce); | dce6_hpds_intr_ena(dd->dce); |
411 | cps_intr_ena(dev); | ||
411 | 412 | ||
412 | 413 | /*--------------------------------------------------------------------*/ | /*--------------------------------------------------------------------*/ |
413 | 414 | /* userland interface setup */ | /* userland interface setup */ |
File drivers/gpu/alga/amd/si/gpu/cps.c changed (mode: 100644) (index e21baec..2927d81) | |||
... | ... | void cps_ctx_clr(struct pci_dev *dev) | |
524 | 524 | cp2_commit(dev); | cp2_commit(dev); |
525 | 525 | } | } |
526 | 526 | ||
527 | void cps_intr_ena(struct pci_dev *dev) | ||
528 | { | ||
529 | wr32(dev, CICR_CNTX_BUSY_INT_ENA | CICR_CNTX_EMPTY_INT_ENA | ||
530 | | CICR_TIME_STAMP_INT_ENA, CP_INT_CTL_RING_0); | ||
531 | wr32(dev, CICR_TIME_STAMP_INT_ENA, CP_INT_CTL_RING_1); | ||
532 | wr32(dev, CICR_TIME_STAMP_INT_ENA, CP_INT_CTL_RING_2); | ||
533 | } | ||
534 | |||
535 | void cps_intr_reset(struct pci_dev *dev) | ||
536 | { | ||
537 | /* works even if ucode is not loaded */ | ||
538 | wr32(dev, CICR_CNTX_BUSY_INT_ENA | CICR_CNTX_EMPTY_INT_ENA, | ||
539 | CP_INT_CTL_RING_0); | ||
540 | wr32(dev, CICR_TIME_STAMP_INT_ENA, 0); | ||
541 | wr32(dev, CICR_TIME_STAMP_INT_ENA, 0); | ||
542 | } | ||
543 | |||
527 | 544 | static int pfp_ucode_program(struct pci_dev *dev) | static int pfp_ucode_program(struct pci_dev *dev) |
528 | 545 | { | { |
529 | 546 | const struct firmware *fw; | const struct firmware *fw; |
File drivers/gpu/alga/amd/si/gpu/cps.h changed (mode: 100644) (index 6b54c80..947f96a) | |||
... | ... | struct cp | |
117 | 117 | unsigned rptr; /* dword index in ring buffer: accounted by GPU */ | unsigned rptr; /* dword index in ring buffer: accounted by GPU */ |
118 | 118 | }; | }; |
119 | 119 | ||
120 | void cps_intr_ena(struct pci_dev *dev); | ||
121 | void cps_intr_reset(struct pci_dev *dev); | ||
120 | 122 | int cps_engines_ucode_program(struct pci_dev *dev); | int cps_engines_ucode_program(struct pci_dev *dev); |
121 | 123 | void cps_engines_stop(struct pci_dev *dev); | void cps_engines_stop(struct pci_dev *dev); |
122 | 124 | void cps_init(struct pci_dev *dev); | void cps_init(struct pci_dev *dev); |
File drivers/gpu/alga/amd/si/intr_irq.c changed (mode: 100644) (index 9f1f461..78cacff) | |||
... | ... | void intrs_reset(struct pci_dev *dev) | |
27 | 27 | struct dev_drv_data *dd; | struct dev_drv_data *dd; |
28 | 28 | dd = pci_get_drvdata(dev); | dd = pci_get_drvdata(dev); |
29 | 29 | ||
30 | /* works even if ucode is not loaded */ | ||
31 | wr32(dev, CICR_CNTX_BUSY_INT_ENA | CICR_CNTX_EMPTY_INT_ENA, | ||
32 | CP_INT_CTL_RING_0); | ||
33 | wr32(dev, 0, CP_INT_CTL_RING_1); | ||
34 | wr32(dev, 0, CP_INT_CTL_RING_2); | ||
30 | cps_intr_reset(dev); | ||
35 | 31 | ||
36 | 32 | wr32(dev, 0, GRBM_INT_CTL); | wr32(dev, 0, GRBM_INT_CTL); |
37 | 33 |