List of commits:
Subject Hash Author Date (UTC)
RLC update b55639d2d423e6c90110470df9e05ffe3132fbaf Sylvain BERTRAND 2012-08-02 09:58:35
probe not freezing anymore 696553860664b34295d5628dc5afc89168483cac Sylvain BERTRAND 2012-08-01 18:49:14
DCE needs running MC 6afead30e8403aa0eab6c8a0db940a75fced6362 Sylvain BERTRAND 2012-08-01 18:32:17
dce6 online 9d9f1eaef5e5de789e992dc577c1d4f454da47f3 Sylvain BERTRAND 2012-07-31 22:59:41
update atombios set pixel mode 8b22745c66edd8ba7187bef3a96d7b2537b5b003 Sylvain BERTRAND 2012-07-29 22:40:06
si lut code 973e26e467bbe81e2e113aefa9fe35fd8dad18e2 Sylvain BERTRAND 2012-07-29 14:20:21
driver upgrade continued aade78ad4ccb4c1d59a59b6b9b265a58890fe733 Sylvain BERTRAND 2012-07-26 12:52:49
driver upgrade to si continued aa95cdd8e8cf9345a1a0ae41e9939280f46d58ba Sylvain BERTRAND 2012-07-25 23:06:27
si upgrade continuing... 16334c7d664a9c317f94f2a797d46430dab5b5e9 Sylvain BERTRAND 2012-07-24 22:26:44
Initial commit 3389e62de3050a725a673bd3564c49a83f626b33 Sylvain BERTRAND 2012-07-23 21:29:37
Commit b55639d2d423e6c90110470df9e05ffe3132fbaf - RLC update
Author: Sylvain BERTRAND
Author date (UTC): 2012-08-02 09:58
Committer name: Sylvain BERTRAND
Committer date (UTC): 2012-08-02 09:58
Parent(s): 696553860664b34295d5628dc5afc89168483cac
Signer:
Signing key:
Signing status: N
Tree: 1390b69025ba52b8d2b76ee2ada1b1964f39a3db
File Lines added Lines deleted
drivers/gpu/alga/amd/si/drv.c 59 4
drivers/gpu/alga/amd/si/drv.h 7 0
drivers/gpu/alga/amd/si/regs.h 2 2
drivers/gpu/alga/amd/si/ucode.c 27 28
drivers/gpu/alga/amd/si/ucode.h 2 2
File drivers/gpu/alga/amd/si/drv.c changed (mode: 100644) (index d98782b..155a675)
... ... static irqreturn_t irq(int irq, void *dev_id)
601 601 return IRQ_NONE; return IRQ_NONE;
602 602 } }
603 603
604 static void rlc_stop(struct pci_dev *dev)
605 {
606 wr32(dev, 0, RLC_CTL);
607 }
608
609 static void rlc_start(struct pci_dev *dev)
610 {
611 wr32(dev, RLC_ENA, RLC_CTL);
612 }
613
614 static void rlc_free(struct pci_dev *dev)
615 {
616 struct dev_drv_data *dd;
617 dd = pci_get_drvdata(dev);
618 rng_free(&dd->vram.mng, dd->rlc.save_and_restore);
619 rng_free(&dd->vram.mng, dd->rlc.clr_and_restore);
620 }
621
622 static int rlc_alloc(struct pci_dev *dev)
623 {
624 struct dev_drv_data *dd;
625 int r;
626
627 dd = pci_get_drvdata(dev);
628
629 r = rng_alloc_align(&dd->rlc.save_and_restore, &dd->vram.mng,
630 GPU_PAGE_SZ, GPU_PAGE_SZ);
631 if (r != 0) {
632 dev_err(&dev->dev, "unable to alloc GPU RLC save and restore"
633 " page\n");
634 return -SI_ERR;
635 }
636
637 r = rng_alloc_align(&dd->rlc.clr_and_restore, &dd->vram.mng,
638 GPU_PAGE_SZ, GPU_PAGE_SZ);
639 if (r != 0) {
640 dev_err(&dev->dev, "unable to alloc GPU RLC clear and restore"
641 " page\n");
642 goto free_save_and_restore;
643 }
644 return 0;
645
646 free_save_and_restore:
647 rng_free(&dd->vram.mng, dd->rlc.save_and_restore);
648 return -SI_ERR;
649 }
650
604 651 /* override the memory configuration */ /* override the memory configuration */
605 652 static void addr_cfg_compute(struct pci_dev *dev, u32 *addr_cfg, static void addr_cfg_compute(struct pci_dev *dev, u32 *addr_cfg,
606 653 unsigned *mem_row_sz_kb) unsigned *mem_row_sz_kb)
 
... ... static int __devinit probe(struct pci_dev *dev, const struct pci_device_id *id)
754 801 cps_engines_stop(dev); cps_engines_stop(dev);
755 802 ih_stop(dev); ih_stop(dev);
756 803 ih_reset(dev); ih_reset(dev);
804 rlc_stop(dev);
757 805 intrs_reset(dev); intrs_reset(dev);
758 806
759 807 err = request_threaded_irq(dev->irq, irq, irq_thd, 0, pci_name(dev), err = request_threaded_irq(dev->irq, irq, irq_thd, 0, pci_name(dev),
 
... ... static int __devinit probe(struct pci_dev *dev, const struct pci_device_id *id)
803 851
804 852 gpu_init(dev, addr_cfg, mem_row_sz_kb); gpu_init(dev, addr_cfg, mem_row_sz_kb);
805 853
854 err = rlc_alloc(dev);
855 if (err)
856 goto err_shutdown_dce6;
806 857
807 ////KEEP GOING HERE
808
809
810 //ucode_rlc_program(dev);
858 ucode_rlc_program(dev);
859 rlc_start(dev);
811 860 //ih_init(dev); //ih_init(dev);
812 861
813 862 //ih_start(dev); //ih_start(dev);
 
... ... err_cdev_del:
842 891 err_stop_cps_engines: err_stop_cps_engines:
843 892 cps_engines_stop(dev); cps_engines_stop(dev);
844 893 ih_stop(dev); ih_stop(dev);
894 rlc_stop(dev);
895 rlc_free(dev);
896
897 err_shutdown_dce6:
845 898 dce6_shutdown(dd->dce); dce6_shutdown(dd->dce);
846 899
847 900 err_ba_unmap: err_ba_unmap:
 
... ... static void __devexit remove(struct pci_dev *dev)
906 959 cps_engines_stop(dev); cps_engines_stop(dev);
907 960 ih_stop(dev); ih_stop(dev);
908 961 ih_reset(dev); ih_reset(dev);
962 rlc_stop(dev);
963 rlc_free(dev);
909 964 dce6_shutdown(dd->dce); dce6_shutdown(dd->dce);
910 965 kfree(dd->dce); kfree(dd->dce);
911 966 free_irq(dev->irq, (void*)dev); free_irq(dev->irq, (void*)dev);
File drivers/gpu/alga/amd/si/drv.h changed (mode: 100644) (index e77961c..d6d0d27)
... ... struct cfg {
42 42 unsigned gpu_sc_hiz_tile_fifo_sz; unsigned gpu_sc_hiz_tile_fifo_sz;
43 43 unsigned gpu_sc_earlyz_tile_fifo_sz; unsigned gpu_sc_earlyz_tile_fifo_sz;
44 44 }; };
45
46 struct rlc {
47 u64 save_and_restore; /* one gpu page in (v)ram */
48 u64 clr_and_restore; /* one gpu page in (v)ram */
49 };
50
45 51 struct dev_drv_data { struct dev_drv_data {
46 52 struct hlist_node node; struct hlist_node node;
47 53
 
... ... struct dev_drv_data {
61 67 struct cp cp1; struct cp cp1;
62 68 struct cp cp2; struct cp cp2;
63 69 struct ih ih; struct ih ih;
70 struct rlc rlc;
64 71
65 72 /* userland */ /* userland */
66 73 struct cdev si_cdev; struct cdev si_cdev;
File drivers/gpu/alga/amd/si/regs.h changed (mode: 100644) (index 44dd7d2..6a28ce3)
841 841 #define RLC_LB_CTL 0xc30c #define RLC_LB_CTL 0xc30c
842 842 #define RLC_SAVE_AND_RESTORE_BASE 0xc310 #define RLC_SAVE_AND_RESTORE_BASE 0xc310
843 843 #define RLC_LB_CNTR_MAX 0xc314 #define RLC_LB_CNTR_MAX 0xc314
844 #define RLC_LB_CNTR_INT 0xc318
844 #define RLC_LB_CNTR_INIT 0xc318
845 845
846 #define RLC_CLR_STATE_RESTORE_BASE 0xc320
846 #define RLC_CLR_AND_RESTORE_BASE 0xc320
847 847
848 848 #define RLC_UCODE_ADDR 0xc32c #define RLC_UCODE_ADDR 0xc32c
849 849 #define RLC_UCODE_DATA 0xc330 #define RLC_UCODE_DATA 0xc330
File drivers/gpu/alga/amd/si/ucode.c changed (mode: 100644) (index 37f3f15..f03e634)
... ... out:
179 179 return err; return err;
180 180 } }
181 181
182 //void ucode_rlc_program(struct pci_dev *dev)
183 //{
184 // u32 i;
185 // const __be32 *fw_data;
186 // struct dev_drv_data *dd;
187 //
188 // dd = pci_get_drvdata(dev);
189 //
190 // wr32(dev, 0, RLC_CTL);
191 //
192 // wr32(dev, 0, RLC_HB_BASE);
193 // wr32(dev, 0, RLC_HB_CTL);
194 // wr32(dev, 0, RLC_HB_RPTR);
195 // wr32(dev, 0, RLC_HB_WPTR);
196 // wr32(dev, 0, RLC_HB_WPTR_LSB_ADDR);
197 // wr32(dev, 0, RLC_HB_WPTR_MSB_ADDR);
198 // wr32(dev, 0, RLC_MC_CTL);
199 // wr32(dev, 0, RLC_UCODE_CTL);
200 //
201 // fw_data = (const __be32 *)dd->ucode.rlc->data;
202 // for (i = 0; i < RLC_DWS; ++i) {
203 // wr32(dev, i, RLC_UCODE_ADDR);
204 // wr32(dev, be32_to_cpup(fw_data++), RLC_UCODE_DATA);
205 // }
206 // wr32(dev, 0, RLC_UCODE_ADDR);
207 //
208 // wr32(dev, RLC_ENA, RLC_CTL);
209 //}
182 void ucode_rlc_program(struct pci_dev *dev)
183 {
184 u32 i;
185 const __be32 *fw_data;
186 struct dev_drv_data *dd;
187
188 dd = pci_get_drvdata(dev);
189
190 wr32(dev, 0, RLC_RL_BASE);
191 wr32(dev, 0, RLC_RL_SZ);
192 wr32(dev, 0, RLC_LB_CTL);
193 wr32(dev, 0xffffffff, RLC_LB_CNTR_MAX);
194 wr32(dev, 0, RLC_LB_CNTR_INIT);
195
196 wr32(dev, dd->rlc.save_and_restore >> 8, RLC_SAVE_AND_RESTORE_BASE);
197 wr32(dev, dd->rlc.clr_and_restore >> 8, RLC_CLR_AND_RESTORE_BASE);
198
199 wr32(dev, 0, RLC_MC_CTL);
200 wr32(dev, 0, RLC_UCODE_CTL);
201
202 fw_data = (const __be32 *)dd->ucode.rlc->data;
203 for (i = 0; i < RLC_DWS; ++i) {
204 wr32(dev, i, RLC_UCODE_ADDR);
205 wr32(dev, be32_to_cpup(fw_data++), RLC_UCODE_DATA);
206 }
207 wr32(dev, 0, RLC_UCODE_ADDR);
208 }
210 209
211 210 //void ucode_cp_program(struct pci_dev *dev) //void ucode_cp_program(struct pci_dev *dev)
212 211 //{ //{
File drivers/gpu/alga/amd/si/ucode.h changed (mode: 100644) (index ba5158e..e97b2d0)
... ... struct ucode
16 16
17 17 int ucode_load(struct pci_dev *dev); int ucode_load(struct pci_dev *dev);
18 18 void ucode_release(struct pci_dev *dev); void ucode_release(struct pci_dev *dev);
19 //void ucode_rlc_program(struct pci_dev *dev);
19 void ucode_rlc_program(struct pci_dev *dev);
20 20 //void ucode_cp_program(struct pci_dev *dev); //void ucode_cp_program(struct pci_dev *dev);
21 21 void ucode_mc_program(struct pci_dev *dev); void ucode_mc_program(struct pci_dev *dev);
22 #endif /* _UCODE_H */
22 #endif
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