List of commits:
Subject Hash Author Date (UTC)
init the smc mc arb freq set e276bc781e0e1ec9f7550c9bc8ffdb8de253be8b Sylvain BERTRAND 2014-01-24 16:22:31
smc_eng_pll_tbl init 323df7359605e25ac08800ca960bd3eb2267bc87 Sylvain BERTRAND 2014-01-24 15:50:18
factor out enging pll params computation 0c99b244c1a699abca8493097a8b1f82299b6721 Sylvain BERTRAND 2014-01-24 14:25:57
missed one file 99e76ae1afc06031299b77b3b1d7fbe80b869bc0 Sylvain BERTRAND 2014-01-24 13:03:50
atombios:eng mem pll used only for eng from SI dcdbc070fe4d7a9380ba27bb33274484d2725746 Sylvain BERTRAND 2014-01-24 13:01:43
mc arb tbl init c2d2e29d33a70910eaa09618ecb53783e976bea7 Sylvain BERTRAND 2014-01-24 11:06:39
preliminary support for smc mc arb reg set 0b7c90e4ccb988596b95ffccea10a2359ba585cd Sylvain BERTRAND 2014-01-23 16:57:47
removal of mc reg tbl slot idx duplicates 2b500504c5a651ed8f24df1fc43150cd205d8985 Sylvain BERTRAND 2014-01-23 14:08:10
mc regs set init for the driver state 7a9c50e02784f93d3443720d063b93829b9a57a1 Sylvain BERTRAND 2014-01-23 12:17:25
mc reg tbl init for the ulv state 97d55c06f7eeb31dd6f6a95fb13b30ddd22be157 Sylvain BERTRAND 2014-01-23 11:29:32
mc reg tbl init for the emergency state 7cf2fffd8bf166af90b20301652d03400feba029 Sylvain BERTRAND 2014-01-23 10:55:52
move smc sw related to mc reg tbl cbdb219935cc25639e5dca06ba99db995f87bef9 Sylvain BERTRAND 2014-01-23 10:15:53
smc mc reg tbl init for the initial state 1aa130d818c0aca415c0b76c80ec4bdb1e030a3f Sylvain BERTRAND 2014-01-22 18:01:49
clean way to deal with state and lvls 362777b13abdfacbeb0612e59c301e04dd2a7d65 Sylvain BERTRAND 2014-01-22 14:01:45
mc reg tbl reg address init 156ba053088bafba7a99fc2f1c2c0e2ca11d7f97 Sylvain BERTRAND 2014-01-22 13:15:15
mc register value valid bit set 4fabfcbad702789b9dbfd36d5fcaae8d0f9424f4 Sylvain BERTRAND 2014-01-22 02:31:53
addition of mc special registers ee876d15d34a720ebf4c26c57481d467fecbf1d5 Sylvain BERTRAND 2014-01-22 01:52:24
mc regs and fixes 6cbf7ddf6cc3ab42487d3ae040f3f8feeb9b5b99 Sylvain BERTRAND 2014-01-16 17:38:22
ulv state fde4ccf60791e6db319f98593318ac6ae0fa1961 Sylvain BERTRAND 2013-11-20 00:44:36
atombios:atb_eng_mem_pll_compute and more 633c0d754bc9d36902a3bf620cbb11282dc6a4a7 Sylvain BERTRAND 2013-11-13 12:48:15
Commit e276bc781e0e1ec9f7550c9bc8ffdb8de253be8b - init the smc mc arb freq set
Author: Sylvain BERTRAND
Author date (UTC): 2014-01-24 16:22
Committer name: Sylvain BERTRAND
Committer date (UTC): 2014-01-24 16:22
Parent(s): 323df7359605e25ac08800ca960bd3eb2267bc87
Signer:
Signing key:
Signing status: N
Tree: c03901494cb597e91264ffca708df9f756eeffd1
File Lines added Lines deleted
drivers/gpu/alga/amd/si/dyn_pm/smc_mc_arb_tbl.c 5 2
drivers/gpu/alga/amd/si/smc_tbls.h 2 1
File drivers/gpu/alga/amd/si/dyn_pm/smc_mc_arb_tbl.c changed (mode: 100644) (index 629833d..cd08a72)
44 44 static u8 refresh_rate(struct ctx *ctx, u32 eng_clk) static u8 refresh_rate(struct ctx *ctx, u32 eng_clk)
45 45 { {
46 46 u32 dram_rows_n; u32 dram_rows_n;
47 u32 dram_rows_n_log2_10; /* 1024 units (2^10) */
47 u32 dram_rows_n_log2_10; /* unit of 1024 rows (2^10) */
48 48 u32 mc_arb_ram_cfg; u32 mc_arb_ram_cfg;
49 49 u32 mc_seq_misc_0; u32 mc_seq_misc_0;
50 u32 dram_refresh_rate_log2_3; /* 8 units (2^3) */
50 u32 dram_refresh_rate_log2_3; /* unit of 8 xHz (2^3) */
51 51 u32 dram_refresh_rate; u32 dram_refresh_rate;
52 52
53 53 mc_arb_ram_cfg = rr32(ctx->dev, MC_ARB_RAM_CFG); mc_arb_ram_cfg = rr32(ctx->dev, MC_ARB_RAM_CFG);
 
... ... long smc_mc_arb_tbl_init(struct ctx *ctx, struct smc_state_tbl *smc_state_tbl,
124 124 * XXX:the driver state is using the same mc arb reg set than the * XXX:the driver state is using the same mc arb reg set than the
125 125 * initial state, then in the table the mc arb reg set index is 0 * initial state, then in the table the mc arb reg set index is 0
126 126 */ */
127
128 /* set the hw register set to use for the mc arb */
129 smc_mc_arb_tbl->arb_freq_fx_current = MAC_MC_CG_ARB_FREQ_F1;
127 130 return 0; return 0;
128 131 } }
File drivers/gpu/alga/amd/si/smc_tbls.h changed (mode: 100644) (index 2a29b9d..fd879d0)
... ... struct smc_mc_arb_regs {
49 49
50 50 #define SMC_ARB_TBL_SETS_N_MAX 16 #define SMC_ARB_TBL_SETS_N_MAX 16
51 51 struct smc_mc_arb_tbl { struct smc_mc_arb_tbl {
52 u8 arb_current;
52 /* this is the *hw* set, not one of the following sets */
53 u8 arb_freq_fx_current; /* MAC_MC_CG_ARB_FREQ_Fx */
53 54 u8 rsvd[3]; u8 rsvd[3];
54 55 struct smc_mc_arb_regs sets[SMC_ARB_TBL_SETS_N_MAX]; struct smc_mc_arb_regs sets[SMC_ARB_TBL_SETS_N_MAX];
55 56 } __packed; } __packed;
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