sylware / linux-gpu-amd-si (public) (License: GPLv2+) (since 2019-09-09) (hash sha1)
my old AMD Southern Islands GPU linux driver
Clone URLs: https://rocketgit.com/user/sylware/linux-gpu-amd-si ssh://rocketgit@ssh.rocketgit.com/user/sylware/linux-gpu-amd-si git://git.rocketgit.com/user/sylware/linux-gpu-amd-si
master
List of commits:
Subject Hash Author Date (UTC)
cpy smc tbls to smc ram bc0860a37eec9cdf5962d4b9f9bb0c6981023587 Sylvain BERTRAND 2014-02-03 13:44:45
thermal regs programming 9a9ed598a7e8d9109a9ab23e90f3a94cb5c02e37 Sylvain BERTRAND 2014-01-31 14:22:12
eng clk pm and global pm switch to on a50fed4758305b9032d313cdf0021ec6a612d344 Sylvain BERTRAND 2014-01-31 12:54:41
send nodisplay msg to smc 91808e6c48d9d37da87f08da253825252122e4d9 Sylvain BERTRAND 2014-01-31 12:33:21
smc start 6c09abb37b34599c132f324359ce38d11888091f Sylvain BERTRAND 2014-01-31 12:03:10
tidy mc reg tbl and mc arb reg tbl 10c88c7898f027e114846f253262e6631a44f5eb Sylvain BERTRAND 2014-01-30 18:42:13
tidy mc reg tbl 4761bf039ff2caf87c7eb139cf54c0f2e1932b60 Sylvain BERTRAND 2014-01-30 18:23:10
cpy cpu mem to smc mem 1b2deae0c86f878c72a40b2c4d07cdf308c3be11 Sylvain BERTRAND 2014-01-30 16:56:51
init of smc sw regs for response times af87f39cda6b64d7c5367ea4fa77899a55a0b9e0 Sylvain BERTRAND 2014-01-30 15:39:37
smc state dyn pm params init 66b37051c3927dfecc92d6d630c53ddf927c7d79 Sylvain BERTRAND 2014-01-30 11:11:05
init of smc cac cfg regs add98b596c10e16693171e04a7f9168232a1f65d Sylvain BERTRAND 2014-01-29 19:38:59
cosmestics ee91a7ee91132de107bef05de70a8ea28f89dddf Sylvain BERTRAND 2014-01-28 23:12:44
smc cac cfg tbl init and some cosmetics 823419aa67f2ad91afb08942112be28d59752435 Sylvain BERTRAND 2014-01-28 22:31:35
smc dte cfg tbl init f3689c3d9e04a3462acf5c3a3aaabbdbb5307580 Sylvain BERTRAND 2014-01-27 21:16:32
init the smc mc arb freq set e276bc781e0e1ec9f7550c9bc8ffdb8de253be8b Sylvain BERTRAND 2014-01-24 16:22:31
smc_eng_pll_tbl init 323df7359605e25ac08800ca960bd3eb2267bc87 Sylvain BERTRAND 2014-01-24 15:50:18
factor out enging pll params computation 0c99b244c1a699abca8493097a8b1f82299b6721 Sylvain BERTRAND 2014-01-24 14:25:57
missed one file 99e76ae1afc06031299b77b3b1d7fbe80b869bc0 Sylvain BERTRAND 2014-01-24 13:03:50
atombios:eng mem pll used only for eng from SI dcdbc070fe4d7a9380ba27bb33274484d2725746 Sylvain BERTRAND 2014-01-24 13:01:43
mc arb tbl init c2d2e29d33a70910eaa09618ecb53783e976bea7 Sylvain BERTRAND 2014-01-24 11:06:39
Commit bc0860a37eec9cdf5962d4b9f9bb0c6981023587 - cpy smc tbls to smc ram
Author: Sylvain BERTRAND
Author date (UTC): 2014-02-03 13:44
Committer name: Sylvain BERTRAND
Committer date (UTC): 2014-02-03 13:44
Parent(s): 9a9ed598a7e8d9109a9ab23e90f3a94cb5c02e37
Signer:
Signing key:
Signing status: N
Tree: 401c5f96fdb8f4fcdb6434fcaf8012c41ff3b9c8
File Lines added Lines deleted
drivers/gpu/alga/amd/si/dyn_pm/dyn_pm.c 57 1
drivers/gpu/alga/amd/si/smc.c 2 0
File drivers/gpu/alga/amd/si/dyn_pm/dyn_pm.c changed (mode: 100644) (index 1daaed2..ac64d0d)
... ... static void thermal_temp_rng_set(struct pci_dev *dev)
691 691 wr32(dev, cg_thermal_ctl, CG_THERMAL_CTL); wr32(dev, cg_thermal_ctl, CG_THERMAL_CTL);
692 692 } }
693 693
694 static void smc_tbls_cpy(struct ctx *ctx,
695 struct smc_state_tbl *smc_state_tbl,
696 struct smc_cac_cfg_tbl *smc_cac_cfg_tbl,
697 struct smc_mc_reg_tbl *smc_mc_reg_tbl,
698 struct smc_mc_arb_tbl *smc_mc_arb_tbl,
699 struct smc_eng_pll_tbl *smc_eng_pll_tbl,
700 struct smc_dte_cfg_tbl *smc_dte_cfg_tbl)
701 {
702 u32 smc_ram_tbl_of;
703
704 /*--------------------------------------------------------------------*/
705
706 smc_ram_tbl_of = smc_r32(ctx->dev, SMC_FW_HDR_START
707 + SMC_FW_HDR_STATE_TBL);
708 smc_memcpy(ctx->dev, smc_ram_tbl_of, (u8*)smc_state_tbl,
709 sizeof(*smc_state_tbl));
710
711 /*--------------------------------------------------------------------*/
712
713 smc_ram_tbl_of = smc_r32(ctx->dev, SMC_FW_HDR_START
714 + SMC_FW_HDR_CAC_CFG_TBL);
715 smc_memcpy(ctx->dev, smc_ram_tbl_of, (u8*)smc_cac_cfg_tbl,
716 sizeof(*smc_cac_cfg_tbl));
717
718 /*--------------------------------------------------------------------*/
719
720 smc_ram_tbl_of = smc_r32(ctx->dev, SMC_FW_HDR_START
721 + SMC_FW_HDR_MC_TBL);
722 smc_memcpy(ctx->dev, smc_ram_tbl_of, (u8*)smc_mc_reg_tbl,
723 sizeof(*smc_mc_reg_tbl));
724
725 /*--------------------------------------------------------------------*/
726
727 smc_ram_tbl_of = smc_r32(ctx->dev, SMC_FW_HDR_START
728 + SMC_FW_HDR_MC_ARB_TBL);
729 smc_memcpy(ctx->dev, smc_ram_tbl_of, (u8*)smc_mc_arb_tbl,
730 sizeof(*smc_mc_arb_tbl));
731
732 /*--------------------------------------------------------------------*/
733
734 smc_ram_tbl_of = smc_r32(ctx->dev, SMC_FW_HDR_START
735 + SMC_FW_HDR_ENG_PLL_TBL);
736 smc_memcpy(ctx->dev, smc_ram_tbl_of, (u8*)smc_eng_pll_tbl,
737 sizeof(*smc_eng_pll_tbl));
738
739 /*--------------------------------------------------------------------*/
740
741 smc_ram_tbl_of = smc_r32(ctx->dev, SMC_FW_HDR_START
742 + SMC_FW_HDR_DTE_CFG_TBL);
743 smc_memcpy(ctx->dev, smc_ram_tbl_of, (u8*)smc_dte_cfg_tbl,
744 sizeof(*smc_dte_cfg_tbl));
745
746 /*--------------------------------------------------------------------*/
747 }
748
694 749 //TODO:must perform the hw ops of si_dpm_setup_asic first //TODO:must perform the hw ops of si_dpm_setup_asic first
695 750 // rv770_get_memory_type is done via the mc_get_ddr5 // rv770_get_memory_type is done via the mc_get_ddr5
696 751 // we save the content of clock registers here, but maybe the wrong place // we save the content of clock registers here, but maybe the wrong place
 
... ... long dyn_pm_ena(struct pci_dev *dev)
839 894 } }
840 895
841 896 smc_cac_cfg_tbl_init(ctx, smc_cac_cfg_tbl); smc_cac_cfg_tbl_init(ctx, smc_cac_cfg_tbl);
842 //TODO:cpy all tables in smc ram
897 smc_tbls_cpy(ctx, smc_state_tbl, smc_cac_cfg_tbl, smc_mc_reg_tbl,
898 smc_mc_arb_tbl, smc_eng_pll_tbl, smc_dte_cfg_tbl);
843 899
844 900 smc_sw_regs_init(ctx); smc_sw_regs_init(ctx);
845 901
File drivers/gpu/alga/amd/si/smc.c changed (mode: 100644) (index b06e773..721fe26)
... ... void smc_auto_increment_dis(struct pci_dev *dev)
102 102 u32 smc_r32(struct pci_dev *dev, u32 addr) u32 smc_r32(struct pci_dev *dev, u32 addr)
103 103 { {
104 104 wr32(dev, addr, SMC_IDX); wr32(dev, addr, SMC_IDX);
105 /* XXX: the xRBM does big endian reads from smc ram */
105 106 return rr32(dev, SMC_DATA); return rr32(dev, SMC_DATA);
106 107 } }
107 108
108 109 void smc_w32(struct pci_dev *dev, u32 val, u32 addr) void smc_w32(struct pci_dev *dev, u32 val, u32 addr)
109 110 { {
110 111 wr32(dev, addr, SMC_IDX); wr32(dev, addr, SMC_IDX);
112 /* XXX: the xRBM does big endian writes to smc ram */
111 113 wr32(dev, val, SMC_DATA); wr32(dev, val, SMC_DATA);
112 114 } }
113 115
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