sylware / nyanlinux (public) (License: AFFERO GPLv3) (since 2019-09-09) (hash sha1)
scripts for a lean, from scratch, amd hardware, linux distro
Clone URLs: https://rocketgit.com/user/sylware/nyanlinux ssh://rocketgit@ssh.rocketgit.com/user/sylware/nyanlinux git://git.rocketgit.com/user/sylware/nyanlinux
master
List of commits:
Subject Hash Author Date (UTC)
gfx stack update c514e1f4ad4e232019c1494b5d0838a5e3907271 Sylvain BERTRAND 2020-10-04 16:29:02
gfx stack update 7db99008f1d15743f7e45a231bb2472998540363 Sylvain BERTRAND 2020-09-27 13:10:12
gfx stack update a3294175b467172d7f022c2e85133cf69a745326 Sylvain BERTRAND 2020-09-20 22:07:30
gfx stack update e77750988b70fd80025d2976b356610c29245112 Sylvain BERTRAND 2020-09-13 17:44:23
gfx stack update a3e78c179a9448d58de3c8570f8e481c1a3cb2a9 Sylvain BERTRAND 2020-09-06 19:11:59
x86:steam distributes the alsa-lib which breaks everything 49a7145777ae0033d8d203ab1afeec92e6ce64e1 Sylvain BERTRAND 2020-08-29 20:04:11
libxkbcommon with reasonable sdk 5a16c5350e09e0cc68fb4d842b9588994a04c944 Sylvain BERTRAND 2020-08-29 18:56:21
gfx stack update 76a10355fbb5a94dbe3f7b6fa2780cbe5ff9ec71 Sylvain BERTRAND 2020-08-24 21:43:41
gfx stack update caa9a0f9059e3c8140a10abe2b02d20faade28e7 Sylvain BERTRAND 2020-08-16 16:21:05
backup some wip 587cb6b5375b10533ebf92e4c151756f4541af7c Sylvain BERTRAND 2020-07-26 23:47:29
alsa-lib:wrong way to use a git snapshot here fb3c82ebddcd320bb7c435c80f88ac65b45401cf Sylvain BERTRAND 2020-07-26 23:35:30
gfx stack update 1a61af333cf6f4264679987cb53cb1258eca5b6f Sylvain BERTRAND 2020-07-26 22:15:23
update some c++ cr*p cf6270785e5ab1deaefdf3a09a5eb476f246bdda Sylvain BERTRAND 2020-07-19 21:43:11
gfx stack update 8a470044332a4ab0bb2f4247632d4ddc05591540 Sylvain BERTRAND 2020-07-19 21:42:01
gfx stack update 2c819ea9ca081c61a9e5f7961c188324e623b53d Sylvain BERTRAND 2020-07-12 17:50:40
gfx stack update bdc04d6f6e371752d5ff32737f1de0511cebe2b2 Sylvain BERTRAND 2020-07-05 18:03:47
gfx stack update 6bf84e0e956e8676945e47d8457f4b63857c912f Sylvain BERTRAND 2020-06-29 18:23:49
gfx stack update e5bc37ec0e4e5b33446eb377eb3c66f33ad79020 Sylvain BERTRAND 2020-06-15 02:43:05
add sample code for raw x11 cursor visibility 042be7d6259fd2ab4c759409fb0dceaf3043f4d9 Sylvain BERTRAND 2020-06-09 15:04:53
gfx stack update 7518a03d3592c7eefd8266d73545a803054fd807 Sylvain BERTRAND 2020-06-07 17:37:18
Commit c514e1f4ad4e232019c1494b5d0838a5e3907271 - gfx stack update
Author: Sylvain BERTRAND
Author date (UTC): 2020-10-04 16:29
Committer name: Sylvain BERTRAND
Committer date (UTC): 2020-10-04 16:29
Parent(s): 7db99008f1d15743f7e45a231bb2472998540363
Signer:
Signing key:
Signing status: N
Tree: 7f6c904888d955013c6992a88e45597ef7e21e47
File Lines added Lines deleted
builders/dwm-0/config.h 2 0
builders/ffmpeg-0/builder.sh 1 1
builders/llvm-0/builder.sh 1 1
builders/mesa-gl-0/builder.sh 1 1
builders/mesa-gl-0/contrib/compiler_nir.sh 6 0
builders/mesa-gl-0/contrib/gallium_drivers.sh 0 7
builders/mesa-vulkan-1/builder.sh 1 1
builders/mesa-vulkan-1/contrib/generators/nir/intrinsics/generic/generic.c 34 2
builders/mesa-vulkan-1/contrib/generators/nir/intrinsics/generic/image.c 6 6
builders/mesa-vulkan-1/contrib/generators/nir/intrinsics/generic/load.c 3 3
builders/mesa-vulkan-1/contrib/generators/nir/intrinsics/generic/store.c 1 1
builders/mesa-vulkan-1/contrib/generators/nir/intrinsics/ir3/system_values.c 3 3
builders/mesa-vulkan-1/contrib/generators/nir/intrinsics/v3d/v3d.c 1 1
builders/mesa-vulkan-1/contrib/generators/nir/nir_database_intrinsic.c 27 13
builders/mesa-vulkan-1/contrib/generators/nir/nir_intrinsics_c.c 5 2
builders/mesa-vulkan-1/contrib/x86_64_amdgpu_linux_gnu_vulkan_x11_drm_gcc.sh 7 0
builders/xserver-0/builder.sh 1 1
File builders/dwm-0/config.h changed (mode: 100644) (index e8e4a1e..e3eb8a8)
... ... static const char *dmenucmd[] = { "dmenu_run", "-m", dmenumon, "-fn", dmenufont,
69 69 static const char *termcmd[] = { "/root/bin/dwm_st.sh", NULL }; static const char *termcmd[] = { "/root/bin/dwm_st.sh", NULL };
70 70 static const char *linkscmd[] = { "/root/bin/dwm_links.sh", NULL }; static const char *linkscmd[] = { "/root/bin/dwm_links.sh", NULL };
71 71 static const char *bgcmd[] = { "/root/bin/dwm_bg.sh", NULL }; static const char *bgcmd[] = { "/root/bin/dwm_bg.sh", NULL };
72 static const char *bgtilecmd[] = { "/root/bin/dwm_bg_tile.sh", NULL };
72 73 static const char *norepcmd[] = { "/root/bin/x11keyautorepeat", NULL }; static const char *norepcmd[] = { "/root/bin/x11keyautorepeat", NULL };
73 74
74 75 static Key keys[] = { static Key keys[] = {
 
... ... static Key keys[] = {
79 80 { 0, XF86XK_HomePage, spawn, {.v = linkscmd } }, { 0, XF86XK_HomePage, spawn, {.v = linkscmd } },
80 81 { ShiftMask, XF86XK_HomePage, spawn, {.v = norepcmd } }, { ShiftMask, XF86XK_HomePage, spawn, {.v = norepcmd } },
81 82 { 0, XF86XK_Mail, spawn, {.v = bgcmd } }, { 0, XF86XK_Mail, spawn, {.v = bgcmd } },
83 { ShiftMask, XF86XK_Mail, spawn, {.v = bgtilecmd } },
82 84 { MODKEY|ShiftMask, XK_b, togglebar, {0} }, { MODKEY|ShiftMask, XK_b, togglebar, {0} },
83 85 { MODKEY|ShiftMask, XK_Page_Down, focusstack, {.i = +1 } }, { MODKEY|ShiftMask, XK_Page_Down, focusstack, {.i = +1 } },
84 86 { MODKEY|ShiftMask, XK_Page_Up, focusstack, {.i = -1 } }, { MODKEY|ShiftMask, XK_Page_Up, focusstack, {.i = -1 } },
File builders/ffmpeg-0/builder.sh changed (mode: 100644) (index b8cb418..9000cb8)
1 git_commit=9f7e592df27bd96bdffae173e3462d0438aea120
1 git_commit=acd735efaf0ceba95c3f07751182af485af993d2
2 2 slot=0 slot=0
3 3 . $nyan_root/builders/ffmpeg/builder.sh . $nyan_root/builders/ffmpeg/builder.sh
File builders/llvm-0/builder.sh changed (mode: 100644) (index 24e2d6d..149438b)
1 git_commit=91720ee561b2da4161df6abaddfd8a677aebb504
1 git_commit=a566f0525a692e6e696add6f369edab979d6f300
2 2 version=12.0.0git # do check at the top of llvm-project/llvm/CMakeLists.txt version=12.0.0git # do check at the top of llvm-project/llvm/CMakeLists.txt
3 3 slot=0 slot=0
4 4 . $nyan_root/builders/llvm/builder.sh . $nyan_root/builders/llvm/builder.sh
File builders/mesa-gl-0/builder.sh changed (mode: 100644) (index 87957f4..50b25db)
1 git_commit=27516baa2aebe815dca011957d45e15f5b319fd6
1 git_commit=ef918f0e3354fbff4d9d73f6186a3dc970d43514
2 2 slot=0 slot=0
3 3 . $nyan_root/builders/mesa-gl/builder.sh . $nyan_root/builders/mesa-gl/builder.sh
File builders/mesa-gl-0/contrib/compiler_nir.sh changed (mode: 100644) (index 1d9d431..f76b640)
... ... $src_dir/src/compiler/nir/nir_lower_bitmap.c \
64 64 $src_dir/src/compiler/nir/nir_lower_bool_to_bitsize.c \ $src_dir/src/compiler/nir/nir_lower_bool_to_bitsize.c \
65 65 $src_dir/src/compiler/nir/nir_lower_bool_to_float.c \ $src_dir/src/compiler/nir/nir_lower_bool_to_float.c \
66 66 $src_dir/src/compiler/nir/nir_lower_bool_to_int32.c \ $src_dir/src/compiler/nir/nir_lower_bool_to_int32.c \
67 $src_dir/src/compiler/nir/nir_lower_cl_images_to_tex.c \
67 68 $src_dir/src/compiler/nir/nir_lower_clamp_color_outputs.c \ $src_dir/src/compiler/nir/nir_lower_clamp_color_outputs.c \
68 69 $src_dir/src/compiler/nir/nir_lower_clip.c \ $src_dir/src/compiler/nir/nir_lower_clip.c \
69 70 $src_dir/src/compiler/nir/nir_lower_clip_cull_distance_arrays.c \ $src_dir/src/compiler/nir/nir_lower_clip_cull_distance_arrays.c \
70 71 $src_dir/src/compiler/nir/nir_lower_clip_disable.c \ $src_dir/src/compiler/nir/nir_lower_clip_disable.c \
71 72 $src_dir/src/compiler/nir/nir_lower_clip_halfz.c \ $src_dir/src/compiler/nir/nir_lower_clip_halfz.c \
73 $src_dir/src/compiler/nir/nir_lower_convert_alu_types.c \
72 74 $src_dir/src/compiler/nir/nir_lower_discard_to_demote.c \ $src_dir/src/compiler/nir/nir_lower_discard_to_demote.c \
73 75 $src_dir/src/compiler/nir/nir_lower_double_ops.c \ $src_dir/src/compiler/nir/nir_lower_double_ops.c \
74 76 $src_dir/src/compiler/nir/nir_lower_drawpixels.c \ $src_dir/src/compiler/nir/nir_lower_drawpixels.c \
 
... ... $src_dir/src/compiler/nir/nir_lower_io_to_temporaries.c \
95 97 $src_dir/src/compiler/nir/nir_lower_io_to_scalar.c \ $src_dir/src/compiler/nir/nir_lower_io_to_scalar.c \
96 98 $src_dir/src/compiler/nir/nir_lower_io_to_vector.c \ $src_dir/src/compiler/nir/nir_lower_io_to_vector.c \
97 99 $src_dir/src/compiler/nir/nir_lower_mediump_outputs.c \ $src_dir/src/compiler/nir/nir_lower_mediump_outputs.c \
100 $src_dir/src/compiler/nir/nir_lower_memcpy.c \
98 101 $src_dir/src/compiler/nir/nir_lower_memory_model.c \ $src_dir/src/compiler/nir/nir_lower_memory_model.c \
102 $src_dir/src/compiler/nir/nir_lower_multiview.c \
99 103 $src_dir/src/compiler/nir/nir_lower_non_uniform_access.c \ $src_dir/src/compiler/nir/nir_lower_non_uniform_access.c \
100 104 $src_dir/src/compiler/nir/nir_lower_packing.c \ $src_dir/src/compiler/nir/nir_lower_packing.c \
101 105 $src_dir/src/compiler/nir/nir_lower_passthrough_edgeflags.c \ $src_dir/src/compiler/nir/nir_lower_passthrough_edgeflags.c \
 
... ... $src_dir/src/compiler/nir/nir_lower_vars_to_ssa.c \
117 121 $src_dir/src/compiler/nir/nir_lower_var_copies.c \ $src_dir/src/compiler/nir/nir_lower_var_copies.c \
118 122 $src_dir/src/compiler/nir/nir_lower_variable_initializers.c \ $src_dir/src/compiler/nir/nir_lower_variable_initializers.c \
119 123 $src_dir/src/compiler/nir/nir_lower_vec_to_movs.c \ $src_dir/src/compiler/nir/nir_lower_vec_to_movs.c \
124 $src_dir/src/compiler/nir/nir_lower_vec3_to_vec4.c \
120 125 $src_dir/src/compiler/nir/nir_lower_viewport_transform.c \ $src_dir/src/compiler/nir/nir_lower_viewport_transform.c \
121 126 $src_dir/src/compiler/nir/nir_lower_wpos_center.c \ $src_dir/src/compiler/nir/nir_lower_wpos_center.c \
122 127 $src_dir/src/compiler/nir/nir_lower_wpos_ytransform.c \ $src_dir/src/compiler/nir/nir_lower_wpos_ytransform.c \
 
... ... $src_dir/src/compiler/nir/nir_opt_intrinsics.c \
146 151 $src_dir/src/compiler/nir/nir_opt_large_constants.c \ $src_dir/src/compiler/nir/nir_opt_large_constants.c \
147 152 $src_dir/src/compiler/nir/nir_opt_load_store_vectorize.c \ $src_dir/src/compiler/nir/nir_opt_load_store_vectorize.c \
148 153 $src_dir/src/compiler/nir/nir_opt_loop_unroll.c \ $src_dir/src/compiler/nir/nir_opt_loop_unroll.c \
154 $src_dir/src/compiler/nir/nir_opt_memcpy.c \
149 155 $src_dir/src/compiler/nir/nir_opt_move.c \ $src_dir/src/compiler/nir/nir_opt_move.c \
150 156 $src_dir/src/compiler/nir/nir_opt_peephole_select.c \ $src_dir/src/compiler/nir/nir_opt_peephole_select.c \
151 157 $src_dir/src/compiler/nir/nir_opt_rematerialize_compares.c \ $src_dir/src/compiler/nir/nir_opt_rematerialize_compares.c \
File builders/mesa-gl-0/contrib/gallium_drivers.sh changed (mode: 100644) (index 54c4684..54b8567)
1 1 printf "\tbuilding drivers sub-components-->\n" printf "\tbuilding drivers sub-components-->\n"
2 2 mkdir -p $build_dir/src/gallium/drivers/radeonsi mkdir -p $build_dir/src/gallium/drivers/radeonsi
3 3
4 export PYTHONPATH=$mako
5 $python3 $src_dir/src/util/merge_driinfo.py \
6 $src_dir/src/gallium/auxiliary/pipe-loader/driinfo_gallium.h \
7 $src_dir/src/gallium/drivers/radeonsi/driinfo_radeonsi.h \
8 >$build_dir/src/gallium/drivers/radeonsi/si_driinfo.h
9 unset PYTHONPATH
10
11 4 export PYTHONPATH=$mako export PYTHONPATH=$mako
12 5 $python3 $src_dir/src/amd/common/gfx10_format_table.py \ $python3 $src_dir/src/amd/common/gfx10_format_table.py \
13 6 $src_dir/src/util/format/u_format.csv \ $src_dir/src/util/format/u_format.csv \
File builders/mesa-vulkan-1/builder.sh changed (mode: 100644) (index 7697018..bc4cf10)
1 git_commit=27516baa2aebe815dca011957d45e15f5b319fd6
1 git_commit=ef918f0e3354fbff4d9d73f6186a3dc970d43514
2 2 slot=1 slot=1
3 3 . $nyan_root/builders/mesa-vulkan/builder.sh . $nyan_root/builders/mesa-vulkan/builder.sh
File builders/mesa-vulkan-1/contrib/generators/nir/intrinsics/generic/generic.c changed (mode: 100644) (index 1bb62d9..f4f7fea)
1 struct nir_intrinsic nir_convert_alu_types = {
2 .name = "convert_alu_types",
3 .srcs_n = 1,
4 .src_components_n = {
5 0
6 },
7 .has_dest = true,
8 .idxs_n = 4,
9 .idxs_map = {
10 [NIR_INTRINSIC_IDX_SRC_TYPE] = 1,
11 [NIR_INTRINSIC_IDX_DEST_TYPE] = 2,
12 [NIR_INTRINSIC_IDX_ROUNDING_MODE] = 3,
13 [NIR_INTRINSIC_IDX_SATURATE] = 4
14 },
15 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
16 };
1 17 struct nir_intrinsic nir_atomic_counter_add = { struct nir_intrinsic nir_atomic_counter_add = {
2 18 .name = "atomic_counter_add", .name = "atomic_counter_add",
3 19 .srcs_n = 2, .srcs_n = 2,
 
... ... struct nir_intrinsic nir_copy_deref = {
351 367 [NIR_INTRINSIC_IDX_SRC_ACCESS] = 2 [NIR_INTRINSIC_IDX_SRC_ACCESS] = 2
352 368 } }
353 369 }; };
370 struct nir_intrinsic nir_memcpy_deref = {
371 .name = "memcpy_deref",
372 .srcs_n = 3,
373 .src_components_n = {
374 -1,-1,1
375 },
376 .idxs_n = 2,
377 .idxs_map = {
378 [NIR_INTRINSIC_IDX_DST_ACCESS] = 1,
379 [NIR_INTRINSIC_IDX_SRC_ACCESS] = 2
380 }
381 };
354 382 struct nir_intrinsic nir_deref_atomic_add = { struct nir_intrinsic nir_deref_atomic_add = {
355 383 .name = "deref_atomic_add", .name = "deref_atomic_add",
356 384 .srcs_n = 2, .srcs_n = 2,
 
... ... struct nir_intrinsic nir_first_invocation = {
618 646 .dest_components_n = 1, .dest_components_n = 1,
619 647 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
620 648 }; };
621 struct nir_intrinsic nir_get_buffer_size = {
622 .name = "get_buffer_size",
649 /*
650 * Ask the driver for the size of a given SSBO. It takes the buffer index
651 * as source.
652 */
653 struct nir_intrinsic nir_get_ssbo_size = {
654 .name = "get_ssbo_size",
623 655 .srcs_n = 1, .srcs_n = 1,
624 656 .src_components_n = { .src_components_n = {
625 657 1 1
File builders/mesa-vulkan-1/contrib/generators/nir/intrinsics/generic/image.c changed (mode: 100644) (index 8bef3d0..ab89f74)
... ... struct nir_intrinsic nir_image_deref_load = {
30 30 .idxs_n = 2, .idxs_n = 2,
31 31 .idxs_map = { .idxs_map = {
32 32 [NIR_INTRINSIC_IDX_ACCESS] = 1, [NIR_INTRINSIC_IDX_ACCESS] = 1,
33 [NIR_INTRINSIC_IDX_TYPE] = 2
33 [NIR_INTRINSIC_IDX_DEST_TYPE] = 2
34 34 }, },
35 35 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
36 36 }; };
 
... ... struct nir_intrinsic nir_image_deref_store = {
43 43 .idxs_n = 2, .idxs_n = 2,
44 44 .idxs_map = { .idxs_map = {
45 45 [NIR_INTRINSIC_IDX_ACCESS] = 1, [NIR_INTRINSIC_IDX_ACCESS] = 1,
46 [NIR_INTRINSIC_IDX_TYPE] = 2
46 [NIR_INTRINSIC_IDX_SRC_TYPE] = 2
47 47 } }
48 48 }; };
49 49 struct nir_intrinsic nir_image_deref_atomic_add = { struct nir_intrinsic nir_image_deref_atomic_add = {
 
... ... struct nir_intrinsic nir_image_load = {
288 288 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2, [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
289 289 [NIR_INTRINSIC_IDX_FORMAT] = 3, [NIR_INTRINSIC_IDX_FORMAT] = 3,
290 290 [NIR_INTRINSIC_IDX_ACCESS] = 4, [NIR_INTRINSIC_IDX_ACCESS] = 4,
291 [NIR_INTRINSIC_IDX_TYPE] = 5
291 [NIR_INTRINSIC_IDX_DEST_TYPE] = 5
292 292 }, },
293 293 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
294 294 }; };
 
... ... struct nir_intrinsic nir_image_store = {
304 304 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2, [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
305 305 [NIR_INTRINSIC_IDX_FORMAT] = 3, [NIR_INTRINSIC_IDX_FORMAT] = 3,
306 306 [NIR_INTRINSIC_IDX_ACCESS] = 4, [NIR_INTRINSIC_IDX_ACCESS] = 4,
307 [NIR_INTRINSIC_IDX_TYPE] = 5
307 [NIR_INTRINSIC_IDX_SRC_TYPE] = 5
308 308 } }
309 309 }; };
310 310 struct nir_intrinsic nir_image_atomic_add = { struct nir_intrinsic nir_image_atomic_add = {
 
... ... struct nir_intrinsic nir_bindless_image_load = {
600 600 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2, [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
601 601 [NIR_INTRINSIC_IDX_FORMAT] = 3, [NIR_INTRINSIC_IDX_FORMAT] = 3,
602 602 [NIR_INTRINSIC_IDX_ACCESS] = 4, [NIR_INTRINSIC_IDX_ACCESS] = 4,
603 [NIR_INTRINSIC_IDX_TYPE] = 5
603 [NIR_INTRINSIC_IDX_DEST_TYPE] = 5
604 604 }, },
605 605 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
606 606 }; };
 
... ... struct nir_intrinsic nir_bindless_image_store = {
616 616 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2, [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
617 617 [NIR_INTRINSIC_IDX_FORMAT] = 3, [NIR_INTRINSIC_IDX_FORMAT] = 3,
618 618 [NIR_INTRINSIC_IDX_ACCESS] = 4, [NIR_INTRINSIC_IDX_ACCESS] = 4,
619 [NIR_INTRINSIC_IDX_TYPE] = 5
619 [NIR_INTRINSIC_IDX_SRC_TYPE] = 5
620 620 } }
621 621 }; };
622 622 struct nir_intrinsic nir_bindless_image_atomic_add = { struct nir_intrinsic nir_bindless_image_atomic_add = {
File builders/mesa-vulkan-1/contrib/generators/nir/intrinsics/generic/load.c changed (mode: 100644) (index 883b487..6af7759)
... ... struct nir_intrinsic nir_load_uniform = {
35 35 .idxs_map = { .idxs_map = {
36 36 [NIR_INTRINSIC_IDX_BASE] = 1, [NIR_INTRINSIC_IDX_BASE] = 1,
37 37 [NIR_INTRINSIC_IDX_RANGE] = 2, [NIR_INTRINSIC_IDX_RANGE] = 2,
38 [NIR_INTRINSIC_IDX_TYPE] = 3
38 [NIR_INTRINSIC_IDX_DEST_TYPE] = 3
39 39 }, },
40 40 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
41 41 }; };
 
... ... struct nir_intrinsic nir_load_input = {
84 84 .idxs_map = { .idxs_map = {
85 85 [NIR_INTRINSIC_IDX_BASE] = 1, [NIR_INTRINSIC_IDX_BASE] = 1,
86 86 [NIR_INTRINSIC_IDX_COMPONENT] = 2, [NIR_INTRINSIC_IDX_COMPONENT] = 2,
87 [NIR_INTRINSIC_IDX_TYPE] = 3,
87 [NIR_INTRINSIC_IDX_DEST_TYPE] = 3,
88 88 [NIR_INTRINSIC_IDX_IO_SEMANTICS] = 4 [NIR_INTRINSIC_IDX_IO_SEMANTICS] = 4
89 89 }, },
90 90 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
 
... ... struct nir_intrinsic nir_load_input_vertex = {
101 101 .idxs_map = { .idxs_map = {
102 102 [NIR_INTRINSIC_IDX_BASE] = 1, [NIR_INTRINSIC_IDX_BASE] = 1,
103 103 [NIR_INTRINSIC_IDX_COMPONENT] = 2, [NIR_INTRINSIC_IDX_COMPONENT] = 2,
104 [NIR_INTRINSIC_IDX_TYPE] = 3,
104 [NIR_INTRINSIC_IDX_DEST_TYPE] = 3,
105 105 [NIR_INTRINSIC_IDX_IO_SEMANTICS] = 4 [NIR_INTRINSIC_IDX_IO_SEMANTICS] = 4
106 106 }, },
107 107 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
File builders/mesa-vulkan-1/contrib/generators/nir/intrinsics/generic/store.c changed (mode: 100644) (index 1b83657..9bc36dc)
... ... struct nir_intrinsic nir_store_output = {
16 16 [NIR_INTRINSIC_IDX_BASE] = 1, [NIR_INTRINSIC_IDX_BASE] = 1,
17 17 [NIR_INTRINSIC_IDX_WRMASK] = 2, [NIR_INTRINSIC_IDX_WRMASK] = 2,
18 18 [NIR_INTRINSIC_IDX_COMPONENT] = 3, [NIR_INTRINSIC_IDX_COMPONENT] = 3,
19 [NIR_INTRINSIC_IDX_TYPE] = 4,
19 [NIR_INTRINSIC_IDX_SRC_TYPE] = 4,
20 20 [NIR_INTRINSIC_IDX_IO_SEMANTICS] = 5 [NIR_INTRINSIC_IDX_IO_SEMANTICS] = 5
21 21 } }
22 22 }; };
File builders/mesa-vulkan-1/contrib/generators/nir/intrinsics/ir3/system_values.c changed (mode: 100644) (index 8982bf2..9374a9f)
... ... static struct nir_intrinsic nir_load_hs_patch_stride_ir3 = {
46 46 .system_value = true .system_value = true
47 47 }; };
48 48 static struct nir_intrinsic nir_load_tess_factor_base_ir3 = { static struct nir_intrinsic nir_load_tess_factor_base_ir3 = {
49 .name = "load_load_tess_factor_base_ir3",
49 .name = "load_tess_factor_base_ir3",
50 50 .has_dest = true, .has_dest = true,
51 51 .dest_components_n = 2, .dest_components_n = 2,
52 52 .bit_szs = 0x20, .bit_szs = 0x20,
 
... ... static struct nir_intrinsic nir_load_tess_factor_base_ir3 = {
54 54 .system_value = true .system_value = true
55 55 }; };
56 56 static struct nir_intrinsic nir_load_tess_param_base_ir3 = { static struct nir_intrinsic nir_load_tess_param_base_ir3 = {
57 .name = "load_load_tess_param_base_ir3",
57 .name = "load_tess_param_base_ir3",
58 58 .has_dest = true, .has_dest = true,
59 59 .dest_components_n = 2, .dest_components_n = 2,
60 60 .bit_szs = 0x20, .bit_szs = 0x20,
 
... ... static struct nir_intrinsic nir_load_tess_param_base_ir3 = {
62 62 .system_value = true .system_value = true
63 63 }; };
64 64 static struct nir_intrinsic nir_load_tcs_header_ir3 = { static struct nir_intrinsic nir_load_tcs_header_ir3 = {
65 .name = "load_load_tcs_header_ir3",
65 .name = "load_tcs_header_ir3",
66 66 .has_dest = true, .has_dest = true,
67 67 .dest_components_n = 1, .dest_components_n = 1,
68 68 .bit_szs = 0x20, .bit_szs = 0x20,
File builders/mesa-vulkan-1/contrib/generators/nir/intrinsics/v3d/v3d.c changed (mode: 100644) (index 3fef6fe..f28c588)
... ... struct nir_intrinsic nir_store_tlb_sample_color_v3d = {
40 40 .idxs_map = { .idxs_map = {
41 41 [NIR_INTRINSIC_IDX_BASE] = 1, [NIR_INTRINSIC_IDX_BASE] = 1,
42 42 [NIR_INTRINSIC_IDX_COMPONENT] = 2, [NIR_INTRINSIC_IDX_COMPONENT] = 2,
43 [NIR_INTRINSIC_IDX_TYPE] = 3
43 [NIR_INTRINSIC_IDX_SRC_TYPE] = 3
44 44 } }
45 45 }; };
46 46
File builders/mesa-vulkan-1/contrib/generators/nir/nir_database_intrinsic.c changed (mode: 100644) (index ebc1aca..9c0f44d)
55 55 #define NIR_INTRINSIC_IDX_ALIGN_OFFSET 21 #define NIR_INTRINSIC_IDX_ALIGN_OFFSET 21
56 56 /* The vulkan descriptor type for vulkan_resource_index */ /* The vulkan descriptor type for vulkan_resource_index */
57 57 #define NIR_INTRINSIC_IDX_DESC_TYPE 22 #define NIR_INTRINSIC_IDX_DESC_TYPE 22
58 /* The nir_alu_type of input data to a store or conversion */
59 #define NIR_INTRINSIC_IDX_SRC_TYPE 23
60 /* The nir_alu_type of the data output from a load or conversion */
61 #define NIR_INTRINSIC_IDX_DEST_TYPE 24
58 62 /* The nir_alu_type of a uniform/input/output */ /* The nir_alu_type of a uniform/input/output */
59 #define NIR_INTRINSIC_IDX_TYPE 23
63 #define NIR_INTRINSIC_IDX_TYPE 25
60 64 /* The swizzle mask for quad_swizzle_amd & masked_swizzle_amd */ /* The swizzle mask for quad_swizzle_amd & masked_swizzle_amd */
61 #define NIR_INTRINSIC_IDX_SWIZZLE_MASK 24
65 #define NIR_INTRINSIC_IDX_SWIZZLE_MASK 26
62 66 /* Driver location of attribute */ /* Driver location of attribute */
63 #define NIR_INTRINSIC_IDX_DRIVER_LOCATION 25
67 #define NIR_INTRINSIC_IDX_DRIVER_LOCATION 27
64 68 /* ordering and visibility of a memory operation */ /* ordering and visibility of a memory operation */
65 #define NIR_INTRINSIC_IDX_MEMORY_SEMANTICS 26
69 #define NIR_INTRINSIC_IDX_MEMORY_SEMANTICS 28
66 70 /* Modes affected by a memory operation */ /* Modes affected by a memory operation */
67 #define NIR_INTRINSIC_IDX_MEMORY_MODES 27
71 #define NIR_INTRINSIC_IDX_MEMORY_MODES 29
68 72 /* Scope of a memory operation */ /* Scope of a memory operation */
69 #define NIR_INTRINSIC_IDX_MEMORY_SCOPE 28
73 #define NIR_INTRINSIC_IDX_MEMORY_SCOPE 30
70 74 /* Scope of a control operation */ /* Scope of a control operation */
71 #define NIR_INTRINSIC_IDX_EXECUTION_SCOPE 29
72 #define NIR_INTRINSIC_IDX_IO_SEMANTICS 30
73 #define NIR_INTRINSIC_IDXS_N_MAX 31
75 #define NIR_INTRINSIC_IDX_EXECUTION_SCOPE 31
76 #define NIR_INTRINSIC_IDX_IO_SEMANTICS 32
77 /* Rounding mode for conversions */
78 #define NIR_INTRINSIC_IDX_ROUNDING_MODE 33
79 /* Whether or not to saturate in conversions */
80 #define NIR_INTRINSIC_IDX_SATURATE 34
81 #define NIR_INTRINSIC_IDXS_N_MAX 35
74 82
75 83 static u8 *idxs_str[NIR_INTRINSIC_IDXS_N_MAX] = { static u8 *idxs_str[NIR_INTRINSIC_IDXS_N_MAX] = {
76 84 "UNKNOWN_IDX", "UNKNOWN_IDX",
 
... ... static u8 *idxs_str[NIR_INTRINSIC_IDXS_N_MAX] = {
91 99 "nir_intrinsic_idx_image_array", "nir_intrinsic_idx_image_array",
92 100 "nir_intrinsic_idx_format", "nir_intrinsic_idx_format",
93 101 "nir_intrinsic_idx_access", "nir_intrinsic_idx_access",
94 "nir_intrinsic_idx_dst_access",
95 102 "nir_intrinsic_idx_src_access", "nir_intrinsic_idx_src_access",
103 "nir_intrinsic_idx_dst_access",
96 104 "nir_intrinsic_idx_align_mul", "nir_intrinsic_idx_align_mul",
97 105 "nir_intrinsic_idx_align_offset", "nir_intrinsic_idx_align_offset",
98 106 "nir_intrinsic_idx_desc_type", "nir_intrinsic_idx_desc_type",
99 "nir_intrinsic_idx_type",
107 "nir_intrinsic_idx_src_type",
108 "nir_intrinsic_idx_dst_type",
100 109 "nir_intrinsic_idx_swizzle_mask", "nir_intrinsic_idx_swizzle_mask",
101 110 "nir_intrinsic_idx_driver_location", "nir_intrinsic_idx_driver_location",
102 111 "nir_intrinsic_idx_memory_semantics", "nir_intrinsic_idx_memory_semantics",
103 112 "nir_intrinsic_idx_memory_modes", "nir_intrinsic_idx_memory_modes",
104 113 "nir_intrinsic_idx_memory_scope", "nir_intrinsic_idx_memory_scope",
105 114 "nir_intrinsic_idx_execution_scope" "nir_intrinsic_idx_execution_scope"
115 "nir_intrinsic_idx_io_semantics"
116 "nir_intrinsic_idx_rounding_mode"
117 "nir_intrinsic_idx_saturate"
106 118 }; };
107 119
108 120 #define NIR_INTRINSIC_FLAGS_CAN_ELIMINATE 0x01 #define NIR_INTRINSIC_FLAGS_CAN_ELIMINATE 0x01
 
... ... struct nir_intrinsic *nir_intrinsics[] = {
211 223 &nir_end_primitive_with_counter, &nir_end_primitive_with_counter,
212 224 &nir_exclusive_scan, &nir_exclusive_scan,
213 225 &nir_first_invocation, &nir_first_invocation,
214 &nir_get_buffer_size,
226 &nir_get_ssbo_size,
215 227 &nir_global_atomic_add, &nir_global_atomic_add,
216 228 &nir_global_atomic_and, &nir_global_atomic_and,
217 229 &nir_global_atomic_comp_swap, &nir_global_atomic_comp_swap,
 
... ... struct nir_intrinsic *nir_intrinsics[] = {
508 520 &nir_image_order, &nir_image_order,
509 521 &nir_load_constant_base_ptr, &nir_load_constant_base_ptr,
510 522 &nir_load_global_constant, &nir_load_global_constant,
511 &nir_load_reloc_const_intel
523 &nir_load_reloc_const_intel,
524 &nir_memcpy_deref,
525 &nir_convert_alu_types
512 526 }; };
File builders/mesa-vulkan-1/contrib/generators/nir/nir_intrinsics_c.c changed (mode: 100644) (index dab7aab..eae67cb)
... ... static char *idx_str(u8 idx)
113 113 case NIR_INTRINSIC_IDX_IMAGE_ARRAY: return "NIR_INTRINSIC_IMAGE_ARRAY"; case NIR_INTRINSIC_IDX_IMAGE_ARRAY: return "NIR_INTRINSIC_IMAGE_ARRAY";
114 114 case NIR_INTRINSIC_IDX_FORMAT: return "NIR_INTRINSIC_FORMAT"; case NIR_INTRINSIC_IDX_FORMAT: return "NIR_INTRINSIC_FORMAT";
115 115 case NIR_INTRINSIC_IDX_ACCESS: return "NIR_INTRINSIC_ACCESS"; case NIR_INTRINSIC_IDX_ACCESS: return "NIR_INTRINSIC_ACCESS";
116 case NIR_INTRINSIC_IDX_DST_ACCESS: return "NIR_INTRINSIC_DST_ACCESS";
117 116 case NIR_INTRINSIC_IDX_SRC_ACCESS: return "NIR_INTRINSIC_SRC_ACCESS"; case NIR_INTRINSIC_IDX_SRC_ACCESS: return "NIR_INTRINSIC_SRC_ACCESS";
117 case NIR_INTRINSIC_IDX_DST_ACCESS: return "NIR_INTRINSIC_DST_ACCESS";
118 118 case NIR_INTRINSIC_IDX_ALIGN_MUL: return "NIR_INTRINSIC_ALIGN_MUL"; case NIR_INTRINSIC_IDX_ALIGN_MUL: return "NIR_INTRINSIC_ALIGN_MUL";
119 119 case NIR_INTRINSIC_IDX_ALIGN_OFFSET: return "NIR_INTRINSIC_ALIGN_OFFSET"; case NIR_INTRINSIC_IDX_ALIGN_OFFSET: return "NIR_INTRINSIC_ALIGN_OFFSET";
120 120 case NIR_INTRINSIC_IDX_DESC_TYPE: return "NIR_INTRINSIC_DESC_TYPE"; case NIR_INTRINSIC_IDX_DESC_TYPE: return "NIR_INTRINSIC_DESC_TYPE";
121 case NIR_INTRINSIC_IDX_TYPE: return "NIR_INTRINSIC_TYPE";
121 case NIR_INTRINSIC_IDX_SRC_TYPE: return "NIR_INTRINSIC_SRC_TYPE";
122 case NIR_INTRINSIC_IDX_DEST_TYPE: return "NIR_INTRINSIC_DEST_TYPE";
122 123 case NIR_INTRINSIC_IDX_SWIZZLE_MASK: return "NIR_INTRINSIC_SWIZZLE_MASK"; case NIR_INTRINSIC_IDX_SWIZZLE_MASK: return "NIR_INTRINSIC_SWIZZLE_MASK";
123 124 case NIR_INTRINSIC_IDX_DRIVER_LOCATION: return "NIR_INTRINSIC_DRIVER_LOCATION"; case NIR_INTRINSIC_IDX_DRIVER_LOCATION: return "NIR_INTRINSIC_DRIVER_LOCATION";
124 125 case NIR_INTRINSIC_IDX_MEMORY_SEMANTICS:return "NIR_INTRINSIC_MEMORY_SEMANTICS"; case NIR_INTRINSIC_IDX_MEMORY_SEMANTICS:return "NIR_INTRINSIC_MEMORY_SEMANTICS";
 
... ... static char *idx_str(u8 idx)
126 127 case NIR_INTRINSIC_IDX_MEMORY_SCOPE: return "NIR_INTRINSIC_MEMORY_SCOPE"; case NIR_INTRINSIC_IDX_MEMORY_SCOPE: return "NIR_INTRINSIC_MEMORY_SCOPE";
127 128 case NIR_INTRINSIC_IDX_EXECUTION_SCOPE: return "NIR_INTRINSIC_EXECUTION_SCOPE"; case NIR_INTRINSIC_IDX_EXECUTION_SCOPE: return "NIR_INTRINSIC_EXECUTION_SCOPE";
128 129 case NIR_INTRINSIC_IDX_IO_SEMANTICS: return "NIR_INTRINSIC_IO_SEMANTICS"; case NIR_INTRINSIC_IDX_IO_SEMANTICS: return "NIR_INTRINSIC_IO_SEMANTICS";
130 case NIR_INTRINSIC_IDX_ROUNDING_MODE: return "NIR_INTRINSIC_ROUNDING_MODE";
131 case NIR_INTRINSIC_IDX_SATURATE: return "NIR_INTRINSIC_SATURATE";
129 132 } }
130 133 } }
131 134
File builders/mesa-vulkan-1/contrib/x86_64_amdgpu_linux_gnu_vulkan_x11_drm_gcc.sh changed (mode: 100755) (index 1f8f192..6b26884)
... ... $src_dir/src/compiler/nir/nir_lower_bitmap.c \
1077 1077 $src_dir/src/compiler/nir/nir_lower_bit_size.c \ $src_dir/src/compiler/nir/nir_lower_bit_size.c \
1078 1078 $src_dir/src/compiler/nir/nir_lower_bool_to_int32.c \ $src_dir/src/compiler/nir/nir_lower_bool_to_int32.c \
1079 1079 $src_dir/src/compiler/nir/nir_lower_bool_to_bitsize.c \ $src_dir/src/compiler/nir/nir_lower_bool_to_bitsize.c \
1080 $src_dir/src/compiler/nir/nir_lower_cl_images_to_tex.c \
1080 1081 $src_dir/src/compiler/nir/nir_lower_clamp_color_outputs.c \ $src_dir/src/compiler/nir/nir_lower_clamp_color_outputs.c \
1081 1082 $src_dir/src/compiler/nir/nir_lower_clip.c \ $src_dir/src/compiler/nir/nir_lower_clip.c \
1082 1083 $src_dir/src/compiler/nir/nir_lower_clip_cull_distance_arrays.c \ $src_dir/src/compiler/nir/nir_lower_clip_cull_distance_arrays.c \
1083 1084 $src_dir/src/compiler/nir/nir_lower_clip_disable.c \ $src_dir/src/compiler/nir/nir_lower_clip_disable.c \
1085 $src_dir/src/compiler/nir/nir_lower_convert_alu_types.c \
1084 1086 $src_dir/src/compiler/nir/nir_lower_discard_to_demote.c \ $src_dir/src/compiler/nir/nir_lower_discard_to_demote.c \
1085 1087 $src_dir/src/compiler/nir/nir_lower_double_ops.c \ $src_dir/src/compiler/nir/nir_lower_double_ops.c \
1086 1088 $src_dir/src/compiler/nir/nir_lower_drawpixels.c \ $src_dir/src/compiler/nir/nir_lower_drawpixels.c \
 
... ... $src_dir/src/compiler/nir/nir_lower_goto_ifs.c \
1096 1098 $src_dir/src/compiler/nir/nir_lower_load_const_to_scalar.c \ $src_dir/src/compiler/nir/nir_lower_load_const_to_scalar.c \
1097 1099 $src_dir/src/compiler/nir/nir_lower_locals_to_regs.c \ $src_dir/src/compiler/nir/nir_lower_locals_to_regs.c \
1098 1100 $src_dir/src/compiler/nir/nir_lower_mediump_outputs.c \ $src_dir/src/compiler/nir/nir_lower_mediump_outputs.c \
1101 $src_dir/src/compiler/nir/nir_lower_memcpy.c \
1099 1102 $src_dir/src/compiler/nir/nir_lower_memory_model.c \ $src_dir/src/compiler/nir/nir_lower_memory_model.c \
1103 $src_dir/src/compiler/nir/nir_lower_multiview.c \
1100 1104 $src_dir/src/compiler/nir/nir_lower_idiv.c \ $src_dir/src/compiler/nir/nir_lower_idiv.c \
1101 1105 $src_dir/src/compiler/nir/nir_lower_indirect_derefs.c \ $src_dir/src/compiler/nir/nir_lower_indirect_derefs.c \
1102 1106 $src_dir/src/compiler/nir/nir_lower_input_attachments.c \ $src_dir/src/compiler/nir/nir_lower_input_attachments.c \
 
... ... $src_dir/src/compiler/nir/nir_lower_vars_to_ssa.c \
1129 1133 $src_dir/src/compiler/nir/nir_lower_var_copies.c \ $src_dir/src/compiler/nir/nir_lower_var_copies.c \
1130 1134 $src_dir/src/compiler/nir/nir_lower_variable_initializers.c \ $src_dir/src/compiler/nir/nir_lower_variable_initializers.c \
1131 1135 $src_dir/src/compiler/nir/nir_lower_vec_to_movs.c \ $src_dir/src/compiler/nir/nir_lower_vec_to_movs.c \
1136 $src_dir/src/compiler/nir/nir_lower_vec3_to_vec4.c \
1132 1137 $src_dir/src/compiler/nir/nir_lower_viewport_transform.c \ $src_dir/src/compiler/nir/nir_lower_viewport_transform.c \
1133 1138 $src_dir/src/compiler/nir/nir_lower_wpos_center.c \ $src_dir/src/compiler/nir/nir_lower_wpos_center.c \
1134 1139 $src_dir/src/compiler/nir/nir_lower_wpos_ytransform.c \ $src_dir/src/compiler/nir/nir_lower_wpos_ytransform.c \
 
... ... $src_dir/src/compiler/nir/nir_opt_intrinsics.c \
1156 1161 $src_dir/src/compiler/nir/nir_opt_large_constants.c \ $src_dir/src/compiler/nir/nir_opt_large_constants.c \
1157 1162 $src_dir/src/compiler/nir/nir_opt_load_store_vectorize.c \ $src_dir/src/compiler/nir/nir_opt_load_store_vectorize.c \
1158 1163 $src_dir/src/compiler/nir/nir_opt_loop_unroll.c \ $src_dir/src/compiler/nir/nir_opt_loop_unroll.c \
1164 $src_dir/src/compiler/nir/nir_opt_memcpy.c \
1159 1165 $src_dir/src/compiler/nir/nir_opt_move.c \ $src_dir/src/compiler/nir/nir_opt_move.c \
1160 1166 $src_dir/src/compiler/nir/nir_opt_peephole_select.c \ $src_dir/src/compiler/nir/nir_opt_peephole_select.c \
1161 1167 $src_dir/src/compiler/nir/nir_opt_remove_phis.c \ $src_dir/src/compiler/nir/nir_opt_remove_phis.c \
 
... ... $src_dir/src/util/double.c \
1338 1344 $src_dir/src/util/fast_idiv_by_const.c \ $src_dir/src/util/fast_idiv_by_const.c \
1339 1345 $src_dir/src/util/half_float.c \ $src_dir/src/util/half_float.c \
1340 1346 $src_dir/src/util/hash_table.c \ $src_dir/src/util/hash_table.c \
1347 $src_dir/src/util/log.c \
1341 1348 $src_dir/src/util/mesa-sha1.c \ $src_dir/src/util/mesa-sha1.c \
1342 1349 $src_dir/src/util/os_file.c \ $src_dir/src/util/os_file.c \
1343 1350 $src_dir/src/util/os_misc.c \ $src_dir/src/util/os_misc.c \
File builders/xserver-0/builder.sh changed (mode: 100644) (index 7537a63..d4b7a74)
1 git_commit=add3df2001a2eadc41c47683f50fdc0fd8b14964
1 git_commit=1626e9fa77c0d3715d38ededd43656aa6d942bd9
2 2 slot=0 slot=0
3 3 . $nyan_root/builders/xserver/builder.sh . $nyan_root/builders/xserver/builder.sh
Hints:
Before first commit, do not forget to setup your git environment:
git config --global user.name "your_name_here"
git config --global user.email "your@email_here"

Clone this repository using HTTP(S):
git clone https://rocketgit.com/user/sylware/nyanlinux

Clone this repository using ssh (do not forget to upload a key first):
git clone ssh://rocketgit@ssh.rocketgit.com/user/sylware/nyanlinux

Clone this repository using git:
git clone git://git.rocketgit.com/user/sylware/nyanlinux

You are allowed to anonymously push to this repository.
This means that your pushed commits will automatically be transformed into a merge request:
... clone the repository ...
... make some changes and some commits ...
git push origin main