sylware / linux-gpu-amd-si (public) (License: GPLv2+) (since 2019-09-09) (hash sha1)
my old AMD Southern Islands GPU linux driver
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master
List of commits:
Subject Hash Author Date (UTC)
new firware breaks the 3D pipeline 13db71ba4522d7266d68a21f43f25ee3781d0b92 Sylvain BERTRAND 2014-07-03 22:54:30
closed src or gnu gpl *not* v2 drivers are illegal dc1de426b639ffee863b0a211e9cf0e349f855f0 Sylvain BERTRAND 2014-07-03 17:59:46
compiling with 3.16 rc2 new mc fw code e00afdaeef8513da35c82cc82dcfee0745aa9129 Sylvain BERTRAND 2014-06-29 01:54:40
untested handling of new mc fw eb89a71b0af7781d1fc9ee226c1269b6d5183749 Sylvain BERTRAND 2014-06-29 01:26:15
become legal ef922b67f25aaf0c4f8cff5be572e53fb53bdfe5 Sylvain BERTRAND 2014-06-28 23:33:40
use usleep_range and fix a dp 1.1 time out d4183ce73e6ec7d7f3baf9d710dd2ba015b4a6a9 Sylvain BERTRAND 2014-02-19 20:09:44
fix dac a864ba601253674b679b07e4b1ddc00fb83a8cb6 Sylvain BERTRAND 2014-02-19 19:17:08
clear atombias dpm state and warn for instability 28b598d81f6a873f90d1a9325e3e1002743487a5 Sylvain BERTRAND 2014-02-19 19:10:43
CFG_MEM_SZ upper 16bits may have garbage f08f2e3471989e448d6d76ba02565fd9efc3293f Sylvain BERTRAND 2014-02-19 17:55:38
fix ena rbs mask performance critical bug 289497449dd0f2acb09e03f65988e22e45948fb6 Sylvain BERTRAND 2014-02-19 17:15:18
upstream confirm bug, fixed e2142c3fdfc01d51e7fec7687ec4d02f548ce763 Sylvain BERTRAND 2014-02-18 16:10:14
mainly bug fixing 1650d6a6e13bd81a4df9bfaa84a5daef2989ccdf Sylvain BERTRAND 2014-02-18 12:46:40
dump smc sw regs 5b42263039c858624ff411d94318f6ef5171a864 Sylvain BERTRAND 2014-02-17 12:22:26
disable switch to low power when no display 69f94e04ea89c1fe9ccaef153da5f5ade232c2a1 Sylvain BERTRAND 2014-02-17 09:59:28
finish smc switch to driver power state 6f99d0a01491dd671174919d842a771ac4a81a4b Sylvain BERTRAND 2014-02-17 09:47:02
pcie things and follow upstream for dyn pm init f4fb120597276a3badc08eec30783b10d111f756 Sylvain BERTRAND 2014-02-17 09:00:00
dump performance state tbls 06a22756b504ecf4523c86f657104e0b970195de Sylvain BERTRAND 2014-02-14 17:02:23
smc_mc_arb_tbl init for the driver state 5d1868e75b11164dbb97caaddbc7992b252ab973 Sylvain BERTRAND 2014-02-14 13:01:26
smc_mc_reg tbl init for the driver state e8aa12b1c87571031098c4427822733a74133afc Sylvain BERTRAND 2014-02-14 11:32:04
installation of the perf pwr state continued 535c853e7d0a0ab04fbff3b0d5613ef9a34d525c Sylvain BERTRAND 2014-02-13 19:16:33
Commit 13db71ba4522d7266d68a21f43f25ee3781d0b92 - new firware breaks the 3D pipeline
Add a module parameter to allow explicit enabling of the new memory
controller firmware. The 3D pipeline is broken with this firwmare.
Since I use a quite simpler memory model than the official driver,
something that I don't use was probably made mandatory.
I need the full and complete changelog of the new firmare in order
to be able to figure out what's going on in a reasonable way.
Author: Sylvain BERTRAND
Author date (UTC): 2014-07-03 22:54
Committer name: Sylvain BERTRAND
Committer date (UTC): 2014-07-03 22:54
Parent(s): dc1de426b639ffee863b0a211e9cf0e349f855f0
Signing key:
Tree: 85a319b1ec75db25501f5724cd8c6dae1fd4e8b6
File Lines added Lines deleted
drivers/gpu/alga/amd/si/drv.c 6 0
drivers/gpu/alga/amd/si/drv.h 4 0
drivers/gpu/alga/amd/si/mc.c 45 17
File drivers/gpu/alga/amd/si/drv.c changed (mode: 100644) (index 9935155..ff51883)
23 23 #include <alga/amd/atombios/pp.h> #include <alga/amd/atombios/pp.h>
24 24 #include <uapi/alga/amd/dce6/dce6.h> #include <uapi/alga/amd/dce6/dce6.h>
25 25
26 #define DRV_C
27
26 28 #include "mc.h" #include "mc.h"
27 29 #include "rlc.h" #include "rlc.h"
28 30 #include "ih.h" #include "ih.h"
 
46 48
47 49 #include "regs.h" #include "regs.h"
48 50
51 bool fw_mc2 = 0;
52 module_param(fw_mc2, bool, 0);
53 MODULE_PARM_DESC(fw_mc2, "enable the new memory controller firmware (breaks the 3D pipeline)");
54
49 55 #define GPUS_MAX 256 #define GPUS_MAX 256
50 56 static DEFINE_IDA(ida); static DEFINE_IDA(ida);
51 57
File drivers/gpu/alga/amd/si/drv.h changed (mode: 100644) (index 525c68b..55401a0)
5 5 Protected by linux GNU GPLv2 Protected by linux GNU GPLv2
6 6 Copyright 2012-2014 Copyright 2012-2014
7 7 */ */
8 #ifndef DRV_C
9 extern bool fw_mc2;
10 #endif
11
8 12 #define TAHITI 0 #define TAHITI 0
9 13 #define PITCAIRN 1 #define PITCAIRN 1
10 14 #define VERDE 2 #define VERDE 2
File drivers/gpu/alga/amd/si/mc.c changed (mode: 100644) (index 08969f1..99deaf7)
30 30
31 31 #include "regs.h" #include "regs.h"
32 32
33 #define TAHITI_MC_FW_DWS 7808
34 #define PITCAIRN_MC_FW_DWS 7775
35 #define VERDE_MC_FW_DWS 7875
33 #define TAHITI_MC_FW_DWS 7769
34 #define PITCAIRN_MC_FW_DWS 7769
35 #define VERDE_MC_FW_DWS 7769
36 36 #define OLAND_MC_FW_DWS 7863 #define OLAND_MC_FW_DWS 7863
37
37 MODULE_FIRMWARE("radeon/TAHITI_mc.bin");
38 MODULE_FIRMWARE("radeon/PITCAIRN_mc.bin");
39 MODULE_FIRMWARE("radeon/VERDE_mc.bin");
40 MODULE_FIRMWARE("radeon/OLAND_mc.bin");
41
42 #define TAHITI_MC2_FW_DWS 7808
43 #define PITCAIRN_MC2_FW_DWS 7775
44 #define VERDE_MC2_FW_DWS 7875
45 #define OLAND_MC2_FW_DWS 7863
38 46 MODULE_FIRMWARE("radeon/TAHITI_mc2.bin"); MODULE_FIRMWARE("radeon/TAHITI_mc2.bin");
39 47 MODULE_FIRMWARE("radeon/PITCAIRN_mc2.bin"); MODULE_FIRMWARE("radeon/PITCAIRN_mc2.bin");
40 48 MODULE_FIRMWARE("radeon/VERDE_mc2.bin"); MODULE_FIRMWARE("radeon/VERDE_mc2.bin");
 
... ... long mc_ucode_load(struct pci_dev *dev)
262 270 { {
263 271 struct dev_drv_data *dd; struct dev_drv_data *dd;
264 272 long r; long r;
273 char *fw_version_str;
265 274
266 275 dd = pci_get_drvdata(dev); dd = pci_get_drvdata(dev);
267 276 dd->mc_fw_dws = 0; dd->mc_fw_dws = 0;
268 switch (dd->family) {
269 case TAHITI:
270 dd->mc_fw_dws = TAHITI_MC_FW_DWS;
271 break;
272 case PITCAIRN:
273 dd->mc_fw_dws = PITCAIRN_MC_FW_DWS;
274 break;
275 case VERDE:
276 dd->mc_fw_dws = VERDE_MC_FW_DWS;
277 break;
278 case OLAND:
279 dd->mc_fw_dws = OLAND_MC_FW_DWS;
277
278 if (fw_mc2) {
279 switch (dd->family) {
280 case TAHITI:
281 dd->mc_fw_dws = TAHITI_MC2_FW_DWS;
282 break;
283 case PITCAIRN:
284 dd->mc_fw_dws = PITCAIRN_MC2_FW_DWS;
285 break;
286 case VERDE:
287 dd->mc_fw_dws = VERDE_MC2_FW_DWS;
288 break;
289 case OLAND:
290 dd->mc_fw_dws = OLAND_MC2_FW_DWS;
291 }
292 fw_version_str = "mc2";
293 } else {
294 switch (dd->family) {
295 case TAHITI:
296 dd->mc_fw_dws = TAHITI_MC_FW_DWS;
297 break;
298 case PITCAIRN:
299 dd->mc_fw_dws = PITCAIRN_MC_FW_DWS;
300 break;
301 case VERDE:
302 dd->mc_fw_dws = VERDE_MC_FW_DWS;
303 break;
304 case OLAND:
305 dd->mc_fw_dws = OLAND_MC_FW_DWS;
306 }
307 fw_version_str = "mc";
280 308 } }
281 309
282 r = ucode_load(dev, &(dd->mc_fw), "mc2", dd->mc_fw_dws);
310 r = ucode_load(dev, &(dd->mc_fw), fw_version_str, dd->mc_fw_dws);
283 311 return r; return r;
284 312 } }
285 313
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