sylware / linux-gpu-amd-si (public) (License: GPLv2+) (since 2019-09-09) (hash sha1)
my old AMD Southern Islands GPU linux driver
Clone URLs: https://rocketgit.com/user/sylware/linux-gpu-amd-si ssh://rocketgit@ssh.rocketgit.com/user/sylware/linux-gpu-amd-si git://git.rocketgit.com/user/sylware/linux-gpu-amd-si
master
List of commits:
Subject Hash Author Date (UTC)
CFG_MEM_SZ upper 16bits may have garbage f08f2e3471989e448d6d76ba02565fd9efc3293f Sylvain BERTRAND 2014-02-19 17:55:38
fix ena rbs mask performance critical bug 289497449dd0f2acb09e03f65988e22e45948fb6 Sylvain BERTRAND 2014-02-19 17:15:18
upstream confirm bug, fixed e2142c3fdfc01d51e7fec7687ec4d02f548ce763 Sylvain BERTRAND 2014-02-18 16:10:14
mainly bug fixing 1650d6a6e13bd81a4df9bfaa84a5daef2989ccdf Sylvain BERTRAND 2014-02-18 12:46:40
dump smc sw regs 5b42263039c858624ff411d94318f6ef5171a864 Sylvain BERTRAND 2014-02-17 12:22:26
disable switch to low power when no display 69f94e04ea89c1fe9ccaef153da5f5ade232c2a1 Sylvain BERTRAND 2014-02-17 09:59:28
finish smc switch to driver power state 6f99d0a01491dd671174919d842a771ac4a81a4b Sylvain BERTRAND 2014-02-17 09:47:02
pcie things and follow upstream for dyn pm init f4fb120597276a3badc08eec30783b10d111f756 Sylvain BERTRAND 2014-02-17 09:00:00
dump performance state tbls 06a22756b504ecf4523c86f657104e0b970195de Sylvain BERTRAND 2014-02-14 17:02:23
smc_mc_arb_tbl init for the driver state 5d1868e75b11164dbb97caaddbc7992b252ab973 Sylvain BERTRAND 2014-02-14 13:01:26
smc_mc_reg tbl init for the driver state e8aa12b1c87571031098c4427822733a74133afc Sylvain BERTRAND 2014-02-14 11:32:04
installation of the perf pwr state continued 535c853e7d0a0ab04fbff3b0d5613ef9a34d525c Sylvain BERTRAND 2014-02-13 19:16:33
installation of the perf pwr state continued b229eef2798acbe053aa09e47c213e23749638dd Sylvain BERTRAND 2014-02-13 10:48:02
dyn pm second part continuation 95dd7b4754476a014d8f84854e5b2ce5c81d23b4 Sylvain BERTRAND 2014-02-12 20:15:03
beginning of dyn pm second part c32c19d884dbf1f440480bbea42140e9c5ed8cd3 Sylvain BERTRAND 2014-02-12 14:44:04
uvd does only mpeg, then switch off 7e36b98bcab47e9986a63093dbeed98ab290f85f Sylvain BERTRAND 2014-02-12 10:55:54
bug fixing, end of dyn pm first part 533a4bd6731205f71704886e5fa099063be985ea Sylvain BERTRAND 2014-02-11 13:49:27
bug fixing c3fc0d7b807c98d20c13f53dcfc09713309ad2fa Sylvain BERTRAND 2014-02-11 11:16:00
static bios tbls *must* be ok e050fa94c2f1e846bb051748347332e234a6b93a Sylvain BERTRAND 2014-02-10 10:17:33
bug fixing 7baa7069aa89a98d831d7def358766155771e9ca Sylvain BERTRAND 2014-02-07 15:08:53
Commit f08f2e3471989e448d6d76ba02565fd9efc3293f - CFG_MEM_SZ upper 16bits may have garbage
Author: Sylvain BERTRAND
Author date (UTC): 2014-02-19 17:55
Committer name: Sylvain BERTRAND
Committer date (UTC): 2014-02-19 17:55
Parent(s): 289497449dd0f2acb09e03f65988e22e45948fb6
Signing key:
Tree: ead500c9ce79745bc3d79e2963cf5985dd257a87
File Lines added Lines deleted
drivers/gpu/alga/amd/si/ba.c 2 1
drivers/gpu/alga/amd/si/drv.c 8 3
File drivers/gpu/alga/amd/si/ba.c changed (mode: 100644) (index 73cc150..9a44f9f)
... ... long ba_init(struct pci_dev *dev)
154 154 /* /*
155 155 * The bus aperture is the size of vram plus wb page and rings. Upstream * The bus aperture is the size of vram plus wb page and rings. Upstream
156 156 * code (specs) tells us it must be a power of 2, maybe for old asics? * code (specs) tells us it must be a power of 2, maybe for old asics?
157 * Some boards have garbage in upper 16 bits of CFG_MEM_SZ.
157 158 */ */
158 ba_sz = rr32(dev, CFG_MEM_SZ) * 1024 * 1024
159 ba_sz = (rr32(dev, CFG_MEM_SZ) & 0xffff) * 1024 * 1024
159 160 + GPU_PAGE_SZ /* wb page */ + GPU_PAGE_SZ /* wb page */
160 161 + (1 << IH_RING_LOG2_DWS) * 4 /* IH ring */ + (1 << IH_RING_LOG2_DWS) * 4 /* IH ring */
161 162 + 3 * (1 << CP_RING_LOG2_QWS) * 8; /* 3 command rings */ + 3 * (1 << CP_RING_LOG2_QWS) * 8; /* 3 command rings */
File drivers/gpu/alga/amd/si/drv.c changed (mode: 100644) (index 362b714..5a3a0eb)
... ... static long asic_init(struct pci_dev *dev)
321 321 golden_regs(dev); golden_regs(dev);
322 322 wmb(); wmb();
323 323
324 /* CFG_MEM_SZ is now valid */
325 dev_info(&dev->dev, "vram size is %uMB\n", rr32(dev, CFG_MEM_SZ));
324 /*
325 * CFG_MEM_SZ is now valid but some boards have garbage in upper 16 bits
326 */
327 dev_info(&dev->dev, "vram size is %uMB\n", rr32(dev, CFG_MEM_SZ)
328 & 0xffff);
326 329
327 330 r = dyn_pm_ena(dev); r = dyn_pm_ena(dev);
328 331 if (r == -SI_ERR) if (r == -SI_ERR)
 
... ... static long asic_init(struct pci_dev *dev)
333 336
334 337 mc_addr_cfg_compute(dev); mc_addr_cfg_compute(dev);
335 338
336 rng_mng_init(&dd->vram.mng, 0, rr32(dev, CFG_MEM_SZ) * 1024 * 1024);
339 /* some boards have garbage in upper 16 bits */
340 rng_mng_init(&dd->vram.mng, 0, (rr32(dev, CFG_MEM_SZ) & 0xffff) * 1024
341 * 1024);
337 342
338 343 /*--------------------------------------------------------------------*/ /*--------------------------------------------------------------------*/
339 344 /* quiet the memory requests before mc programming: dce then gpu */ /* quiet the memory requests before mc programming: dce then gpu */
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