sylware / nyanlinux (public) (License: AFFERO GPLv3) (since 2019-09-09) (hash sha1)
scripts for a lean, from scratch, amd hardware, linux distro
List of commits:
Subject Hash Author Date (UTC)
gfx stack update 704e2a3b76df3af1c331aeef52c16a12871b6c2b Sylvain BERTRAND 2020-11-02 23:42:16
alsa: update, lockless crackling, broken hw atomics??? df1c6ac439c1929577a2f4e47ffb6112ff542f11 Sylvain BERTRAND 2020-10-29 19:46:12
mesa was brainfucked with python/c++/one zillion layers 2e9a61037392bd21da1374adab7d59d0e05c410a Sylvain BERTRAND 2020-10-26 18:38:56
steam client:cannot mix 32bits software GL with 64bits hardware GL f93a1de5d196c2807a1e1d6bdbf092dbf27c59d8 Sylvain BERTRAND 2020-10-25 15:45:41
gfx stack update 7944ba49d00dcbace930b10f1d07c7a7305e3458 Sylvain BERTRAND 2020-10-11 21:00:22
gfx stack update c514e1f4ad4e232019c1494b5d0838a5e3907271 Sylvain BERTRAND 2020-10-04 16:29:02
gfx stack update 7db99008f1d15743f7e45a231bb2472998540363 Sylvain BERTRAND 2020-09-27 13:10:12
gfx stack update a3294175b467172d7f022c2e85133cf69a745326 Sylvain BERTRAND 2020-09-20 22:07:30
gfx stack update e77750988b70fd80025d2976b356610c29245112 Sylvain BERTRAND 2020-09-13 17:44:23
gfx stack update a3e78c179a9448d58de3c8570f8e481c1a3cb2a9 Sylvain BERTRAND 2020-09-06 19:11:59
x86:steam distributes the alsa-lib which breaks everything 49a7145777ae0033d8d203ab1afeec92e6ce64e1 Sylvain BERTRAND 2020-08-29 20:04:11
libxkbcommon with reasonable sdk 5a16c5350e09e0cc68fb4d842b9588994a04c944 Sylvain BERTRAND 2020-08-29 18:56:21
gfx stack update 76a10355fbb5a94dbe3f7b6fa2780cbe5ff9ec71 Sylvain BERTRAND 2020-08-24 21:43:41
gfx stack update caa9a0f9059e3c8140a10abe2b02d20faade28e7 Sylvain BERTRAND 2020-08-16 16:21:05
backup some wip 587cb6b5375b10533ebf92e4c151756f4541af7c Sylvain BERTRAND 2020-07-26 23:47:29
alsa-lib:wrong way to use a git snapshot here fb3c82ebddcd320bb7c435c80f88ac65b45401cf Sylvain BERTRAND 2020-07-26 23:35:30
gfx stack update 1a61af333cf6f4264679987cb53cb1258eca5b6f Sylvain BERTRAND 2020-07-26 22:15:23
update some c++ cr*p cf6270785e5ab1deaefdf3a09a5eb476f246bdda Sylvain BERTRAND 2020-07-19 21:43:11
gfx stack update 8a470044332a4ab0bb2f4247632d4ddc05591540 Sylvain BERTRAND 2020-07-19 21:42:01
gfx stack update 2c819ea9ca081c61a9e5f7961c188324e623b53d Sylvain BERTRAND 2020-07-12 17:50:40
Commit 704e2a3b76df3af1c331aeef52c16a12871b6c2b - gfx stack update
Author: Sylvain BERTRAND
Author date (UTC): 2020-11-02 23:42
Committer name: Sylvain BERTRAND
Committer date (UTC): 2020-11-02 23:42
Parent(s): df1c6ac439c1929577a2f4e47ffb6112ff542f11
Signer:
Signing key:
Signing status: N
Tree: a9977f750450b4f408df3cec722e19f80af2df6a
File Lines added Lines deleted
builders/drm-1/builder.sh 2 2
builders/drm-1/contrib/x86_64_amdgpu_linux_gnu_drm_gcc.sh 1 1
builders/ffmpeg-0/builder.sh 1 1
builders/llvm-1/builder.sh 1 1
builders/mesa-gl-1/builder.sh 0 3
builders/mesa-gl-1/contrib/compiler.sh 0 88
builders/mesa-gl-1/contrib/compiler_glsl.sh 0 264
builders/mesa-gl-1/contrib/compiler_nir.sh 0 236
builders/mesa-gl-1/contrib/gallium_auxiliary.sh 0 374
builders/mesa-gl-1/contrib/gallium_drivers.sh 0 123
builders/mesa-gl-1/contrib/gallium_targets.sh 0 78
builders/mesa-gl-1/contrib/gcc_binutils.sh 0 71
builders/mesa-gl-1/contrib/glx.sh 0 144
builders/mesa-gl-1/contrib/mesa.sh 0 515
builders/mesa-gl-1/contrib/util.sh 0 131
builders/mesa-gl-1/contrib/x86_64_linux_glibc_amdgpu.sh 0 303
builders/mesa-gl-amd-sh-1/builder.sh 3 0
builders/mesa-gl-amd-sh-1/contrib/amd.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/compiler.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/compiler_glsl.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/compiler_nir.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/drm_helper.h.patch 0 0
builders/mesa-gl-amd-sh-1/contrib/egl.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/egl_dri2.c.patch 0 0
builders/mesa-gl-amd-sh-1/contrib/external_deps.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/gallium.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/gallium_auxiliary.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/gallium_drivers.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/gallium_frontends.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/gallium_state_trackers.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/gallium_targets.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/gallium_winsys.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/gbm.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/gcc_binutils.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/glx.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/loader.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/mapi.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/matypes.h.x86_64 0 0
builders/mesa-gl-amd-sh-1/contrib/mesa.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/pipe_loader.c.patch 0 0
builders/mesa-gl-amd-sh-1/contrib/pkgconfig/dri.pc.in 0 0
builders/mesa-gl-amd-sh-1/contrib/pkgconfig/egl.pc.in 0 0
builders/mesa-gl-amd-sh-1/contrib/pkgconfig/gbm.pc.in 0 0
builders/mesa-gl-amd-sh-1/contrib/pkgconfig/gl.pc.in 0 0
builders/mesa-gl-amd-sh-1/contrib/si_pipe.c.patch 0 0
builders/mesa-gl-amd-sh-1/contrib/si_uvd.c 0 0
builders/mesa-gl-amd-sh-1/contrib/util.sh 0 0
builders/mesa-gl-amd-sh-1/contrib/x86_64_linux_glibc_amdgpu.sh 0 0
builders/mesa-vulkan-0/contrib/ezxml/changelog.txt 0 54
builders/mesa-vulkan-0/contrib/ezxml/ezxml.c 0 1015
builders/mesa-vulkan-0/contrib/ezxml/ezxml.h 0 167
builders/mesa-vulkan-0/contrib/ezxml/ezxml.html 0 121
builders/mesa-vulkan-0/contrib/ezxml/ezxml.txt 0 84
builders/mesa-vulkan-0/contrib/ezxml/license.txt 0 20
builders/mesa-vulkan-0/contrib/generators/gen_enum_to_str.deprecated/gen_enum_to_str.c 0 221
builders/mesa-vulkan-0/contrib/generators/gen_enum_to_str.deprecated/gen_enum_to_str_commands.c 0 169
builders/mesa-vulkan-0/contrib/generators/gen_enum_to_str.deprecated/gen_enum_to_str_enums.c 0 261
builders/mesa-vulkan-0/contrib/generators/gen_enum_to_str.deprecated/log 0 87
builders/mesa-vulkan-0/contrib/generators/nir/alu/generic/binop/binop.c 0 579
builders/mesa-vulkan-0/contrib/generators/nir/alu/generic/binop/compare_all_sizes.c 0 431
builders/mesa-vulkan-0/contrib/generators/nir/alu/generic/binop/convert.c 0 96
builders/mesa-vulkan-0/contrib/generators/nir/alu/generic/binop/horiz.c 0 21
builders/mesa-vulkan-0/contrib/generators/nir/alu/generic/binop/reduce/all_sizes.c 0 824
builders/mesa-vulkan-0/contrib/generators/nir/alu/generic/binop/reduce/reduce.c 0 211
builders/mesa-vulkan-0/contrib/generators/nir/alu/ir3/binop.c 0 26
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/amd/amd.c 0 38
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/amd/r600/load.c 0 23
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/amd/r600/r600.c 0 15
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/amd/r600/store.c 0 18
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/amd/r600/system_values.c 0 35
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/amd/system_values.c 0 9
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/generic/barycentric.c 0 93
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/generic/generic.c 0 1617
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/generic/image.c 0 900
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/generic/input_interp.c 0 43
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/generic/load.c 0 360
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/generic/store.c 0 147
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/generic/system_values.c 0 602
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/intel/image.c 0 108
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/intel/intel.c 0 12
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/intel/system_values.c 0 9
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/ir3/ir3.c 0 184
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/ir3/load.c 0 59
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/ir3/store.c 0 55
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/ir3/system_values.c 0 71
builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/v3d/v3d.c 0 56
builders/mesa-vulkan-0/contrib/generators/nir/nir_builder_opcodes_h.c 0 213
builders/mesa-vulkan-0/contrib/generators/nir/nir_database.c 0 23
builders/mesa-vulkan-0/contrib/generators/nir/nir_database_alu.c 0 2079
builders/mesa-vulkan-0/contrib/generators/nir/nir_database_intrinsic.c 0 526
builders/mesa-vulkan-0/contrib/generators/nir/nir_intrinsics_c.c 0 225
builders/mesa-vulkan-0/contrib/generators/nir/nir_intrinsics_h.c 0 67
builders/mesa-vulkan-0/contrib/generators/nir/nir_opcodes_c.c 0 415
builders/mesa-vulkan-0/contrib/generators/nir/nir_opcodes_h.c 0 63
builders/mesa-vulkan-0/contrib/generators/sid_tables/field.c 0 77
builders/mesa-vulkan-0/contrib/generators/sid_tables/generator.c 0 179
builders/mesa-vulkan-0/contrib/generators/sid_tables/hdr_parser.c 0 106
builders/mesa-vulkan-0/contrib/generators/sid_tables/hdr_preprocess.c 0 159
builders/mesa-vulkan-0/contrib/generators/sid_tables/macro_process.c 0 107
builders/mesa-vulkan-0/contrib/generators/sid_tables/pkt.c 0 46
builders/mesa-vulkan-0/contrib/generators/sid_tables/register.c 0 40
builders/mesa-vulkan-0/contrib/generators/sid_tables/sid_tables.c 0 340
builders/mesa-vulkan-0/contrib/generators/sid_tables/value.c 0 112
builders/mesa-vulkan-amd-sh-0/builder.sh 1 1
builders/mesa-vulkan-amd-sh-0/contrib/vk_enum_to_str.c 0 0
builders/mesa-vulkan-amd-sh-0/contrib/vk_enum_to_str.h 0 0
builders/mesa-vulkan-amd-sh-0/contrib/x86_64_amdgpu_linux_gnu_vulkan_x11_drm_gcc.sh 24 73
builders/mesa-vulkan-amd-sh-0/radeon_icd.x86_64.json 0 0
builders/mesa-vulkan/builder.sh 1 1
builders/xserver-1/builder.sh 1 1
File builders/drm-1/builder.sh changed (mode: 100644) (index 15d839a..5068c41)
1 git_commit=f449081628922bf4d7e3743aa86a6e6670e36592
1 git_commit=c2e940a8be0237cbec746e88d12b471668a16a1e
2 2 drm_version_patch=102 drm_version_patch=102
3 3 kms_version_patch=0 kms_version_patch=0
4 radeon_version_patch=2
4 radeon_version_patch=1
5 5 amdgpu_version_patch=0 amdgpu_version_patch=0
6 6 slot=1 slot=1
7 7 . $nyan_root/builders/drm/builder.sh . $nyan_root/builders/drm/builder.sh
File builders/drm-1/contrib/x86_64_amdgpu_linux_gnu_drm_gcc.sh changed (mode: 100755) (index a282fd1..2a2dce7)
... ... s:@PACKAGE_VERSION@:$libdrm_so_major.$libdrm_so_minor.$libdrm_so_patch:;\
250 250 #=============================================================================== #===============================================================================
251 251 libdrm_radeon_so_major=1 libdrm_radeon_so_major=1
252 252 libdrm_radeon_so_minor=0 libdrm_radeon_so_minor=0
253 libdrm_radeon_so_patch=2
253 libdrm_radeon_so_patch=1
254 254
255 255 libdrm_radeon_c_src_files="\ libdrm_radeon_c_src_files="\
256 256 $src_dir/radeon/radeon_bo_gem.c \ $src_dir/radeon/radeon_bo_gem.c \
File builders/ffmpeg-0/builder.sh changed (mode: 100644) (index 3366285..73e713c)
1 git_commit=343c3149ab3d77be76f035d3b18bb2b2da48ce1f
1 git_commit=2ddd6afd30601f04becb3deab67467caebfad1a9
2 2 slot=0 slot=0
3 3 . $nyan_root/builders/ffmpeg/builder.sh . $nyan_root/builders/ffmpeg/builder.sh
File builders/llvm-1/builder.sh changed (mode: 100644) (index c303756..56d5eb1)
1 git_commit=d7186fe3710828fab03de69f78f01f001d70e1aa
1 git_commit=1267bb2e416e42f9c3bbfa7b6cbf4975fa7aa546
2 2 version=12.0.0git # do check at the top of llvm-project/llvm/CMakeLists.txt version=12.0.0git # do check at the top of llvm-project/llvm/CMakeLists.txt
3 3 slot=1 slot=1
4 4 . $nyan_root/builders/llvm/builder.sh . $nyan_root/builders/llvm/builder.sh
File builders/mesa-gl-1/builder.sh deleted (index 73700a7..0000000)
1 git_commit=7346933fc8616ec2adc9848d267cee873f2eabb8
2 slot=1
3 . $nyan_root/builders/mesa-gl/builder.sh
File builders/mesa-gl-1/contrib/compiler.sh deleted (index f899137..0000000)
1 echo "building gpu compiler components-->"
2 mkdir -p $build_dir/src/compiler/glsl
3
4 export PYTHONPATH=$mako
5 $python3 $src_dir/src/compiler/glsl/ir_expression_operation.py enum \
6 >$build_dir/src/compiler/glsl/ir_expression_operation.h
7 unset PYTHONPATH
8
9 #===============================================================================
10
11 libcompiler_c_files="\
12 $src_dir/src/compiler/shader_enums.c \
13 "
14
15 libcompiler_cxx_files="\
16 $src_dir/src/compiler/glsl_types.cpp \
17 $src_dir/src/compiler/nir_types.cpp \
18 "
19 #------------------------------------------------------------------------------
20
21 for f in $libcompiler_c_files
22 do
23 libcompiler_c_obj_dir=$(dirname $f)
24 libcompiler_c_obj_dir=$build_dir/${libcompiler_c_obj_dir#*/src/}
25 mkdir -p $libcompiler_c_obj_dir
26
27 libcompiler_c_obj="$libcompiler_c_obj_dir/$(basename $f .c).o"
28 libcompiler_a="$libcompiler_a $libcompiler_c_obj"
29
30 $cco_slib -o $libcompiler_c_obj $f \
31 -I$build_dir/src/compiler/glsl \
32 -I$src_dir/src/gallium/include \
33 -I$src_dir/src/mesa \
34 -I$src_dir/src \
35 -I$src_dir/include \
36 \
37 $cco_slib_common_trailer &
38 done
39
40 #------------------------------------------------------------------------------
41
42 for f in $libcompiler_cxx_files
43 do
44 libcompiler_cxx_obj_dir=$(dirname $f)
45 libcompiler_cxx_obj_dir=$build_dir/${libcompiler_cxx_obj_dir#*/src/}
46 mkdir -p $libcompiler_cxx_obj_dir
47
48 libcompiler_cxx_obj="$libcompiler_cxx_obj_dir/$(basename $f .c).o"
49 libcompiler_a="$libcompiler_a $libcompiler_cxx_obj"
50
51 $cxxo_slib -o $libcompiler_cxx_obj $f \
52 -I$build_dir/src/compiler/glsl \
53 -I$src_dir/src/gallium/include \
54 -I$src_dir/src/mesa \
55 -I$src_dir/src \
56 -I$src_dir/include \
57 \
58 $cxxo_slib_common_trailer &
59 done
60
61 wait
62
63 $ar $build_dir/libcompiler.a $libcompiler_a
64
65 #===============================================================================
66
67 # nir related spirv stuff, even if, here, we build opengl, because nir deals
68 # with both glsl and spirv
69
70 mkdir -p $build_dir/src/compiler/spirv
71
72 export PYTHONPATH=$mako
73 $python3 $src_dir/src/compiler/spirv/vtn_gather_types_c.py \
74 $src_dir/src/compiler/spirv/spirv.core.grammar.json \
75 $build_dir/src/compiler/spirv/vtn_gather_types.c &
76
77 $python3 $src_dir/src/compiler/spirv/spirv_info_c.py \
78 $src_dir/src/compiler/spirv/spirv.core.grammar.json \
79 $build_dir/src/compiler/spirv/spirv_info.c &
80 unset PYTHONPATH
81
82 wait
83
84 #===============================================================================
85
86 . $script_dir/compiler_nir.sh
87 . $script_dir/compiler_glsl.sh
88 echo "<--gpu compiler components built"
File builders/mesa-gl-1/contrib/compiler_glsl.sh deleted (index 7d61b76..0000000)
1 printf "\tbuilding glsl compiler sub-components-->\n"
2 mkdir -p $build_dir/src/compiler/glsl/glcpp
3
4 #===============================================================================
5
6 $bison \
7 -o $build_dir/src/compiler/glsl/glcpp/glcpp-parse.c \
8 -p glcpp_parser_ \
9 --defines=$build_dir/src/compiler/glsl/glcpp/glcpp-parse.h \
10 $src_dir/src/compiler/glsl/glcpp/glcpp-parse.y &
11 #------------------------------------------------------------------------------
12 $flex \
13 -o $build_dir/src/compiler/glsl/glcpp/glcpp-lex.c \
14 $src_dir/src/compiler/glsl/glcpp/glcpp-lex.l &
15
16 wait
17
18 #===============================================================================
19
20 libglcpp_files="\
21 $src_dir/src/compiler/glsl/glcpp/pp.c \
22 $src_dir/src/compiler/glsl/glcpp/pp_standalone_scaffolding.c \
23 $build_dir/src/compiler/glsl/glcpp/glcpp-lex.c \
24 $build_dir/src/compiler/glsl/glcpp/glcpp-parse.c \
25 "
26
27 for f in $libglcpp_files
28 do
29 libglcpp_obj_dir=$(dirname $f)
30 libglcpp_obj_dir=$build_dir/${libglcpp_obj_dir#*/src/}
31 mkdir -p $libglcpp_obj_dir
32
33 libglcpp_obj="$libglcpp_obj_dir/$(basename $f .c).o"
34 libglcpp_a="$libglcpp_a $libglcpp_obj"
35
36 $cco_slib -o $libglcpp_obj $f \
37 -I$src_dir/src/compiler/glsl/glcpp \
38 -I$src_dir/src/mapi \
39 -I$src_dir/src/main \
40 -I$src_dir/src/mesa \
41 -I$src_dir/src \
42 -I$src_dir/include \
43 \
44 $cco_slib_common_trailer &
45 done
46
47 wait
48
49 $ar $build_dir/libglcpp.a $libglcpp_a
50
51 #===============================================================================
52
53 $bison \
54 -o $build_dir/src/compiler/glsl/glsl_parser.cpp \
55 -p _mesa_glsl_ \
56 --defines=$build_dir/src/compiler/glsl/glsl_parser.h \
57 $src_dir/src/compiler/glsl/glsl_parser.yy &
58 #------------------------------------------------------------------------------
59 $flex \
60 -o $build_dir/src/compiler/glsl/glsl_lexer.cpp \
61 $src_dir/src/compiler/glsl/glsl_lexer.ll &
62 #------------------------------------------------------------------------------
63 export PYTHONPATH=$mako
64 $python3 $src_dir/src/compiler/glsl/ir_expression_operation.py constant \
65 >$build_dir/src/compiler/glsl/ir_expression_operation_constant.h &
66 #------------------------------------------------------------------------------
67 $python3 $src_dir/src/compiler/glsl/ir_expression_operation.py strings \
68 >$build_dir/src/compiler/glsl/ir_expression_operation_strings.h &
69 unset PYTHONPATH
70 #------------------------------------------------------------------------------
71 $python3 $src_dir/src/util/xxd.py \
72 $src_dir/src/compiler/glsl/float64.glsl \
73 $build_dir/src/compiler/glsl/float64_glsl.h \
74 -n float64_source &
75 #------------------------------------------------------------------------------
76
77 wait
78
79 #===============================================================================
80
81 libglsl_c_files="\
82 $src_dir/src/compiler/glsl/gl_nir_lower_atomics.c \
83 $src_dir/src/compiler/glsl/gl_nir_lower_images.c \
84 $src_dir/src/compiler/glsl/gl_nir_lower_buffers.c \
85 $src_dir/src/compiler/glsl/gl_nir_lower_samplers.c \
86 $src_dir/src/compiler/glsl/gl_nir_lower_samplers_as_deref.c \
87 $src_dir/src/compiler/glsl/gl_nir_link_atomics.c \
88 $src_dir/src/compiler/glsl/gl_nir_link_uniform_initializers.c \
89 $src_dir/src/compiler/glsl/gl_nir_link_uniform_blocks.c \
90 $src_dir/src/compiler/glsl/gl_nir_link_uniforms.c \
91 $src_dir/src/compiler/glsl/gl_nir_link_xfb.c \
92 $src_dir/src/compiler/glsl/gl_nir_linker.c \
93 "
94
95 # c++ toolchain is Hell (slow/kludgy/insane/etc)
96 libglsl_cxx_files="\
97 $build_dir/src/compiler/glsl/glsl_parser.cpp \
98 $build_dir/src/compiler/glsl/glsl_lexer.cpp \
99 $src_dir/src/compiler/glsl/ast_array_index.cpp \
100 $src_dir/src/compiler/glsl/ast_expr.cpp \
101 $src_dir/src/compiler/glsl/ast_function.cpp \
102 $src_dir/src/compiler/glsl/ast_to_hir.cpp \
103 $src_dir/src/compiler/glsl/ast_type.cpp \
104 $src_dir/src/compiler/glsl/builtin_functions.cpp \
105 $src_dir/src/compiler/glsl/builtin_types.cpp \
106 $src_dir/src/compiler/glsl/builtin_variables.cpp \
107 $src_dir/src/compiler/glsl/generate_ir.cpp \
108 $src_dir/src/compiler/glsl/glsl_parser_extras.cpp \
109 $src_dir/src/compiler/glsl/glsl_symbol_table.cpp \
110 $src_dir/src/compiler/glsl/glsl_to_nir.cpp \
111 $src_dir/src/compiler/glsl/hir_field_selection.cpp \
112 $src_dir/src/compiler/glsl/ir_array_refcount.cpp \
113 $src_dir/src/compiler/glsl/ir_basic_block.cpp \
114 $src_dir/src/compiler/glsl/ir_builder.cpp \
115 $src_dir/src/compiler/glsl/ir_clone.cpp \
116 $src_dir/src/compiler/glsl/ir_constant_expression.cpp \
117 $src_dir/src/compiler/glsl/ir.cpp \
118 $src_dir/src/compiler/glsl/ir_equals.cpp \
119 $src_dir/src/compiler/glsl/ir_expression_flattening.cpp \
120 $src_dir/src/compiler/glsl/ir_function_can_inline.cpp \
121 $src_dir/src/compiler/glsl/ir_function_detect_recursion.cpp \
122 $src_dir/src/compiler/glsl/ir_function.cpp \
123 $src_dir/src/compiler/glsl/ir_hierarchical_visitor.cpp \
124 $src_dir/src/compiler/glsl/ir_hv_accept.cpp \
125 $src_dir/src/compiler/glsl/ir_print_visitor.cpp \
126 $src_dir/src/compiler/glsl/ir_reader.cpp \
127 $src_dir/src/compiler/glsl/ir_rvalue_visitor.cpp \
128 $src_dir/src/compiler/glsl/ir_set_program_inouts.cpp \
129 $src_dir/src/compiler/glsl/ir_validate.cpp \
130 $src_dir/src/compiler/glsl/ir_variable_refcount.cpp \
131 $src_dir/src/compiler/glsl/linker.cpp \
132 $src_dir/src/compiler/glsl/linker_util.cpp \
133 $src_dir/src/compiler/glsl/link_atomics.cpp \
134 $src_dir/src/compiler/glsl/link_functions.cpp \
135 $src_dir/src/compiler/glsl/link_interface_blocks.cpp \
136 $src_dir/src/compiler/glsl/link_uniforms.cpp \
137 $src_dir/src/compiler/glsl/link_uniform_initializers.cpp \
138 $src_dir/src/compiler/glsl/link_uniform_block_active_visitor.cpp \
139 $src_dir/src/compiler/glsl/link_uniform_blocks.cpp \
140 $src_dir/src/compiler/glsl/link_varyings.cpp \
141 $src_dir/src/compiler/glsl/loop_analysis.cpp \
142 $src_dir/src/compiler/glsl/loop_unroll.cpp \
143 $src_dir/src/compiler/glsl/lower_blend_equation_advanced.cpp \
144 $src_dir/src/compiler/glsl/lower_buffer_access.cpp \
145 $src_dir/src/compiler/glsl/lower_builtins.cpp \
146 $src_dir/src/compiler/glsl/lower_const_arrays_to_uniforms.cpp \
147 $src_dir/src/compiler/glsl/lower_cs_derived.cpp \
148 $src_dir/src/compiler/glsl/lower_discard.cpp \
149 $src_dir/src/compiler/glsl/lower_discard_flow.cpp \
150 $src_dir/src/compiler/glsl/lower_distance.cpp \
151 $src_dir/src/compiler/glsl/lower_if_to_cond_assign.cpp \
152 $src_dir/src/compiler/glsl/lower_instructions.cpp \
153 $src_dir/src/compiler/glsl/lower_int64.cpp \
154 $src_dir/src/compiler/glsl/lower_jumps.cpp \
155 $src_dir/src/compiler/glsl/lower_mat_op_to_vec.cpp \
156 $src_dir/src/compiler/glsl/lower_offset_array.cpp \
157 $src_dir/src/compiler/glsl/lower_packed_varyings.cpp \
158 $src_dir/src/compiler/glsl/lower_precision.cpp \
159 $src_dir/src/compiler/glsl/lower_named_interface_blocks.cpp \
160 $src_dir/src/compiler/glsl/lower_packing_builtins.cpp \
161 $src_dir/src/compiler/glsl/lower_subroutine.cpp \
162 $src_dir/src/compiler/glsl/lower_tess_level.cpp \
163 $src_dir/src/compiler/glsl/lower_texture_projection.cpp \
164 $src_dir/src/compiler/glsl/lower_variable_index_to_cond_assign.cpp \
165 $src_dir/src/compiler/glsl/lower_vec_index_to_cond_assign.cpp \
166 $src_dir/src/compiler/glsl/lower_vec_index_to_swizzle.cpp \
167 $src_dir/src/compiler/glsl/lower_vector.cpp \
168 $src_dir/src/compiler/glsl/lower_vector_derefs.cpp \
169 $src_dir/src/compiler/glsl/lower_vector_insert.cpp \
170 $src_dir/src/compiler/glsl/lower_vertex_id.cpp \
171 $src_dir/src/compiler/glsl/lower_output_reads.cpp \
172 $src_dir/src/compiler/glsl/lower_shared_reference.cpp \
173 $src_dir/src/compiler/glsl/lower_ubo_reference.cpp \
174 $src_dir/src/compiler/glsl/lower_xfb_varying.cpp \
175 $src_dir/src/compiler/glsl/opt_algebraic.cpp \
176 $src_dir/src/compiler/glsl/opt_array_splitting.cpp \
177 $src_dir/src/compiler/glsl/opt_conditional_discard.cpp \
178 $src_dir/src/compiler/glsl/opt_constant_folding.cpp \
179 $src_dir/src/compiler/glsl/opt_constant_propagation.cpp \
180 $src_dir/src/compiler/glsl/opt_constant_variable.cpp \
181 $src_dir/src/compiler/glsl/opt_copy_propagation_elements.cpp \
182 $src_dir/src/compiler/glsl/opt_dead_builtin_variables.cpp \
183 $src_dir/src/compiler/glsl/opt_dead_builtin_varyings.cpp \
184 $src_dir/src/compiler/glsl/opt_dead_code.cpp \
185 $src_dir/src/compiler/glsl/opt_dead_code_local.cpp \
186 $src_dir/src/compiler/glsl/opt_dead_functions.cpp \
187 $src_dir/src/compiler/glsl/opt_flatten_nested_if_blocks.cpp \
188 $src_dir/src/compiler/glsl/opt_flip_matrices.cpp \
189 $src_dir/src/compiler/glsl/opt_function_inlining.cpp \
190 $src_dir/src/compiler/glsl/opt_if_simplification.cpp \
191 $src_dir/src/compiler/glsl/opt_minmax.cpp \
192 $src_dir/src/compiler/glsl/opt_rebalance_tree.cpp \
193 $src_dir/src/compiler/glsl/opt_redundant_jumps.cpp \
194 $src_dir/src/compiler/glsl/opt_structure_splitting.cpp \
195 $src_dir/src/compiler/glsl/opt_swizzle.cpp \
196 $src_dir/src/compiler/glsl/opt_tree_grafting.cpp \
197 $src_dir/src/compiler/glsl/opt_vectorize.cpp \
198 $src_dir/src/compiler/glsl/propagate_invariance.cpp \
199 $src_dir/src/compiler/glsl/s_expression.cpp \
200 $src_dir/src/compiler/glsl/string_to_uint_map.cpp \
201 $src_dir/src/compiler/glsl/serialize.cpp \
202 $src_dir/src/compiler/glsl/shader_cache.cpp \
203 "
204
205 #------------------------------------------------------------------------------
206
207 for f in $libglsl_c_files
208 do
209 libglsl_c_obj_dir=$(dirname $f)
210 libglsl_c_obj_dir=$build_dir/${libglsl_c_obj_dir#*/src/}
211 mkdir -p $libglsl_c_obj_dir
212
213 libglsl_c_obj="$libglsl_c_obj_dir/$(basename $f .c).o"
214 libglsl_a="$libglsl_a $libglsl_c_obj"
215
216 $cco_slib -o $libglsl_c_obj $f \
217 -I$build_dir/src/compiler/nir \
218 -I$src_dir/src/compiler/nir \
219 -I$src_dir/src/compiler \
220 -I$src_dir/src/gallium/include \
221 -I$src_dir/src/mapi \
222 -I$src_dir/src/mesa \
223 -I$src_dir/src \
224 -I$src_dir/include \
225 \
226 $cco_slib_common_trailer &
227 done
228
229 tasks_n=0
230 for f in $libglsl_cxx_files
231 do
232 libglsl_cxx_obj_dir=$(dirname $f)
233 libglsl_cxx_obj_dir=$build_dir/${libglsl_cxx_obj_dir#*/src/}
234 mkdir -p $libglsl_cxx_obj_dir
235
236 libglsl_cxx_obj="$libglsl_cxx_obj_dir/$(basename $f .cpp).o"
237 libglsl_a="$libglsl_a $libglsl_cxx_obj"
238
239 $cxxo_slib -o $libglsl_cxx_obj $f \
240 -I$build_dir/src/compiler/glsl \
241 -I$build_dir/src/compiler/nir \
242 -I$build_dir/src/compiler \
243 -I$src_dir/src/compiler/nir \
244 -I$src_dir/src/compiler/glsl \
245 -I$src_dir/src/compiler \
246 -I$src_dir/src/gallium/include \
247 -I$src_dir/src/mapi \
248 -I$src_dir/src/mesa \
249 -I$src_dir/src \
250 -I$src_dir/include \
251 \
252 $cxxo_slib_common_trailer &
253
254 tasks_n=$((tasks_n+1))
255 if test $tasks_n -eq $tasks_n_max; then
256 wait
257 tasks_n=0
258 fi
259 done
260
261 wait
262
263 $ar $build_dir/libglsl.a $libglsl_a
264 printf "\t<--glsl compiler sub-components built\n"
File builders/mesa-gl-1/contrib/compiler_nir.sh deleted (index 03731ef..0000000)
1 printf "\tbuilding nir compiler sub-components-->\n"
2 mkdir -p $build_dir/src/compiler/nir
3
4 #===============================================================================
5
6 export PYTHONPATH=$mako
7 $python3 $src_dir/src/compiler/nir/nir_builder_opcodes_h.py \
8 >$build_dir/src/compiler/nir/nir_builder_opcodes.h &
9 #------------------------------------------------------------------------------
10 $python3 $src_dir/src/compiler/nir/nir_constant_expressions.py \
11 >$build_dir/src/compiler/nir/nir_constant_expressions.c &
12 #------------------------------------------------------------------------------
13 $python3 $src_dir/src/compiler/nir/nir_opcodes_h.py \
14 >$build_dir/src/compiler/nir/nir_opcodes.h &
15 #------------------------------------------------------------------------------
16 $python3 $src_dir/src/compiler/nir/nir_opcodes_c.py \
17 >$build_dir/src/compiler/nir/nir_opcodes.c &
18 #------------------------------------------------------------------------------
19 $python3 $src_dir/src/compiler/nir/nir_opt_algebraic.py \
20 >$build_dir/src/compiler/nir/nir_opt_algebraic.c &
21 #------------------------------------------------------------------------------
22 $python3 $src_dir/src/compiler/nir/nir_intrinsics_h.py \
23 --outdir $build_dir/src/compiler/nir &
24 #------------------------------------------------------------------------------
25 $python3 $src_dir/src/compiler/nir/nir_intrinsics_c.py \
26 --outdir $build_dir/src/compiler/nir &
27 unset PYTHONPATH
28
29 wait
30
31 #===============================================================================
32
33 libnir_files="\
34 $build_dir/src/compiler/spirv/vtn_gather_types.c \
35 $build_dir/src/compiler/spirv/spirv_info.c \
36 $build_dir/src/compiler/nir/nir_constant_expressions.c \
37 $build_dir/src/compiler/nir/nir_opcodes.c \
38 $build_dir/src/compiler/nir/nir_opt_algebraic.c \
39 $build_dir/src/compiler/nir/nir_intrinsics.c \
40 $src_dir/src/compiler/nir/nir.c \
41 $src_dir/src/compiler/nir/nir_builtin_builder.c \
42 $src_dir/src/compiler/nir/nir_clone.c \
43 $src_dir/src/compiler/nir/nir_control_flow.c \
44 $src_dir/src/compiler/nir/nir_convert_ycbcr.c \
45 $src_dir/src/compiler/nir/nir_deref.c \
46 $src_dir/src/compiler/nir/nir_divergence_analysis.c \
47 $src_dir/src/compiler/nir/nir_dominance.c \
48 $src_dir/src/compiler/nir/nir_from_ssa.c \
49 $src_dir/src/compiler/nir/nir_gather_info.c \
50 $src_dir/src/compiler/nir/nir_gather_ssa_types.c \
51 $src_dir/src/compiler/nir/nir_gather_xfb_info.c \
52 $src_dir/src/compiler/nir/nir_gs_count_vertices.c \
53 $src_dir/src/compiler/nir/nir_inline_functions.c \
54 $src_dir/src/compiler/nir/nir_inline_uniforms.c \
55 $src_dir/src/compiler/nir/nir_instr_set.c \
56 $src_dir/src/compiler/nir/nir_linking_helpers.c \
57 $src_dir/src/compiler/nir/nir_liveness.c \
58 $src_dir/src/compiler/nir/nir_loop_analyze.c \
59 $src_dir/src/compiler/nir/nir_lower_alu.c \
60 $src_dir/src/compiler/nir/nir_lower_alu_to_scalar.c \
61 $src_dir/src/compiler/nir/nir_lower_alpha_test.c \
62 $src_dir/src/compiler/nir/nir_lower_amul.c \
63 $src_dir/src/compiler/nir/nir_lower_atomics_to_ssbo.c \
64 $src_dir/src/compiler/nir/nir_lower_bitmap.c \
65 $src_dir/src/compiler/nir/nir_lower_bool_to_bitsize.c \
66 $src_dir/src/compiler/nir/nir_lower_bool_to_float.c \
67 $src_dir/src/compiler/nir/nir_lower_bool_to_int32.c \
68 $src_dir/src/compiler/nir/nir_lower_cl_images_to_tex.c \
69 $src_dir/src/compiler/nir/nir_lower_clamp_color_outputs.c \
70 $src_dir/src/compiler/nir/nir_lower_clip.c \
71 $src_dir/src/compiler/nir/nir_lower_clip_cull_distance_arrays.c \
72 $src_dir/src/compiler/nir/nir_lower_clip_disable.c \
73 $src_dir/src/compiler/nir/nir_lower_clip_halfz.c \
74 $src_dir/src/compiler/nir/nir_lower_convert_alu_types.c \
75 $src_dir/src/compiler/nir/nir_lower_discard_to_demote.c \
76 $src_dir/src/compiler/nir/nir_lower_double_ops.c \
77 $src_dir/src/compiler/nir/nir_lower_drawpixels.c \
78 $src_dir/src/compiler/nir/nir_lower_fb_read.c \
79 $src_dir/src/compiler/nir/nir_lower_flatshade.c \
80 $src_dir/src/compiler/nir/nir_lower_flrp.c \
81 $src_dir/src/compiler/nir/nir_lower_fragcolor.c \
82 $src_dir/src/compiler/nir/nir_lower_fragcoord_wtrans.c \
83 $src_dir/src/compiler/nir/nir_lower_frexp.c \
84 $src_dir/src/compiler/nir/nir_lower_global_vars_to_local.c \
85 $src_dir/src/compiler/nir/nir_lower_goto_ifs.c \
86 $src_dir/src/compiler/nir/nir_lower_gs_intrinsics.c \
87 $src_dir/src/compiler/nir/nir_lower_input_attachments.c \
88 $src_dir/src/compiler/nir/nir_lower_int_to_float.c \
89 $src_dir/src/compiler/nir/nir_lower_interpolation.c \
90 $src_dir/src/compiler/nir/nir_lower_load_const_to_scalar.c \
91 $src_dir/src/compiler/nir/nir_lower_locals_to_regs.c \
92 $src_dir/src/compiler/nir/nir_lower_idiv.c \
93 $src_dir/src/compiler/nir/nir_lower_indirect_derefs.c \
94 $src_dir/src/compiler/nir/nir_lower_int64.c \
95 $src_dir/src/compiler/nir/nir_lower_io.c \
96 $src_dir/src/compiler/nir/nir_lower_io_arrays_to_elements.c \
97 $src_dir/src/compiler/nir/nir_lower_io_to_temporaries.c \
98 $src_dir/src/compiler/nir/nir_lower_io_to_scalar.c \
99 $src_dir/src/compiler/nir/nir_lower_io_to_vector.c \
100 $src_dir/src/compiler/nir/nir_lower_mediump_outputs.c \
101 $src_dir/src/compiler/nir/nir_lower_memcpy.c \
102 $src_dir/src/compiler/nir/nir_lower_memory_model.c \
103 $src_dir/src/compiler/nir/nir_lower_multiview.c \
104 $src_dir/src/compiler/nir/nir_lower_non_uniform_access.c \
105 $src_dir/src/compiler/nir/nir_lower_packing.c \
106 $src_dir/src/compiler/nir/nir_lower_passthrough_edgeflags.c \
107 $src_dir/src/compiler/nir/nir_lower_patch_vertices.c \
108 $src_dir/src/compiler/nir/nir_lower_phis_to_scalar.c \
109 $src_dir/src/compiler/nir/nir_lower_point_size.c \
110 $src_dir/src/compiler/nir/nir_lower_point_size_mov.c \
111 $src_dir/src/compiler/nir/nir_lower_regs_to_ssa.c \
112 $src_dir/src/compiler/nir/nir_lower_returns.c \
113 $src_dir/src/compiler/nir/nir_lower_samplers.c \
114 $src_dir/src/compiler/nir/nir_lower_scratch.c \
115 $src_dir/src/compiler/nir/nir_lower_subgroups.c \
116 $src_dir/src/compiler/nir/nir_lower_system_values.c \
117 $src_dir/src/compiler/nir/nir_lower_tex.c \
118 $src_dir/src/compiler/nir/nir_lower_to_source_mods.c \
119 $src_dir/src/compiler/nir/nir_lower_two_sided_color.c \
120 $src_dir/src/compiler/nir/nir_lower_ubo_vec4.c \
121 $src_dir/src/compiler/nir/nir_lower_vars_to_ssa.c \
122 $src_dir/src/compiler/nir/nir_lower_var_copies.c \
123 $src_dir/src/compiler/nir/nir_lower_variable_initializers.c \
124 $src_dir/src/compiler/nir/nir_lower_vec_to_movs.c \
125 $src_dir/src/compiler/nir/nir_lower_vec3_to_vec4.c \
126 $src_dir/src/compiler/nir/nir_lower_viewport_transform.c \
127 $src_dir/src/compiler/nir/nir_lower_wpos_center.c \
128 $src_dir/src/compiler/nir/nir_lower_wpos_ytransform.c \
129 $src_dir/src/compiler/nir/nir_lower_wrmasks.c \
130 $src_dir/src/compiler/nir/nir_lower_bit_size.c \
131 $src_dir/src/compiler/nir/nir_lower_uniforms_to_ubo.c \
132 $src_dir/src/compiler/nir/nir_metadata.c \
133 $src_dir/src/compiler/nir/nir_move_vec_src_uses_to_dest.c \
134 $src_dir/src/compiler/nir/nir_normalize_cubemap_coords.c \
135 $src_dir/src/compiler/nir/nir_opt_access.c \
136 $src_dir/src/compiler/nir/nir_opt_barriers.c \
137 $src_dir/src/compiler/nir/nir_opt_combine_stores.c \
138 $src_dir/src/compiler/nir/nir_opt_comparison_pre.c \
139 $src_dir/src/compiler/nir/nir_opt_conditional_discard.c \
140 $src_dir/src/compiler/nir/nir_opt_constant_folding.c \
141 $src_dir/src/compiler/nir/nir_opt_copy_prop_vars.c \
142 $src_dir/src/compiler/nir/nir_opt_copy_propagate.c \
143 $src_dir/src/compiler/nir/nir_opt_cse.c \
144 $src_dir/src/compiler/nir/nir_opt_dce.c \
145 $src_dir/src/compiler/nir/nir_opt_dead_cf.c \
146 $src_dir/src/compiler/nir/nir_opt_dead_write_vars.c \
147 $src_dir/src/compiler/nir/nir_opt_find_array_copies.c \
148 $src_dir/src/compiler/nir/nir_opt_gcm.c \
149 $src_dir/src/compiler/nir/nir_opt_idiv_const.c \
150 $src_dir/src/compiler/nir/nir_opt_if.c \
151 $src_dir/src/compiler/nir/nir_opt_intrinsics.c \
152 $src_dir/src/compiler/nir/nir_opt_large_constants.c \
153 $src_dir/src/compiler/nir/nir_opt_load_store_vectorize.c \
154 $src_dir/src/compiler/nir/nir_opt_loop_unroll.c \
155 $src_dir/src/compiler/nir/nir_opt_memcpy.c \
156 $src_dir/src/compiler/nir/nir_opt_move.c \
157 $src_dir/src/compiler/nir/nir_opt_peephole_select.c \
158 $src_dir/src/compiler/nir/nir_opt_rematerialize_compares.c \
159 $src_dir/src/compiler/nir/nir_opt_remove_phis.c \
160 $src_dir/src/compiler/nir/nir_opt_shrink_vectors.c \
161 $src_dir/src/compiler/nir/nir_opt_sink.c \
162 $src_dir/src/compiler/nir/nir_opt_trivial_continues.c \
163 $src_dir/src/compiler/nir/nir_opt_undef.c \
164 $src_dir/src/compiler/nir/nir_opt_vectorize.c \
165 $src_dir/src/compiler/nir/nir_phi_builder.c \
166 $src_dir/src/compiler/nir/nir_print.c \
167 $src_dir/src/compiler/nir/nir_propagate_invariant.c \
168 $src_dir/src/compiler/nir/nir_range_analysis.c \
169 $src_dir/src/compiler/nir/nir_remove_dead_variables.c \
170 $src_dir/src/compiler/nir/nir_repair_ssa.c \
171 $src_dir/src/compiler/nir/nir_search.c \
172 $src_dir/src/compiler/nir/nir_schedule.c \
173 $src_dir/src/compiler/nir/nir_serialize.c \
174 $src_dir/src/compiler/nir/nir_split_per_member_structs.c \
175 $src_dir/src/compiler/nir/nir_split_var_copies.c \
176 $src_dir/src/compiler/nir/nir_split_vars.c \
177 $src_dir/src/compiler/nir/nir_sweep.c \
178 $src_dir/src/compiler/nir/nir_to_lcssa.c \
179 $src_dir/src/compiler/nir/nir_validate.c \
180 $src_dir/src/compiler/nir/nir_worklist.c \
181 $src_dir/src/compiler/nir/nir_xfb_info.h \
182 $src_dir/src/compiler/spirv/gl_spirv.c \
183 $src_dir/src/compiler/spirv/spirv_to_nir.c \
184 $src_dir/src/compiler/spirv/vtn_alu.c \
185 $src_dir/src/compiler/spirv/vtn_amd.c \
186 $src_dir/src/compiler/spirv/vtn_cfg.c \
187 $src_dir/src/compiler/spirv/vtn_glsl450.c \
188 $src_dir/src/compiler/spirv/vtn_subgroup.c \
189 $src_dir/src/compiler/spirv/vtn_variables.c \
190 $src_dir/src/compiler/spirv/vtn_opencl.c \
191 "
192
193 #------------------------------------------------------------------------------
194
195 tasks_n=0
196 for f in $libnir_files
197 do
198 libnir_obj_dir=$(dirname $f)
199 libnir_obj_dir=$build_dir/${libnir_obj_dir#*/src/}
200 mkdir -p $libnir_obj_dir
201
202 libnir_obj="$libnir_obj_dir/$(basename $f .c).o"
203 libnir_a="$libnir_a $libnir_obj"
204
205 $cco_slib -o $libnir_obj $f \
206 -I$build_dir/src/compiler/nir \
207 -I$src_dir/src/gallium/include \
208 -I$src_dir/src/compiler/spirv \
209 -I$src_dir/src/compiler/nir \
210 -I$src_dir/src/compiler \
211 -I$src_dir/src/mesa \
212 -I$src_dir/src \
213 -I$src_dir/include \
214 \
215 $mesa_cppflags \
216 \
217 $external_deps_cppflags \
218 \
219 $glibc_cppflags \
220 $glibc_linux_cppflags \
221 $linux_cppflags \
222 $gcc_cppflags \
223 \
224 $cflags_opt &
225
226 tasks_n=$((tasks_n+1))
227 if test $tasks_n -eq $tasks_n_max; then
228 wait
229 tasks_n=0
230 fi
231 done
232
233 wait
234
235 $ar $build_dir/libnir.a $libnir_a
236 printf "\t<--nir compiler sub-components built\n"
File builders/mesa-gl-1/contrib/gallium_auxiliary.sh deleted (index 56b542a..0000000)
1 printf "\tbuilding gallium auxiliary sub-components-->\n"
2
3 #-------------------------------------------------------------------------------
4
5 mkdir -p $build_dir/src/gallium/auxiliary/indices
6
7 $python3 $src_dir/src/gallium/auxiliary/indices/u_indices_gen.py \
8 >$build_dir/src/gallium/auxiliary/indices/u_indices_gen.c
9
10 $python3 $src_dir/src/gallium/auxiliary/indices/u_unfilled_gen.py \
11 >$build_dir/src/gallium/auxiliary/indices/u_unfilled_gen.c
12
13 #-------------------------------------------------------------------------------
14
15 libgallium_c_files="\
16 $build_dir/src/gallium/auxiliary/indices/u_indices_gen.c \
17 $build_dir/src/gallium/auxiliary/indices/u_unfilled_gen.c \
18 $src_dir/src/gallium/auxiliary/cso_cache/cso_cache.c \
19 $src_dir/src/gallium/auxiliary/cso_cache/cso_cache.h \
20 $src_dir/src/gallium/auxiliary/cso_cache/cso_context.c \
21 $src_dir/src/gallium/auxiliary/cso_cache/cso_hash.c \
22 $src_dir/src/gallium/auxiliary/draw/draw_context.c \
23 $src_dir/src/gallium/auxiliary/draw/draw_fs.c \
24 $src_dir/src/gallium/auxiliary/draw/draw_gs.c \
25 $src_dir/src/gallium/auxiliary/draw/draw_pipe_aaline.c \
26 $src_dir/src/gallium/auxiliary/draw/draw_pipe_aapoint.c \
27 $src_dir/src/gallium/auxiliary/draw/draw_pipe.c \
28 $src_dir/src/gallium/auxiliary/draw/draw_pipe_clip.c \
29 $src_dir/src/gallium/auxiliary/draw/draw_pipe_cull.c \
30 $src_dir/src/gallium/auxiliary/draw/draw_pipe_flatshade.c \
31 $src_dir/src/gallium/auxiliary/draw/draw_pipe_offset.c \
32 $src_dir/src/gallium/auxiliary/draw/draw_pipe_pstipple.c \
33 $src_dir/src/gallium/auxiliary/draw/draw_pipe_stipple.c \
34 $src_dir/src/gallium/auxiliary/draw/draw_pipe_twoside.c \
35 $src_dir/src/gallium/auxiliary/draw/draw_pipe_unfilled.c \
36 $src_dir/src/gallium/auxiliary/draw/draw_pipe_user_cull.c \
37 $src_dir/src/gallium/auxiliary/draw/draw_pipe_util.c \
38 $src_dir/src/gallium/auxiliary/draw/draw_pipe_validate.c \
39 $src_dir/src/gallium/auxiliary/draw/draw_pipe_vbuf.c \
40 $src_dir/src/gallium/auxiliary/draw/draw_pipe_wide_line.c \
41 $src_dir/src/gallium/auxiliary/draw/draw_pipe_wide_point.c \
42 $src_dir/src/gallium/auxiliary/draw/draw_prim_assembler.c \
43 $src_dir/src/gallium/auxiliary/draw/draw_private.h \
44 $src_dir/src/gallium/auxiliary/draw/draw_pt.c \
45 $src_dir/src/gallium/auxiliary/draw/draw_pt_emit.c \
46 $src_dir/src/gallium/auxiliary/draw/draw_pt_fetch.c \
47 $src_dir/src/gallium/auxiliary/draw/draw_pt_fetch_emit.c \
48 $src_dir/src/gallium/auxiliary/draw/draw_pt_fetch_shade_emit.c \
49 $src_dir/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline.c \
50 $src_dir/src/gallium/auxiliary/draw/draw_pt_post_vs.c \
51 $src_dir/src/gallium/auxiliary/draw/draw_pt_so_emit.c \
52 $src_dir/src/gallium/auxiliary/draw/draw_pt_util.c \
53 $src_dir/src/gallium/auxiliary/draw/draw_pt_vsplit.c \
54 $src_dir/src/gallium/auxiliary/draw/draw_tess.c \
55 $src_dir/src/gallium/auxiliary/draw/draw_vertex.c \
56 $src_dir/src/gallium/auxiliary/draw/draw_vs.c \
57 $src_dir/src/gallium/auxiliary/draw/draw_vs_exec.c \
58 $src_dir/src/gallium/auxiliary/draw/draw_vs_variant.c \
59 $src_dir/src/gallium/auxiliary/driver_ddebug/dd_context.c \
60 $src_dir/src/gallium/auxiliary/driver_ddebug/dd_draw.c \
61 $src_dir/src/gallium/auxiliary/driver_ddebug/dd_screen.c \
62 $src_dir/src/gallium/auxiliary/driver_noop/noop_pipe.c \
63 $src_dir/src/gallium/auxiliary/driver_noop/noop_state.c \
64 $src_dir/src/gallium/auxiliary/driver_rbug/rbug_context.c \
65 $src_dir/src/gallium/auxiliary/driver_rbug/rbug_core.c \
66 $src_dir/src/gallium/auxiliary/driver_rbug/rbug_objects.c \
67 $src_dir/src/gallium/auxiliary/driver_rbug/rbug_screen.c \
68 $src_dir/src/gallium/auxiliary/driver_trace/tr_context.c \
69 $src_dir/src/gallium/auxiliary/driver_trace/tr_dump.c \
70 $src_dir/src/gallium/auxiliary/driver_trace/tr_dump_state.c \
71 $src_dir/src/gallium/auxiliary/driver_trace/tr_public.h \
72 $src_dir/src/gallium/auxiliary/driver_trace/tr_screen.c \
73 $src_dir/src/gallium/auxiliary/driver_trace/tr_texture.c \
74 $src_dir/src/gallium/auxiliary/hud/font.c \
75 $src_dir/src/gallium/auxiliary/hud/hud_context.c \
76 $src_dir/src/gallium/auxiliary/hud/hud_cpu.c \
77 $src_dir/src/gallium/auxiliary/hud/hud_nic.c \
78 $src_dir/src/gallium/auxiliary/hud/hud_cpufreq.c \
79 $src_dir/src/gallium/auxiliary/hud/hud_diskstat.c \
80 $src_dir/src/gallium/auxiliary/hud/hud_sensors_temp.c \
81 $src_dir/src/gallium/auxiliary/hud/hud_driver_query.c \
82 $src_dir/src/gallium/auxiliary/hud/hud_fps.c \
83 $src_dir/src/gallium/auxiliary/indices/u_primconvert.c \
84 $src_dir/src/gallium/auxiliary/os/os_process.c \
85 $src_dir/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c \
86 $src_dir/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c \
87 $src_dir/src/gallium/auxiliary/pipebuffer/pb_bufmgr_debug.c \
88 $src_dir/src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c \
89 $src_dir/src/gallium/auxiliary/pipebuffer/pb_bufmgr_slab.c \
90 $src_dir/src/gallium/auxiliary/pipebuffer/pb_cache.c \
91 $src_dir/src/gallium/auxiliary/pipebuffer/pb_slab.c \
92 $src_dir/src/gallium/auxiliary/pipebuffer/pb_validate.c \
93 $src_dir/src/gallium/auxiliary/postprocess/pp_celshade.c \
94 $src_dir/src/gallium/auxiliary/postprocess/pp_colors.c \
95 $src_dir/src/gallium/auxiliary/postprocess/pp_colors.h \
96 $src_dir/src/gallium/auxiliary/postprocess/pp_init.c \
97 $src_dir/src/gallium/auxiliary/postprocess/pp_mlaa.c \
98 $src_dir/src/gallium/auxiliary/postprocess/pp_program.c \
99 $src_dir/src/gallium/auxiliary/postprocess/pp_run.c \
100 $src_dir/src/gallium/auxiliary/rbug/rbug_connection.c \
101 $src_dir/src/gallium/auxiliary/rbug/rbug_context.c \
102 $src_dir/src/gallium/auxiliary/rbug/rbug_core.c \
103 $src_dir/src/gallium/auxiliary/rbug/rbug_demarshal.c \
104 $src_dir/src/gallium/auxiliary/rbug/rbug_shader.c \
105 $src_dir/src/gallium/auxiliary/rbug/rbug_texture.c \
106 $src_dir/src/gallium/auxiliary/rtasm/rtasm_cpu.c \
107 $src_dir/src/gallium/auxiliary/rtasm/rtasm_execmem.c \
108 $src_dir/src/gallium/auxiliary/rtasm/rtasm_x86sse.c \
109 $src_dir/src/gallium/auxiliary/tgsi/tgsi_aa_point.c \
110 $src_dir/src/gallium/auxiliary/tgsi/tgsi_build.c \
111 $src_dir/src/gallium/auxiliary/tgsi/tgsi_dump.c \
112 $src_dir/src/gallium/auxiliary/tgsi/tgsi_dynamic_indexing.c \
113 $src_dir/src/gallium/auxiliary/tgsi/tgsi_exec.c \
114 $src_dir/src/gallium/auxiliary/tgsi/tgsi_emulate.c \
115 $src_dir/src/gallium/auxiliary/tgsi/tgsi_from_mesa.c \
116 $src_dir/src/gallium/auxiliary/tgsi/tgsi_info.c \
117 $src_dir/src/gallium/auxiliary/tgsi/tgsi_iterate.c \
118 $src_dir/src/gallium/auxiliary/tgsi/tgsi_lowering.c \
119 $src_dir/src/gallium/auxiliary/tgsi/tgsi_parse.c \
120 $src_dir/src/gallium/auxiliary/tgsi/tgsi_point_sprite.c \
121 $src_dir/src/gallium/auxiliary/tgsi/tgsi_sanity.c \
122 $src_dir/src/gallium/auxiliary/tgsi/tgsi_scan.c \
123 $src_dir/src/gallium/auxiliary/tgsi/tgsi_strings.c \
124 $src_dir/src/gallium/auxiliary/tgsi/tgsi_text.c \
125 $src_dir/src/gallium/auxiliary/tgsi/tgsi_transform.c \
126 $src_dir/src/gallium/auxiliary/tgsi/tgsi_two_side.c \
127 $src_dir/src/gallium/auxiliary/tgsi/tgsi_ureg.c \
128 $src_dir/src/gallium/auxiliary/tgsi/tgsi_util.c \
129 $src_dir/src/gallium/auxiliary/tgsi/tgsi_vpos.c \
130 $src_dir/src/gallium/auxiliary/translate/translate.c \
131 $src_dir/src/gallium/auxiliary/translate/translate_cache.c \
132 $src_dir/src/gallium/auxiliary/translate/translate_generic.c \
133 $src_dir/src/gallium/auxiliary/translate/translate_sse.c \
134 $src_dir/src/gallium/auxiliary/util/u_async_debug.c \
135 $src_dir/src/gallium/auxiliary/util/u_bitmask.c \
136 $src_dir/src/gallium/auxiliary/util/u_blitter.c \
137 $src_dir/src/gallium/auxiliary/util/u_cache.c \
138 $src_dir/src/gallium/auxiliary/util/u_compute.c \
139 $src_dir/src/gallium/auxiliary/util/u_debug_describe.c \
140 $src_dir/src/gallium/auxiliary/util/u_debug_flush.c \
141 $src_dir/src/gallium/auxiliary/util/u_debug_image.c \
142 $src_dir/src/gallium/auxiliary/util/u_debug_refcnt.c \
143 $src_dir/src/gallium/auxiliary/util/u_dl.c \
144 $src_dir/src/gallium/auxiliary/util/u_draw.c \
145 $src_dir/src/gallium/auxiliary/util/u_draw_quad.c \
146 $src_dir/src/gallium/auxiliary/util/u_dump_defines.c \
147 $src_dir/src/gallium/auxiliary/util/u_dump_state.c \
148 $src_dir/src/gallium/auxiliary/util/u_framebuffer.c \
149 $src_dir/src/gallium/auxiliary/util/u_gen_mipmap.c \
150 $src_dir/src/gallium/auxiliary/util/u_handle_table.c \
151 $src_dir/src/gallium/auxiliary/util/u_hash_table.c \
152 $src_dir/src/gallium/auxiliary/util/u_helpers.c \
153 $src_dir/src/gallium/auxiliary/util/u_index_modify.c \
154 $src_dir/src/gallium/auxiliary/util/u_linear.c \
155 $src_dir/src/gallium/auxiliary/util/u_live_shader_cache.c \
156 $src_dir/src/gallium/auxiliary/util/u_log.c \
157 $src_dir/src/gallium/auxiliary/util/u_network.c \
158 $src_dir/src/gallium/auxiliary/util/u_prim.c \
159 $src_dir/src/gallium/auxiliary/util/u_prim_restart.c \
160 $src_dir/src/gallium/auxiliary/util/u_pstipple.c \
161 $src_dir/src/gallium/auxiliary/util/u_resource.c \
162 $src_dir/src/gallium/auxiliary/util/u_sampler.c \
163 $src_dir/src/gallium/auxiliary/util/u_screen.c \
164 $src_dir/src/gallium/auxiliary/util/u_simple_shaders.c \
165 $src_dir/src/gallium/auxiliary/util/u_split_draw.c \
166 $src_dir/src/gallium/auxiliary/util/u_suballoc.c \
167 $src_dir/src/gallium/auxiliary/util/u_surface.c \
168 $src_dir/src/gallium/auxiliary/util/u_tests.c \
169 $src_dir/src/gallium/auxiliary/util/u_texture.c \
170 $src_dir/src/gallium/auxiliary/util/u_tile.c \
171 $src_dir/src/gallium/auxiliary/util/u_transfer.c \
172 $src_dir/src/gallium/auxiliary/util/u_transfer_helper.c \
173 $src_dir/src/gallium/auxiliary/util/u_threaded_context.c \
174 $src_dir/src/gallium/auxiliary/util/u_upload_mgr.c \
175 $src_dir/src/gallium/auxiliary/util/u_vbuf.c \
176 $src_dir/src/gallium/auxiliary/nir/nir_draw_helpers.c \
177 $src_dir/src/gallium/auxiliary/nir/nir_to_tgsi_info.c \
178 $src_dir/src/gallium/auxiliary/nir/tgsi_to_nir.c \
179 \
180 $src_dir/src/gallium/auxiliary/renderonly/renderonly.c \
181 \
182 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_arit.c \
183 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_arit_overflow.c \
184 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_assert.c \
185 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_bitarit.c \
186 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_const.c \
187 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_conv.c \
188 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_coro.c \
189 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_flow.c \
190 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_format_aos_array.c \
191 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_format_aos.c \
192 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_format_float.c \
193 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_format_s3tc.c \
194 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_format.c \
195 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c \
196 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_format_srgb.c \
197 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_format_yuv.c \
198 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_gather.c \
199 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_init.c \
200 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_ir_common.c \
201 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_intr.c \
202 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_logic.c \
203 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_nir.c \
204 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c \
205 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_pack.c \
206 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_printf.c \
207 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_quad.c \
208 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_sample_aos.c \
209 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_sample.c \
210 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c \
211 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_struct.c \
212 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c \
213 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c \
214 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c \
215 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c \
216 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_tgsi_info.c \
217 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c \
218 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_type.c \
219 $src_dir/src/gallium/auxiliary/draw/draw_llvm.c \
220 $src_dir/src/gallium/auxiliary/draw/draw_llvm_sample.c \
221 $src_dir/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline_llvm.c \
222 $src_dir/src/gallium/auxiliary/draw/draw_vs_llvm.c \
223 "
224
225 libgallium_cxx_files="\
226 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_debug.cpp \
227 $src_dir/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp \
228 $src_dir/src/gallium/auxiliary/tessellator/p_tessellator.cpp \
229 $src_dir/src/gallium/auxiliary/tessellator/tessellator.cpp \
230 "
231
232 #------------------------------------------------------------------------------
233
234 tasks_n=0
235 for f in $libgallium_c_files
236 do
237 libgallium_c_obj_dir=$(dirname $f)
238 libgallium_c_obj_dir=$build_dir/${libgallium_c_obj_dir#*/src/}
239 mkdir -p $libgallium_c_obj_dir
240
241 libgallium_c_obj=$libgallium_c_obj_dir/$(basename $f .c).o
242 libgallium_a="$libgallium_a $libgallium_c_obj"
243
244 $cco_slib -o $libgallium_c_obj $f \
245 -I$build_dir/src/compiler/nir \
246 -I$src_dir/src/compiler/nir \
247 -I$src_dir/src/gallium/auxiliary/util \
248 -I$src_dir/src/gallium/auxiliary \
249 -I$src_dir/src/gallium/include \
250 -I$src_dir/src \
251 -I$src_dir/include \
252 \
253 $cco_slib_common_trailer &
254
255 tasks_n=$((tasks_n+1))
256 if test $tasks_n -eq $tasks_n_max; then
257 wait
258 tasks_n=0
259 fi
260 done
261
262 wait
263
264 #-------------------------------------------------------------------------------
265
266 for f in $libgallium_cxx_files
267 do
268 libgallium_cxx_obj_dir=$(dirname $f)
269 libgallium_cxx_obj_dir=$build_dir/${libgallium_cxx_obj_dir#*/src/}
270 mkdir -p $libgallium_cxx_obj_dir
271
272 libgallium_cxx_obj="$libgallium_cxx_obj_dir/$(basename $f .cpp).o"
273 libgallium_a="$libgallium_a $libgallium_cxx_obj"
274
275 $cxxo_slib -o $libgallium_cxx_obj $f \
276 -I$src_dir/src/gallium/auxiliary \
277 -I$src_dir/src/gallium/include \
278 -I$src_dir/src \
279 -I$src_dir/include \
280 \
281 $cxxo_slib_common_trailer &
282 done
283
284 wait
285
286 #-------------------------------------------------------------------------------
287
288 $ar $build_dir/libgallium.a $libgallium_a
289
290 #===============================================================================
291 # pipe-loader
292 # "backends" declare "devices", each linked to a specific winsys (windows
293 # system):
294 #
295 # - drm pipe-loader backend: declare a pipe loader device for each drm
296 # supported piece of hardware. Each pipe loader device gets linked to the
297 # piece of hardware specific winsys. For instance, amdgpu/drm device gets
298 # linked to amdgpu/drm winsys (with the legacy radeon/drm winsys
299 # fallback). The drm backend is include only if HAVE_LIBDRM is defined.
300 #
301 # - sw ("software") backend: declare the following devices:
302 # - dri device linked to the dri winsys if HAVE_PIPE_LOADER_DRI is
303 # defined
304 # - kms_dri device linked to the kms_dri winsys if
305 # HAVE_PIPE_LOADER_KMS is defined
306 # - null device linked to the null winsys if DROP_PIPE_LOADER_MISC
307 # is _NOT_ defined
308 # - wrapper device linked to the wrapper winsys if
309 # DROP_PIPE_LOADER_MISC is _NOT_ defined
310
311 # do remove the sw backend keep only the drm backend
312 mkdir -p $build_dir/src/gallium/auxiliary/pipe-loader
313 cp -f $src_dir/src/gallium/auxiliary/pipe-loader/pipe_loader.c $build_dir/src/gallium/auxiliary/pipe-loader/
314 patch -i $script_dir/pipe_loader.c.patch $build_dir/src/gallium/auxiliary/pipe-loader/pipe_loader.c
315
316 libpipe_loader_static_files="\
317 $build_dir/src/gallium/auxiliary/pipe-loader/pipe_loader.c \
318 \
319 $src_dir/src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c \
320 "
321
322 #-------------------------------------------------------------------------------
323
324 for f in $libpipe_loader_static_files
325 do
326 libpipe_loader_static_c_obj_dir=$(dirname $f)
327 libpipe_loader_static_c_obj_dir=$build_dir/${libpipe_loader_static_c_obj_dir#*/src/}
328 mkdir -p $libpipe_loader_static_c_obj_dir
329
330 libpipe_loader_static_c_obj="$libpipe_loader_static_c_obj_dir/$(basename $f .c).o"
331 libpipe_loader_static_a="$libpipe_loader_static_a $libpipe_loader_static_c_obj"
332
333 $cco_slib -o $libpipe_loader_static_c_obj $f \
334 -DGALLIUM_STATIC_TARGETS=1 \
335 \
336 -I$build_dir/src/util \
337 -I$src_dir/src/gallium/auxiliary/pipe-loader \
338 -I$src_dir/src/gallium/winsys \
339 -I$src_dir/src/gallium/auxiliary \
340 -I$src_dir/src/gallium/include \
341 -I$src_dir/src/util \
342 -I$src_dir/src/loader \
343 -I$src_dir/src \
344 -I$src_dir/include \
345 \
346 $cco_slib_common_trailer &
347
348 done
349
350 wait
351
352 #-------------------------------------------------------------------------------
353
354 $ar $build_dir/libpipe_loader_static.a $libpipe_loader_static_a
355
356 #===============================================================================
357 # galliumvl
358 # vl=Video Layer, where you can find vdpau/vapi hardwarer accelerated drivers,
359 # but we do use only the empty stubs
360
361 mkdir -p $build_dir/gallium/auxiliary/vl
362 $cco_slib -o $build_dir/gallium/auxiliary/vl/vl_stubs.o $src_dir/src/gallium/auxiliary/vl/vl_stubs.c \
363 -I$src_dir/src/gallium/auxiliary \
364 -I$src_dir/src/gallium/include \
365 -I$src_dir/src \
366 -I$src_dir/include \
367 \
368 $cco_slib_common_trailer
369
370 #-------------------------------------------------------------------------------
371
372 $ar $build_dir/libgalliumvl.a $build_dir/gallium/auxiliary/vl/vl_stubs.o
373
374 printf "\t<--gallium auxiliary sub-components built\n"
File builders/mesa-gl-1/contrib/gallium_drivers.sh deleted (index 54b8567..0000000)
1 printf "\tbuilding drivers sub-components-->\n"
2 mkdir -p $build_dir/src/gallium/drivers/radeonsi
3
4 export PYTHONPATH=$mako
5 $python3 $src_dir/src/amd/common/gfx10_format_table.py \
6 $src_dir/src/util/format/u_format.csv \
7 $src_dir/src/amd/registers/gfx10-rsrc.json \
8 >$build_dir/src/gallium/drivers/radeonsi/gfx10_format_table.c
9 unset PYTHONPATH
10
11 #-------------------------------------------------------------------------------
12
13 # do remove the radeonsi pipe loader fallback from (amdgpu/drm winsys) to
14 # (radeon/drm winsys)
15 mkdir -p $build_dir/src/gallium/drivers/radeonsi
16 cp -f $src_dir/src/gallium/drivers/radeonsi/si_pipe.c $build_dir/src/gallium/drivers/radeonsi/
17 patch -i $script_dir/si_pipe.c.patch $build_dir/src/gallium/drivers/radeonsi/si_pipe.c
18
19 # uvd block is crap, avoid any non-critical code related to it
20 cp -f $script_dir/si_uvd.c $build_dir/src/gallium/drivers/radeonsi/si_uvd.c
21
22 libradeonsi_files="\
23 $build_dir/src/gallium/drivers/radeonsi/gfx10_format_table.c \
24 $src_dir/src/gallium/drivers/radeonsi/gfx10_query.c \
25 $src_dir/src/gallium/drivers/radeonsi/gfx10_shader_ngg.c \
26 \
27 $src_dir/src/gallium/drivers/radeonsi/cik_sdma.c \
28 $src_dir/src/gallium/drivers/radeonsi/si_blit.c \
29 $src_dir/src/gallium/drivers/radeonsi/si_buffer.c \
30 $src_dir/src/gallium/drivers/radeonsi/si_clear.c \
31 $src_dir/src/gallium/drivers/radeonsi/si_compute.c \
32 $src_dir/src/gallium/drivers/radeonsi/si_compute_blit.c \
33 $src_dir/src/gallium/drivers/radeonsi/si_compute_prim_discard.c \
34 $src_dir/src/gallium/drivers/radeonsi/si_cp_dma.c \
35 $src_dir/src/gallium/drivers/radeonsi/si_cp_reg_shadowing.c \
36 $src_dir/src/gallium/drivers/radeonsi/si_debug.c \
37 $src_dir/src/gallium/drivers/radeonsi/si_descriptors.c \
38 $src_dir/src/gallium/drivers/radeonsi/si_dma_cs.c \
39 $src_dir/src/gallium/drivers/radeonsi/si_fence.c \
40 $src_dir/src/gallium/drivers/radeonsi/si_get.c \
41 $src_dir/src/gallium/drivers/radeonsi/si_gfx_cs.c \
42 $src_dir/src/gallium/drivers/radeonsi/si_gpu_load.c \
43 $src_dir/src/gallium/drivers/radeonsi/si_perfcounter.c \
44 $build_dir/src/gallium/drivers/radeonsi/si_pipe.c \
45 $src_dir/src/gallium/drivers/radeonsi/si_pm4.c \
46 $src_dir/src/gallium/drivers/radeonsi/si_query.c \
47 $src_dir/src/gallium/drivers/radeonsi/si_shader.c \
48 $src_dir/src/gallium/drivers/radeonsi/si_shader_llvm.c \
49 $src_dir/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c \
50 $src_dir/src/gallium/drivers/radeonsi/si_shader_llvm_gs.c \
51 $src_dir/src/gallium/drivers/radeonsi/si_shader_llvm_ps.c \
52 $src_dir/src/gallium/drivers/radeonsi/si_shader_llvm_resources.c \
53 $src_dir/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c \
54 $src_dir/src/gallium/drivers/radeonsi/si_shader_nir.c \
55 $src_dir/src/gallium/drivers/radeonsi/si_shaderlib_tgsi.c \
56 $src_dir/src/gallium/drivers/radeonsi/si_state.c \
57 $src_dir/src/gallium/drivers/radeonsi/si_state_binning.c \
58 $src_dir/src/gallium/drivers/radeonsi/si_state_draw.c \
59 $src_dir/src/gallium/drivers/radeonsi/si_state_msaa.c \
60 $src_dir/src/gallium/drivers/radeonsi/si_state_shaders.c \
61 $src_dir/src/gallium/drivers/radeonsi/si_state_streamout.c \
62 $src_dir/src/gallium/drivers/radeonsi/si_state_viewport.c \
63 $src_dir/src/gallium/drivers/radeonsi/si_test_dma.c \
64 $src_dir/src/gallium/drivers/radeonsi/si_test_dma_perf.c \
65 $src_dir/src/gallium/drivers/radeonsi/si_texture.c \
66 $build_dir/src/gallium/drivers/radeonsi/si_uvd.c \
67 \
68 $src_dir/src/gallium/drivers/radeon/radeon_uvd.c \
69 $src_dir/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c \
70 $src_dir/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c \
71 $src_dir/src/gallium/drivers/radeon/radeon_vcn_enc.c \
72 $src_dir/src/gallium/drivers/radeon/radeon_vcn_dec_jpeg.c \
73 $src_dir/src/gallium/drivers/radeon/radeon_vcn_dec.c \
74 $src_dir/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c \
75 $src_dir/src/gallium/drivers/radeon/radeon_uvd_enc.c \
76 $src_dir/src/gallium/drivers/radeon/radeon_vce_40_2_2.c \
77 $src_dir/src/gallium/drivers/radeon/radeon_vce_50.c \
78 $src_dir/src/gallium/drivers/radeon/radeon_vce_52.c \
79 $src_dir/src/gallium/drivers/radeon/radeon_vce.c \
80 $src_dir/src/gallium/drivers/radeon/radeon_video.c \
81 "
82
83 #-------------------------------------------------------------------------------
84
85 tasks_n=0
86 for f in $libradeonsi_files
87 do
88 libradeonsi_obj_dir=$(dirname $f)
89 libradeonsi_obj_dir=$build_dir/${libradeonsi_obj_dir#*/src/}
90 mkdir -p $libradeonsi_obj_dir
91
92 libradeonsi_obj=$libradeonsi_obj_dir/$(basename $f .c).o
93 libradeonsi_a="$libradeonsi_a $libradeonsi_obj"
94
95 $cco_slib -o $libradeonsi_obj $f \
96 -I$build_dir/src/gallium/drivers/radeonsi \
97 -I$build_dir/src/amd \
98 -I$build_dir/src/compiler/nir \
99 -I$src_dir/src/amd/llvm \
100 -I$src_dir/src/amd/common \
101 -I$src_dir/src/amd \
102 -I$src_dir/src/gallium/drivers/radeonsi \
103 -I$src_dir/src/gallium/drivers \
104 -I$src_dir/src/gallium/auxiliary \
105 -I$src_dir/src/gallium/include \
106 -I$src_dir/src \
107 -I$src_dir/include \
108 $cco_slib_common_trailer &
109
110 tasks_n=$((tasks_n+1))
111 if test $tasks_n -eq $tasks_n_max; then
112 wait
113 tasks_n=0
114 fi
115 done
116
117 wait
118
119 #-------------------------------------------------------------------------------
120
121 $ar $build_dir/libradeonsi.a $libradeonsi_a
122
123 printf "\t<--drivers sub-components built\n"
File builders/mesa-gl-1/contrib/gallium_targets.sh deleted (index d7bfb0b..0000000)
1 printf "\tbuilding targets sub-components-->\n"
2
3 #-------------------------------------------------------------------------------
4
5 mkdir -p $build_dir/gallium/targets/dri
6
7 $cco_slib -o $build_dir/gallium/targets/dri/target.o $src_dir/src/gallium/targets/dri/target.c \
8 -DGALLIUM_RADEONSI \
9 \
10 -I$build_dir/src/gallium/auxiliary \
11 \
12 -I$build_dir/src/util \
13 -I$build_dir/src/gallium/drivers \
14 -I$src_dir/src/gallium/frontends/dri \
15 -I$src_dir/src/gallium/winsys \
16 -I$src_dir/src/gallium/drivers \
17 -I$src_dir/src/gallium/auxiliary \
18 -I$src_dir/src/gallium/include \
19 -I$src_dir/src/mesa/drivers/dri/common \
20 -I$src_dir/src/mesa \
21 -I$src_dir/src \
22 -I$src_dir/include \
23 $cco_slib_common_trailer
24
25 #-------------------------------------------------------------------------------
26
27 # This is the opengl common ("mesa") dri gallium driver
28
29 mkdir -p $build_dir/install_root$dri_driver_search_dir
30
31 if test "${gallium_dri_link_cmd-unset}" = unset ; then
32 gallium_dri_link_cmd="\
33 g++ -o $build_dir/install_root$dri_driver_search_dir/radeonsi_dri.so -Wl,-soname=gallium_dri.so \
34 -shared -static-libgcc -static-libstdc++ \
35 -B/nyan/glibc/current/lib -L/nyan/glibc/current/lib \
36 -Wl,-rpath-link,/nyan/glibc/current/lib \
37 -Wl,--version-script=$src_dir/src/gallium/targets/dri/dri.sym \
38 -Wl,--no-undefined,--gc-sections \
39 $build_dir/gallium/targets/dri/target.o \
40 \
41 -Wl,--start-group \
42 $build_dir/libmesa_gallium.a \
43 $build_dir/libglsl.a \
44 $build_dir/libglcpp.a \
45 $build_dir/libnir.a \
46 $build_dir/libcompiler.a \
47 $build_dir/libmesa_sse41.a \
48 \
49 $build_dir/libdricommon.a \
50 $build_dir/libmegadriver_stub.a \
51 $build_dir/libdri.a \
52 $build_dir/libgallium.a \
53 $build_dir/libgalliumvl.a \
54 \
55 $build_dir/libpipe_loader_static.a \
56 $build_dir/libloader.a \
57 $build_dir/libxmlconfig.a \
58 \
59 $build_dir/libradeonsi.a \
60 $build_dir/libmesa_util.a \
61 $build_dir/libwinsys_amdgpu_drm.a \
62 $build_dir/libaddrlib.a \
63 $build_dir/libamd_llvm.a \
64 $build_dir/libamd_common.a \
65 -Wl,--end-group \
66 \
67 $external_deps_static_ldflags \
68 -Wl,--exclude-libs,$external_deps_archives:$llvm_archives:libstdc++.a \
69 \
70 -Wl,--as-needed \
71 $build_dir/install_root$libdir/libglapi.so.0.0.0 \
72 $external_deps_ldflags \
73 $glibc_ldflags \
74 -Wl,--no-as-needed"
75 fi
76 eval $gallium_dri_link_cmd
77
78 printf "\t<--targets sub-components built\n"
File builders/mesa-gl-1/contrib/gcc_binutils.sh deleted (index 4533dfa..0000000)
1 # toolchain configuration, here gcc
2 # slib = Shared LIBrary
3 if test "${cco_slib-unset}" = unset; then
4 cco_slib='gcc -fvisibility=hidden -static-libgcc -pipe -fPIC -std=c99 -c'
5 fi
6
7 # llvm is now c++ crap from 2014
8 if test "${cxxo_slib-unset}" = unset; then
9 cxxo_slib='g++ -fvisibility=hidden -static-libgcc -static-libstdc++ -std=c++14 -fno-rtti -pipe -fPIC -c'
10 fi
11
12 if test "${cflags_opt-unset}" = unset; then
13 cflags_opt='-O2 -Wno-stringop-overflow'
14 fi
15
16 if test "${cxxflags_opt-unset}" = unset; then
17 cxxflags_opt='-O2 -Wno-stringop-overflow'
18 fi
19
20 if test "${ar_rcs-unset}" = unset; then
21 ar='ar rcs'
22 fi
23
24 # gcc built-in
25 gcc_builtins_cppflags="\
26 -DHAVE___BUILTIN_BSWAP32=1 \
27 -DHAVE___BUILTIN_BSWAP64=1 \
28 -DHAVE___BUILTIN_CLZ=1 \
29 -DHAVE___BUILTIN_CLZLL=1 \
30 -DHAVE___BUILTIN_CTZ=1 \
31 -DHAVE___BUILTIN_EXPECT=1 \
32 -DHAVE___BUILTIN_FFS=1 \
33 -DHAVE___BUILTIN_FFSLL=1 \
34 -DHAVE___BUILTIN_POPCOUNT=1 \
35 -DHAVE___BUILTIN_POPCOUNTLL=1 \
36 -DHAVE___BUILTIN_UNREACHABLE=1 \
37 "
38
39 # gcc attributes
40 gcc_attributes_cppflags="\
41 -DHAVE_FUNC_ATTRIBUTE_CONST=1 \
42 -DHAVE_FUNC_ATTRIBUTE_FLATTEN=1 \
43 -DHAVE_FUNC_ATTRIBUTE_MALLOC=1 \
44 -DHAVE_FUNC_ATTRIBUTE_PURE=1 \
45 -DHAVE_FUNC_ATTRIBUTE_UNUSED=1 \
46 -DHAVE_FUNC_ATTRIBUTE_WARN_UNUSED_RESULT=1 \
47 -DHAVE_FUNC_ATTRIBUTE_WEAK=1 \
48 \
49 -DHAVE_FUNC_ATTRIBUTE_FORMAT=1 \
50 -DHAVE_FUNC_ATTRIBUTE_PACKED=1 \
51 -DHAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL=1 \
52 -DHAVE_FUNC_ATTRIBUTE_VISIBILITY=1 \
53 -DHAVE_FUNC_ATTRIBUTE_ALIAS=1 \
54 -DHAVE_FUNC_ATTRIBUTE_NORETURN=1 \
55 "
56
57 # gcc misc
58 # asm for x86 is -DUSE_X86_ASM -DUSE_MMX_ASM -DUSE_3DNOW_ASM -DUSE_SSE_ASM
59 # asm for x86-64 is only USE_X86_64_ASM
60 # must manually defines asm ABI struct size for cross-compiling
61 gcc_misc_cppflags="\
62 -DUSE_SSE41=1 \
63 -DUSE_GCC_ATOMIC_BUILTINS=1 \
64 -DUSE_X86_64_ASM=1 \
65 "
66
67 gcc_cppflags="\
68 $gcc_builtins_cppflags \
69 $gcc_attributes_cppflags \
70 $gcc_misc_cppflags \
71 "
File builders/mesa-gl-1/contrib/glx.sh deleted (index 97acd85..0000000)
1 # client glx, direct rendering mode, aka dri level 1, 2 and 3
2 echo "building glx dispatcher components-->"
3
4 #===============================================================================
5
6 libglx_files="\
7 $build_dir/src/mapi/glapi/indirect.c \
8 $build_dir/src/mapi/glapi/indirect_init.c \
9 $build_dir/src/mapi/glapi/indirect_size.c \
10 $src_dir/src/glx/clientattrib.c \
11 $src_dir/src/glx/clientinfo.c \
12 $src_dir/src/glx/compsize.c \
13 $src_dir/src/glx/create_context.c \
14 $src_dir/src/glx/eval.c \
15 $src_dir/src/glx/glxcmds.c \
16 $src_dir/src/glx/glxconfig.c \
17 $src_dir/src/glx/glxcurrent.c \
18 $src_dir/src/glx/glx_error.c \
19 $src_dir/src/glx/glxext.c \
20 $src_dir/src/glx/glxextensions.c \
21 $src_dir/src/glx/glxhash.c \
22 $src_dir/src/glx/glx_pbuffer.c \
23 $src_dir/src/glx/glx_query.c \
24 $src_dir/src/glx/indirect_glx.c \
25 $src_dir/src/glx/indirect_texture_compression.c \
26 $src_dir/src/glx/indirect_transpose_matrix.c \
27 $src_dir/src/glx/indirect_vertex_array.c \
28 $src_dir/src/glx/indirect_vertex_program.c \
29 $src_dir/src/glx/indirect_window_pos.c \
30 $src_dir/src/glx/pixel.c \
31 $src_dir/src/glx/pixelstore.c \
32 $src_dir/src/glx/query_renderer.c \
33 $src_dir/src/glx/render2.c \
34 $src_dir/src/glx/renderpix.c \
35 $src_dir/src/glx/single2.c \
36 $src_dir/src/glx/singlepix.c \
37 $src_dir/src/glx/vertarr.c \
38 $src_dir/src/glx/dri_common.c \
39 $src_dir/src/glx/dri_common_query_renderer.c \
40 $src_dir/src/glx/dri_common_interop.c \
41 $src_dir/src/glx/xfont.c \
42 $src_dir/src/glx/drisw_glx.c \
43 $src_dir/src/glx/dri2.c \
44 $src_dir/src/glx/dri2_glx.c \
45 $src_dir/src/glx/dri_glx.c \
46 $src_dir/src/glx/XF86dri.c \
47 $src_dir/src/glx/dri3_glx.c \
48 "
49
50 #===============================================================================
51
52 tasks_n=0
53 for f in $libglx_files
54 do
55 libglx_obj_dir=$(dirname $f)
56 libglx_obj_dir=$build_dir/${libglx_obj_dir#*/src/}
57 mkdir -p $libglx_obj_dir
58
59 libglx_obj=$libglx_obj_dir/$(basename $f .c).o
60 libglx_a="$libglx_a $libglx_obj"
61
62 $cco_slib -o $libglx_obj $f \
63 -D_REENTRANT=1 \
64 -DGL_LIB_NAME=\"libGL.so.1.2.0\" \
65 \
66 -I$build_dir/src/mapi/glapi \
67 -I$src_dir/src/mapi/glapi \
68 -I$src_dir/src/glx \
69 -I$src_dir/src/loader \
70 -I$src_dir/src \
71 -I$src_dir/include/GL/internal \
72 -I$src_dir/include \
73 \
74 $cco_slib_common_trailer &
75
76 tasks_n=$((tasks_n+1))
77 if test $tasks_n -eq $tasks_n_max; then
78 wait
79 tasks_n=0
80 fi
81 done
82
83 wait
84
85 $ar $build_dir/libglx.a $libglx_a
86
87 #===============================================================================
88
89 # This is the client shared lib, which does routing among the enabled GL
90 # related APIs and hardware drivers (in our case, hardware supported by
91 # gallium drivers). For the glx API, it deals with indirect/direct rendering
92 # too.
93
94 mkdir -p $build_dir/install_root$libdir
95
96 if test "${libgl_link_cmd-unset}" = unset ; then
97 libgl_link_cmd="\
98 g++ -o $build_dir/install_root$libdir/libGL.so.1.2.0 -Wl,-soname=libGL.so.1 \
99 -shared -static-libgcc -static-libstdc++ \
100 -B/nyan/glibc/current/lib -L/nyan/glibc/current/lib \
101 -Wl,-rpath-link,/nyan/glibc/current/lib \
102 -Wl,--no-undefined,--gc-sections,-Bsymbolic \
103 -Wl,--whole-archive \
104 $build_dir/libglx.a \
105 -Wl,--no-whole-archive \
106 $build_dir/libglapi_static.a \
107 $build_dir/libloader.a \
108 $build_dir/libloader_dri3_helper.a \
109 \
110 $build_dir/libxmlconfig.a \
111 $build_dir/libmesa_util.a \
112 \
113 $external_deps_static_ldflags \
114 -Wl,--exclude-libs,$external_deps_archives:libstdc++.a \
115 \
116 -Wl,--as-needed \
117 $build_dir/install_root$libdir/libglapi.so.0.0.0 \
118 $external_deps_ldflags \
119 $glibc_ldflags \
120 -Wl,--no-as-needed \
121 "
122 fi
123 eval $libgl_link_cmd
124
125 ln -sf libGL.so.1.2.0 $build_dir/install_root$libdir/libGL.so.1
126 ln -sf libGL.so.1 $build_dir/install_root$libdir/libGL.so
127
128 #===============================================================================
129
130 mkdir -p $build_dir/install_root$incdir/GL/internal
131 mkdir -p $build_dir/install_root$incdir/KHR
132
133 cp -f $src_dir/include/KHR/khrplatform.h $build_dir/install_root$incdir/KHR
134 cp -f $src_dir/include/GL/internal/dri_interface.h $build_dir/install_root$incdir/GL/internal
135
136 cp -f \
137 $src_dir/include/GL/glcorearb.h \
138 $src_dir/include/GL/gl.h \
139 $src_dir/include/GL/glext.h \
140 $src_dir/include/GL/glx.h \
141 $src_dir/include/GL/glxext.h \
142 $build_dir/install_root$incdir/GL
143
144 echo "<--glx dispatcher components built"
File builders/mesa-gl-1/contrib/mesa.sh deleted (index 3bd1c43..0000000)
1 echo "building opengl related common components-->"
2 # opengl common part
3
4 #===============================================================================
5 # mesa/program
6
7 mkdir -p $build_dir/src/mesa/program
8
9 $flex \
10 -o $build_dir/src/mesa/program/lex.yy.c \
11 $src_dir/src/mesa/program/program_lexer.l &
12 #-------------------------------------------------------------------------------
13 $bison \
14 -o $build_dir/src/mesa/program/program_parse.tab.c \
15 --defines=$build_dir/src/mesa/program/program_parse.tab.h \
16 $src_dir/src/mesa/program/program_parse.y &
17
18 #===============================================================================
19 # mesa/main
20
21 mkdir -p $build_dir/src/mesa/main
22
23 $python3 $src_dir/src/mapi/glapi/gen/gl_table.py \
24 -f $src_dir/src/mapi/glapi/gen/gl_and_es_API.xml \
25 -m remap_table \
26 >$build_dir/src/mesa/main/dispatch.h &
27 #-------------------------------------------------------------------------------
28 $python3 $src_dir/src/mapi/glapi/gen/gl_marshal_h.py \
29 -f $src_dir/src/mapi/glapi/gen/gl_and_es_API.xml \
30 >$build_dir/src/mesa/main/marshal_generated.h &
31 #-------------------------------------------------------------------------------
32 $python3 $src_dir/src/mapi/glapi/gen/remap_helper.py \
33 -f $src_dir/src/mapi/glapi/gen/gl_and_es_API.xml \
34 >$build_dir/src/mesa/main/remap_helper.h &
35
36 #===============================================================================
37 # mesa
38
39 $python3 $src_dir/src/mesa/main/get_hash_generator.py \
40 -f $src_dir/src/mapi/glapi/gen/gl_and_es_API.xml \
41 >$build_dir/src/mesa/get_hash.h &
42 #-------------------------------------------------------------------------------
43 export PYTHONPATH="$mako"
44 $python3 $src_dir/src/mesa/main/format_fallback.py \
45 $src_dir/src/mesa/main/formats.csv \
46 $build_dir/src/mesa/format_fallback.c &
47 #-------------------------------------------------------------------------------
48 $python3 $src_dir/src/mesa/main/format_info.py \
49 $src_dir/src/mesa/main/formats.csv \
50 >$build_dir/src/mesa/format_info.h &
51 #-------------------------------------------------------------------------------
52 $python3 $src_dir/src/mesa/main/format_pack.py \
53 $src_dir/src/mesa/main/formats.csv \
54 >$build_dir/src/mesa/format_pack.c &
55 #-------------------------------------------------------------------------------
56 $python3 $src_dir/src/mesa/main/format_unpack.py \
57 $src_dir/src/mesa/main/formats.csv \
58 >$build_dir/src/mesa/format_unpack.c &
59 unset PYTHONPATH
60
61 wait
62
63 #-------------------------------------------------------------------------------
64
65 libmesa_common_c_files="\
66 $build_dir/src/mesa/format_pack.c \
67 $build_dir/src/mesa/format_unpack.c \
68 $build_dir/src/mesa/format_fallback.c \
69 $build_dir/src/mesa/program/lex.yy.c \
70 $build_dir/src/mesa/program/program_parse.tab.c \
71 $build_dir/src/mapi/glapi/api_exec.c \
72 $build_dir/src/mapi/glapi/enums.c \
73 $build_dir/src/mapi/glapi/marshal_generated0.c \
74 $build_dir/src/mapi/glapi/marshal_generated1.c \
75 $build_dir/src/mapi/glapi/marshal_generated2.c \
76 $build_dir/src/mapi/glapi/marshal_generated3.c \
77 $build_dir/src/mapi/glapi/marshal_generated4.c \
78 $build_dir/src/mapi/glapi/marshal_generated5.c \
79 $build_dir/src/mapi/glapi/marshal_generated6.c \
80 $build_dir/src/mapi/glapi/marshal_generated7.c \
81 $src_dir/src/mesa/program/arbprogparse.c \
82 $src_dir/src/mesa/program/prog_cache.c \
83 $src_dir/src/mesa/program/prog_execute.c \
84 $src_dir/src/mesa/program/prog_instruction.c \
85 $src_dir/src/mesa/program/prog_noise.c \
86 $src_dir/src/mesa/program/prog_opt_constant_fold.c \
87 $src_dir/src/mesa/program/prog_optimize.c \
88 $src_dir/src/mesa/program/prog_parameter.c \
89 $src_dir/src/mesa/program/prog_parameter_layout.c \
90 $src_dir/src/mesa/program/prog_print.c \
91 $src_dir/src/mesa/program/program.c \
92 $src_dir/src/mesa/program/programopt.c \
93 $src_dir/src/mesa/program/program_parse_extra.c \
94 $src_dir/src/mesa/program/prog_statevars.c \
95 $src_dir/src/mesa/program/symbol_table.c \
96 $src_dir/src/mesa/program/prog_to_nir.c \
97 $src_dir/src/mesa/main/accum.c \
98 $src_dir/src/mesa/main/api_arrayelt.c \
99 $src_dir/src/mesa/main/arbprogram.c \
100 $src_dir/src/mesa/main/arrayobj.c \
101 $src_dir/src/mesa/main/atifragshader.c \
102 $src_dir/src/mesa/main/attrib.c \
103 $src_dir/src/mesa/main/barrier.c \
104 $src_dir/src/mesa/main/bbox.c \
105 $src_dir/src/mesa/main/blend.c \
106 $src_dir/src/mesa/main/blit.c \
107 $src_dir/src/mesa/main/bufferobj.c \
108 $src_dir/src/mesa/main/buffers.c \
109 $src_dir/src/mesa/main/clear.c \
110 $src_dir/src/mesa/main/clip.c \
111 $src_dir/src/mesa/main/colortab.c \
112 $src_dir/src/mesa/main/compute.c \
113 $src_dir/src/mesa/main/condrender.c \
114 $src_dir/src/mesa/main/conservativeraster.c \
115 $src_dir/src/mesa/main/context.c \
116 $src_dir/src/mesa/main/convolve.c \
117 $src_dir/src/mesa/main/copyimage.c \
118 $src_dir/src/mesa/main/cpuinfo.c \
119 $src_dir/src/mesa/main/debug.c \
120 $src_dir/src/mesa/main/debug_output.c \
121 $src_dir/src/mesa/main/depth.c \
122 $src_dir/src/mesa/main/dlist.c \
123 $src_dir/src/mesa/main/draw.c \
124 $src_dir/src/mesa/main/drawpix.c \
125 $src_dir/src/mesa/main/drawtex.c \
126 $src_dir/src/mesa/main/draw_validate.c \
127 $src_dir/src/mesa/main/enable.c \
128 $src_dir/src/mesa/main/errors.c \
129 $src_dir/src/mesa/main/eval.c \
130 $src_dir/src/mesa/main/execmem.c \
131 $src_dir/src/mesa/main/extensions.c \
132 $src_dir/src/mesa/main/extensions_table.c \
133 $src_dir/src/mesa/main/externalobjects.c \
134 $src_dir/src/mesa/main/fbobject.c \
135 $src_dir/src/mesa/main/feedback.c \
136 $src_dir/src/mesa/main/ffvertex_prog.c \
137 $src_dir/src/mesa/main/fog.c \
138 $src_dir/src/mesa/main/formatquery.c \
139 $src_dir/src/mesa/main/formats.c \
140 $src_dir/src/mesa/main/format_utils.c \
141 $src_dir/src/mesa/main/framebuffer.c \
142 $src_dir/src/mesa/main/get.c \
143 $src_dir/src/mesa/main/genmipmap.c \
144 $src_dir/src/mesa/main/getstring.c \
145 $src_dir/src/mesa/main/glformats.c \
146 $src_dir/src/mesa/main/glspirv.c \
147 $src_dir/src/mesa/main/glthread.c \
148 $src_dir/src/mesa/main/glthread_bufferobj.c \
149 $src_dir/src/mesa/main/glthread_draw.c \
150 $src_dir/src/mesa/main/glthread_shaderobj.c \
151 $src_dir/src/mesa/main/glthread_varray.c \
152 $src_dir/src/mesa/main/hash.c \
153 $src_dir/src/mesa/main/hint.c \
154 $src_dir/src/mesa/main/histogram.c \
155 $src_dir/src/mesa/main/image.c \
156 $src_dir/src/mesa/main/light.c \
157 $src_dir/src/mesa/main/lines.c \
158 $src_dir/src/mesa/main/matrix.c \
159 $src_dir/src/mesa/main/mipmap.c \
160 $src_dir/src/mesa/main/multisample.c \
161 $src_dir/src/mesa/main/objectlabel.c \
162 $src_dir/src/mesa/main/objectpurge.c \
163 $src_dir/src/mesa/main/pack.c \
164 $src_dir/src/mesa/main/pbo.c \
165 $src_dir/src/mesa/main/performance_monitor.c \
166 $src_dir/src/mesa/main/performance_query.c \
167 $src_dir/src/mesa/main/pipelineobj.c \
168 $src_dir/src/mesa/main/pixel.c \
169 $src_dir/src/mesa/main/pixelstore.c \
170 $src_dir/src/mesa/main/pixeltransfer.c \
171 $src_dir/src/mesa/main/points.c \
172 $src_dir/src/mesa/main/polygon.c \
173 $src_dir/src/mesa/main/program_binary.c \
174 $src_dir/src/mesa/main/program_resource.c \
175 $src_dir/src/mesa/main/querymatrix.c \
176 $src_dir/src/mesa/main/queryobj.c \
177 $src_dir/src/mesa/main/rastpos.c \
178 $src_dir/src/mesa/main/readpix.c \
179 $src_dir/src/mesa/main/remap.c \
180 $src_dir/src/mesa/main/renderbuffer.c \
181 $src_dir/src/mesa/main/robustness.c \
182 $src_dir/src/mesa/main/samplerobj.c \
183 $src_dir/src/mesa/main/scissor.c \
184 $src_dir/src/mesa/main/shaderapi.c \
185 $src_dir/src/mesa/main/shaderimage.c \
186 $src_dir/src/mesa/main/shaderobj.c \
187 $src_dir/src/mesa/main/shared.c \
188 $src_dir/src/mesa/main/spirv_extensions.c \
189 $src_dir/src/mesa/main/state.c \
190 $src_dir/src/mesa/main/stencil.c \
191 $src_dir/src/mesa/main/syncobj.c \
192 $src_dir/src/mesa/main/texcompress.c \
193 $src_dir/src/mesa/main/texcompress_bptc.c \
194 $src_dir/src/mesa/main/texcompress_cpal.c \
195 $src_dir/src/mesa/main/texcompress_etc.c \
196 $src_dir/src/mesa/main/texcompress_fxt1.c \
197 $src_dir/src/mesa/main/texcompress_rgtc.c \
198 $src_dir/src/mesa/main/texcompress_s3tc.c \
199 $src_dir/src/mesa/main/texenv.c \
200 $src_dir/src/mesa/main/texenvprogram.h \
201 $src_dir/src/mesa/main/texformat.c \
202 $src_dir/src/mesa/main/texgen.c \
203 $src_dir/src/mesa/main/texgetimage.c \
204 $src_dir/src/mesa/main/teximage.c \
205 $src_dir/src/mesa/main/texobj.c \
206 $src_dir/src/mesa/main/texparam.c \
207 $src_dir/src/mesa/main/texstate.c \
208 $src_dir/src/mesa/main/texstorage.c \
209 $src_dir/src/mesa/main/texstore.c \
210 $src_dir/src/mesa/main/texturebindless.c \
211 $src_dir/src/mesa/main/textureview.c \
212 $src_dir/src/mesa/main/transformfeedback.c \
213 $src_dir/src/mesa/main/uniforms.c \
214 $src_dir/src/mesa/main/varray.c \
215 $src_dir/src/mesa/main/vdpau.c \
216 $src_dir/src/mesa/main/version.c \
217 $src_dir/src/mesa/main/viewport.c \
218 $src_dir/src/mesa/main/vtxfmt.c \
219 $src_dir/src/mesa/main/es1_conversion.c \
220 $src_dir/src/mesa/math/m_debug_clip.c \
221 $src_dir/src/mesa/math/m_debug_norm.c \
222 $src_dir/src/mesa/math/m_debug_xform.c \
223 $src_dir/src/mesa/math/m_eval.c \
224 $src_dir/src/mesa/math/m_matrix.c \
225 $src_dir/src/mesa/math/m_translate.c \
226 $src_dir/src/mesa/math/m_vector.c \
227 $src_dir/src/mesa/vbo/vbo_context.c \
228 $src_dir/src/mesa/vbo/vbo_exec_api.c \
229 $src_dir/src/mesa/vbo/vbo_exec.c \
230 $src_dir/src/mesa/vbo/vbo_exec_draw.c \
231 $src_dir/src/mesa/vbo/vbo_exec_eval.c \
232 $src_dir/src/mesa/vbo/vbo_minmax_index.c \
233 $src_dir/src/mesa/vbo/vbo_noop.c \
234 $src_dir/src/mesa/vbo/vbo_primitive_restart.c \
235 $src_dir/src/mesa/vbo/vbo_save_api.c \
236 $src_dir/src/mesa/vbo/vbo_save.c \
237 $src_dir/src/mesa/vbo/vbo_save_draw.c \
238 $src_dir/src/mesa/vbo/vbo_save_loopback.c \
239 $src_dir/src/mesa/x86/common_x86.c \
240 "
241
242 libmesa_common_cxx_files="\
243 $src_dir/src/mesa/program/ir_to_mesa.cpp \
244 $src_dir/src/mesa/main/ff_fragment_shader.cpp \
245 $src_dir/src/mesa/main/shader_query.cpp \
246 $src_dir/src/mesa/main/texcompress_astc.cpp \
247 $src_dir/src/mesa/main/uniform_query.cpp \
248 "
249
250 libmesa_common_asm_files="\
251 $src_dir/src/mesa/x86-64/xfrom4.S \
252 "
253
254 libmesa_gallium_c_files="\
255 $src_dir/src/mesa/state_tracker/st_atifs_to_tgsi.c \
256 $src_dir/src/mesa/state_tracker/st_atom_array.c \
257 $src_dir/src/mesa/state_tracker/st_atom_atomicbuf.c \
258 $src_dir/src/mesa/state_tracker/st_atom_blend.c \
259 $src_dir/src/mesa/state_tracker/st_atom.c \
260 $src_dir/src/mesa/state_tracker/st_atom_clip.c \
261 $src_dir/src/mesa/state_tracker/st_atom_constbuf.c \
262 $src_dir/src/mesa/state_tracker/st_atom_depth.c \
263 $src_dir/src/mesa/state_tracker/st_atom_framebuffer.c \
264 $src_dir/src/mesa/state_tracker/st_atom_image.c \
265 $src_dir/src/mesa/state_tracker/st_atom_msaa.c \
266 $src_dir/src/mesa/state_tracker/st_atom_pixeltransfer.c \
267 $src_dir/src/mesa/state_tracker/st_atom_rasterizer.c \
268 $src_dir/src/mesa/state_tracker/st_atom_sampler.c \
269 $src_dir/src/mesa/state_tracker/st_atom_scissor.c \
270 $src_dir/src/mesa/state_tracker/st_atom_shader.c \
271 $src_dir/src/mesa/state_tracker/st_atom_stipple.c \
272 $src_dir/src/mesa/state_tracker/st_atom_storagebuf.c \
273 $src_dir/src/mesa/state_tracker/st_atom_tess.c \
274 $src_dir/src/mesa/state_tracker/st_atom_texture.c \
275 $src_dir/src/mesa/state_tracker/st_atom_viewport.c \
276 $src_dir/src/mesa/state_tracker/st_cb_bitmap.c \
277 $src_dir/src/mesa/state_tracker/st_cb_bitmap_shader.c \
278 $src_dir/src/mesa/state_tracker/st_cb_blit.c \
279 $src_dir/src/mesa/state_tracker/st_cb_bufferobjects.c \
280 $src_dir/src/mesa/state_tracker/st_cb_clear.c \
281 $src_dir/src/mesa/state_tracker/st_cb_compute.c \
282 $src_dir/src/mesa/state_tracker/st_cb_condrender.c \
283 $src_dir/src/mesa/state_tracker/st_cb_copyimage.c \
284 $src_dir/src/mesa/state_tracker/st_cb_drawpixels.c \
285 $src_dir/src/mesa/state_tracker/st_cb_drawpixels_shader.c \
286 $src_dir/src/mesa/state_tracker/st_cb_drawtex.c \
287 $src_dir/src/mesa/state_tracker/st_cb_eglimage.c \
288 $src_dir/src/mesa/state_tracker/st_cb_fbo.c \
289 $src_dir/src/mesa/state_tracker/st_cb_feedback.c \
290 $src_dir/src/mesa/state_tracker/st_cb_flush.c \
291 $src_dir/src/mesa/state_tracker/st_cb_memoryobjects.c \
292 $src_dir/src/mesa/state_tracker/st_cb_msaa.c \
293 $src_dir/src/mesa/state_tracker/st_cb_perfmon.c \
294 $src_dir/src/mesa/state_tracker/st_cb_perfquery.c \
295 $src_dir/src/mesa/state_tracker/st_cb_program.c \
296 $src_dir/src/mesa/state_tracker/st_cb_queryobj.c \
297 $src_dir/src/mesa/state_tracker/st_cb_rasterpos.c \
298 $src_dir/src/mesa/state_tracker/st_cb_readpixels.c \
299 $src_dir/src/mesa/state_tracker/st_cb_strings.c \
300 $src_dir/src/mesa/state_tracker/st_cb_semaphoreobjects.c \
301 $src_dir/src/mesa/state_tracker/st_cb_syncobj.c \
302 $src_dir/src/mesa/state_tracker/st_cb_texturebarrier.c \
303 $src_dir/src/mesa/state_tracker/st_cb_texture.c \
304 $src_dir/src/mesa/state_tracker/st_cb_viewport.c \
305 $src_dir/src/mesa/state_tracker/st_cb_xformfb.c \
306 $src_dir/src/mesa/state_tracker/st_context.c \
307 $src_dir/src/mesa/state_tracker/st_copytex.c \
308 $src_dir/src/mesa/state_tracker/st_debug.c \
309 $src_dir/src/mesa/state_tracker/st_draw.c \
310 $src_dir/src/mesa/state_tracker/st_draw_feedback.c \
311 $src_dir/src/mesa/state_tracker/st_extensions.c \
312 $src_dir/src/mesa/state_tracker/st_format.c \
313 $src_dir/src/mesa/state_tracker/st_gen_mipmap.c \
314 $src_dir/src/mesa/state_tracker/st_manager.c \
315 $src_dir/src/mesa/state_tracker/st_mesa_to_tgsi.c \
316 $src_dir/src/mesa/state_tracker/st_nir_builtins.c \
317 $src_dir/src/mesa/state_tracker/st_nir_lower_builtin.c \
318 $src_dir/src/mesa/state_tracker/st_nir_lower_tex_src_plane.c \
319 $src_dir/src/mesa/state_tracker/st_pbo.c \
320 $src_dir/src/mesa/state_tracker/st_program.c \
321 $src_dir/src/mesa/state_tracker/st_sampler_view.c \
322 $src_dir/src/mesa/state_tracker/st_scissor.c \
323 $src_dir/src/mesa/state_tracker/st_shader_cache.c \
324 $src_dir/src/mesa/state_tracker/st_texture.c \
325 $src_dir/src/mesa/state_tracker/st_tgsi_lower_yuv.c \
326 $src_dir/src/mesa/state_tracker/st_tgsi_lower_depth_clamp.c \
327 $src_dir/src/mesa/state_tracker/st_vdpau.c \
328 "
329
330 libmesa_gallium_cxx_files="\
331 $src_dir/src/mesa/state_tracker/st_glsl_to_ir.cpp \
332 $src_dir/src/mesa/state_tracker/st_glsl_to_nir.cpp \
333 $src_dir/src/mesa/state_tracker/st_glsl_to_tgsi.cpp \
334 $src_dir/src/mesa/state_tracker/st_glsl_to_tgsi_array_merge.cpp \
335 $src_dir/src/mesa/state_tracker/st_glsl_to_tgsi_private.cpp \
336 $src_dir/src/mesa/state_tracker/st_glsl_to_tgsi_temprename.cpp \
337 "
338
339 libmesa_sse41_c_files="\
340 $src_dir/src/mesa/main/streaming-load-memcpy.c \
341 $src_dir/src/mesa/main/sse_minmax.c \
342 "
343
344 #------------------------------------------------------------------------------
345
346 #*******************************************************************************
347 # this is the header for asm code with depend on the host architecture
348 # we use a pre-generated one for gcc and x86_64
349 mkdir -p $build_dir/src/mesa/x86
350 cp -f $script_dir/matypes.h.x86_64 $build_dir/src/mesa/x86/matypes.h
351 #*******************************************************************************
352
353 #------------------------------------------------------------------------------
354
355 tasks_n=0
356 for f in $libmesa_common_c_files $libmesa_gallium_c_files
357 do
358 libmesa_x_c_obj_dir=$(dirname $f)
359 libmesa_x_c_obj_dir=$build_dir/${libmesa_x_c_obj_dir#*/src/}
360 mkdir -p $libmesa_x_c_obj_dir
361
362 libmesa_gallium_c_obj=$libmesa_x_c_obj_dir/$(basename $f .c).o
363 libmesa_gallium_a="$libmesa_gallium_a $libmesa_gallium_c_obj"
364
365 $cco_slib -o $libmesa_gallium_c_obj $f \
366 -I$build_dir/src/compiler/nir \
367 -I$build_dir/src/mesa/main \
368 -I$build_dir/src/mesa \
369 -I$build_dir/src \
370 -I$src_dir/src/gallium/auxiliary \
371 -I$src_dir/src/gallium/include \
372 -I$src_dir/src/mesa/main \
373 -I$src_dir/src/mesa \
374 -I$src_dir/src/mapi \
375 -I$src_dir/src/ \
376 -I$src_dir/include \
377 \
378 $cco_slib_common_trailer &
379
380 tasks_n=$((tasks_n+1))
381 if test $tasks_n -eq $tasks_n_max; then
382 wait
383 tasks_n=0
384 fi
385 done
386
387 wait
388
389 #------------------------------------------------------------------------------
390
391 for f in $libmesa_common_cxx_files $libmesa_gallium_cxx_files
392 do
393 libmesa_x_cxx_obj_dir=$(dirname $f)
394 libmesa_x_cxx_obj_dir=$build_dir/${libmesa_x_cxx_obj_dir#*/src/}
395 mkdir -p $libmesa_x_cxx_obj_dir
396
397 libmesa_gallium_cxx_obj=$libmesa_x_cxx_obj_dir/$(basename $f .cpp).o
398 libmesa_gallium_a="$libmesa_gallium_a $libmesa_gallium_cxx_obj"
399
400 $cxxo_slib -o $libmesa_gallium_cxx_obj $f \
401 -I$build_dir/src/compiler/nir \
402 -I$build_dir/src/compiler/glsl \
403 -I$build_dir/src/compiler \
404 -I$build_dir/src \
405 -I$src_dir/src/gallium/auxiliary \
406 -I$src_dir/src/gallium/include \
407 -I$src_dir/src/mapi \
408 -I$src_dir/src/mesa \
409 -I$src_dir/src \
410 -I$src_dir/include \
411 \
412 $cxxo_slib_common_trailer &
413 done
414
415 #------------------------------------------------------------------------------
416
417 $cco_slib -o $build_dir/mesa/xform4.o $src_dir/src/mesa/x86-64/xform4.S \
418 -I$build_dir/src/mesa/x86 \
419 -I$src_dir/src/mesa \
420 \
421 $cco_slib_common_trailer
422
423 libmesa_common_a="$libmesa_common_a $build_dir/mesa/xform4.o"
424
425 wait
426
427 $ar $build_dir/libmesa_gallium.a $libmesa_common_a $libmesa_gallium_a
428
429 #------------------------------------------------------------------------------
430
431 for f in $libmesa_sse41_c_files
432 do
433 libmesa_sse41_c_obj_dir=$(dirname $f)
434 libmesa_sse41_c_obj_dir=$build_dir/${libmesa_sse41_c_obj_dir#*/src/}
435 mkdir -p $libmesa_sse41_c_obj_dir
436
437 libmesa_sse41_c_obj=$libmesa_sse41_c_obj_dir/$(basename $f .c).o
438 libmesa_sse41_a="$libmesa_sse41_a $libmesa_sse41_c_obj"
439
440 $cco_slib -o $libmesa_sse41_c_obj $f \
441 -msse4.1 \
442 \
443 -I$src_dir/src/gallium/include \
444 -I$src_dir/src/mesa \
445 -I$src_dir/src \
446 -I$src_dir/include \
447 \
448 $cco_slib_common_trailer &
449 done
450
451 wait
452
453 $ar $build_dir/libmesa_sse41.a $libmesa_sse41_a
454
455 #===============================================================================
456
457 # drivers/dri/common
458 # non-gallium dri drivers are actually here. Since we use only gallium dri
459 # drivers which are built elsewhere, only the generic dri support with
460 # the driver "loader" (megadriver_stub) is built.
461
462 libdricommon_files="\
463 $src_dir/src/mesa/drivers/dri/common/utils.c \
464 $src_dir/src/mesa/drivers/dri/common/dri_util.c \
465 "
466
467 for f in $libdricommon_files
468 do
469 libdricommon_obj_dir=$(dirname $f)
470 libdricommon_obj_dir=$build_dir/${libdricommon_obj_dir#*/src/}
471 mkdir -p $libdricommon_obj_dir
472
473 libdricommon_obj=$libdricommon_obj_dir/$(basename $f .c).o
474 libdricommon_a="$libdricommon_a $libdricommon_obj"
475
476 $cco_slib -o $libdricommon_obj $f \
477 -I$build_dir/src/util \
478 -I$src_dir/src/gallium/include \
479 -I$src_dir/src/mapi \
480 -I$src_dir/src/mesa \
481 -I$src_dir/src/ \
482 -I$src_dir/include \
483 \
484 $cco_slib_common_trailer &
485 done
486
487 $cco_slib -o $build_dir/mesa/drivers/dri/common/megadriver_stub.o $src_dir/src/mesa/drivers/dri/common/megadriver_stub.c\
488 -I$src_dir/src/gallium/include \
489 -I$src_dir/src/mesa \
490 -I$src_dir/src \
491 -I$src_dir/include \
492 $cco_slib_common_trailer &
493
494 wait
495
496 $ar $build_dir/libdricommon.a $libdricommon_a
497 $ar $build_dir/libmegadriver_stub.a $build_dir/mesa/drivers/dri/common/megadriver_stub.o
498
499 #-------------------------------------------------------------------------------
500
501 mkdir -p $build_dir/install_root$libdir/pkgconfig
502
503 cp -f $src_dir/contrib/pkgconfig/dri.pc.in $build_dir/install_root$libdir/pkgconfig/dri.pc
504 sed -i "\
505 s:@prefix@:$prefix:;\
506 s:@exec_prefix@:$prefix:;\
507 s:@libdir@:$libdir:;\
508 s:@includedir@:$incdir:;\
509 s:@DRI_DRIVER_INSTALL_DIR@:$dri_driver_search_dir:;\
510 s:@DRI_PC_REQ_PRIV@::;\
511 s:@VERSION@:$version:;\
512 s:@GBM_PC_LIB_PRIV@::;\
513 " $build_dir/install_root$libdir/pkgconfig/dri.pc
514
515 echo "<--opengl related common components built"
File builders/mesa-gl-1/contrib/util.sh deleted (index 219bc2d..0000000)
1 mkdir -p $build_dir/src/util
2 $python3 $src_dir/src/util/format_srgb.py >$build_dir/src/util/format_srgb.c
3
4 #===============================================================================
5
6 #$src_dir/util/bitset_test.cpp wtf? rotten brain?
7
8 mkdir -p $build_dir/src/util/format
9
10 $python3 $src_dir/src/util/format/u_format_table.py \
11 $src_dir/src/util/format/u_format.csv \
12 >$build_dir/src/util/format/u_format_table.c
13
14 $python3 $src_dir/src/util/format/u_format_table.py \
15 --header \
16 $src_dir/src/util/format/u_format.csv \
17 >$build_dir/src/util/format/u_format_pack.h
18
19 #-------------------------------------------------------------------------------
20
21 libmesa_util_files="\
22 $build_dir/src/util/format_srgb.c \
23 $build_dir/src/util/format/u_format_table.c \
24 $src_dir/src/util/anon_file.c \
25 $src_dir/src/util/bitscan.c \
26 $src_dir/src/util/blob.c \
27 $src_dir/src/util/build_id.c \
28 $src_dir/src/util/crc32.c \
29 $src_dir/src/util/debug.c \
30 $src_dir/src/util/disk_cache.c \
31 $src_dir/src/util/disk_cache_os.c \
32 $src_dir/src/util/double.c \
33 $src_dir/src/util/fast_idiv_by_const.c \
34 $src_dir/src/util/half_float.c \
35 $src_dir/src/util/hash_table.c \
36 $src_dir/src/util/mesa-sha1.c \
37 $src_dir/src/util/os_file.c \
38 $src_dir/src/util/os_time.c \
39 $src_dir/src/util/os_misc.c \
40 $src_dir/src/util/os_socket.c \
41 $src_dir/src/util/process_test.c \
42 $src_dir/src/util/u_process.c \
43 $src_dir/src/util/sha1/sha1.c \
44 $src_dir/src/util/ralloc.c \
45 $src_dir/src/util/rand_xor.c \
46 $src_dir/src/util/rb_tree.c \
47 $src_dir/src/util/register_allocate.c \
48 $src_dir/src/util/rgtc.c \
49 $src_dir/src/util/set.c \
50 $src_dir/src/util/slab.c \
51 $src_dir/src/util/softfloat.c \
52 $src_dir/src/util/sparse_array.c \
53 $src_dir/src/util/string_buffer.c \
54 $src_dir/src/util/strtod.c \
55 $src_dir/src/util/u_atomic.c \
56 $src_dir/src/util/u_debug_memory.c \
57 $src_dir/src/util/format/u_format.c \
58 $src_dir/src/util/format/u_format_bptc.c \
59 $src_dir/src/util/format/u_format_etc.c \
60 $src_dir/src/util/format/u_format_latc.c \
61 $src_dir/src/util/format/u_format_other.c \
62 $src_dir/src/util/format/u_format_rgtc.c \
63 $src_dir/src/util/format/u_format_s3tc.c \
64 $src_dir/src/util/format/u_format_tests.c \
65 $src_dir/src/util/format/u_format_yuv.c \
66 $src_dir/src/util/format/u_format_zs.c \
67 $src_dir/src/util/u_cpu_detect.c \
68 $src_dir/src/util/u_debug.c \
69 $src_dir/src/util/u_debug_stack.c \
70 $src_dir/src/util/u_debug_symbol.c \
71 $src_dir/src/util/u_idalloc.c \
72 $src_dir/src/util/u_math.c \
73 $src_dir/src/util/u_mm.c \
74 $src_dir/src/util/u_queue.c \
75 $src_dir/src/util/u_vector.c \
76 $src_dir/src/util/vma.c \
77 "
78
79 #------------------------------------------------------------------------------
80
81 tasks_n=0
82 for f in $libmesa_util_files
83 do
84 libmesa_util_obj_dir=$(dirname $f)
85 libmesa_util_obj_dir=$build_dir/${libmesa_util_obj_dir#*/src/}
86 mkdir -p $libmesa_util_obj_dir
87
88 libmesa_util_obj=$libmesa_util_obj_dir/$(basename $f .c).o
89 libmesa_util_a="$libmesa_util_a $libmesa_util_obj"
90
91 $cco_slib -o $libmesa_util_obj $f \
92 -I$build_dir/src/util/format \
93 -I$src_dir/src/gallium/auxiliary \
94 -I$src_dir/src/gallium/include \
95 -I$src_dir/src/util/format \
96 -I$src_dir/src/util \
97 -I$src_dir/src/mesa \
98 -I$src_dir/src \
99 -I$src_dir/include \
100 \
101 $cco_slib_common_trailer &
102
103 tasks_n=$((tasks_n+1))
104 if test $tasks_n -eq $tasks_n_max; then
105 wait
106 tasks_n=0
107 fi
108 done
109
110 #===============================================================================
111
112 $cco_slib -o $build_dir/util/xmlconfig.o $src_dir/src/util/xmlconfig.c \
113 -DSYSCONFDIR=\"$sysconfdir\" \
114 -DDATADIR=\"$datadir\" \
115 \
116 -I$src_dir/src \
117 -I$src_dir/include \
118 \
119 $cco_slib_common_trailer &
120
121 wait
122
123 #------------------------------------------------------------------------------
124
125 $ar $build_dir/libmesa_util.a $libmesa_util_a
126 $ar $build_dir/libxmlconfig.a $build_dir/util/xmlconfig.o
127
128 #===============================================================================
129
130 mkdir -p $build_dir/install_root$datadir/drirc.d
131 cp -f $src_dir/src/util/00-mesa-defaults.conf $build_dir/install_root$datadir/drirc.d
File builders/mesa-gl-1/contrib/x86_64_linux_glibc_amdgpu.sh deleted (index 81d910e..0000000)
1 #!/bin/sh
2 # Canonical specialized build scripts for AMD hardware on gnu/linux distros.
3 # Look for "unset", you'll find the values you can override in $1 or
4 # $build_dir/local_conf.sh file, that in order to tune the script for your
5 # specific distro/needs.
6
7 # Usage, drop the scripts in the contrib directory at the top of mesa source tree
8 # create somewhere else a build directory, cd into it, and call from there the
9 # main script.
10
11 # you get an install root tree in $build_dir/install_root
12
13 #===============================================================================
14 # NOTES
15 # the shared lib link command has 3 important sections:
16 # - between whole-archive and no-whole-archive is for finding symbols which are
17 # going to be dynamic.
18 # - exclude-libs, remove the symbols of a list of archives/objects from the final
19 # shared lib. Since with are using the hidden default visibility, it's for
20 # external archives which could be compiled without the hidden visibility.
21 # - between as-needed and no-as-needed, will add an explicit shared lib
22 # dependencies if some symbols from those shared libs are actually used.
23 # (don't know if this is done based on the shared lib dependendy tree)
24 #
25 # the dri platform is actually the os:
26 # - drm -> linux
27 # - apple -> macos
28 # - windows -> microsoft
29 #
30 # the EGL platforms are, mainly:
31 # - GBM/dri/drm (the one used by the xserver glamor acceleration)
32 # - x11/dri3 (used by real egl client application)
33 # - wayland/etc
34 #===============================================================================
35
36 set -e
37
38 #===============================================================================
39 # build dir, src dir and script dir
40 build_dir=$(readlink -e .)
41 echo "build_dir=$build_dir"
42 # we are in contrib
43 src_dir=$(readlink -e $(dirname $0)/..)
44 echo "src_dir=$src_dir"
45 # script location
46 script_dir=$(readlink -e $(dirname $0))
47 echo "script_dir=$script_dir"
48 echo
49 #===============================================================================
50
51
52 #===============================================================================
53 # the current configur-able variables may be individually overridden with the
54 # content of the file in $1 or $build_dir/local_conf.sh. Look for "unset"
55 # in those scripts to find what you can override to tune the build.
56 if test -f "$1"; then
57 . "$1"
58 else
59 if test -f $build_dir/local_conf.sh; then
60 . $build_dir/local_conf.sh
61 fi
62 fi
63 #===============================================================================
64
65
66 #===============================================================================
67 # when we perform tasks in //, use "roughly" this maximum value
68 if test "${tasks_n_max-unset}" = unset; then
69 tasks_n_max=8
70 fi
71 #===============================================================================
72
73
74 #===============================================================================
75 if test "${prefix-unset}" = unset; then
76 prefix='/nyan/mesa-gl/x86_64_linux_glibc_amdgpu'
77 fi
78
79 if test "${sysconfdir-unset}" = unset; then
80 sysconfdir='/nyan/mesa-gl/x86_64_linux_glibc_amdgpu/etc'
81 fi
82
83 if test "${datadir-unset}" = unset; then
84 datadir='/nyan/mesa-gl/x86_64_linux_glibc_amdgpu/share'
85 fi
86
87 if test "${libdir-unset}" = unset; then
88 libdir='/nyan/mesa-gl/x86_64_linux_glibc_amdgpu/lib'
89 fi
90
91 if test "${incdir-unset}" = unset; then
92 incdir='/nyan/mesa-gl/x86_64_linux_glibc_amdgpu/include'
93 fi
94 #===============================================================================
95
96
97 #===============================================================================
98 if test "${version-unset}" = unset; then
99 if test -f $src_dir/VERSION; then
100 version=$(cat $src_dir/VERSION)
101 else
102 echo 'error:missing version'
103 exit 1
104 fi
105 fi
106
107 if test "${dri_driver_search_dir-unset}" = unset; then
108 dri_driver_search_dir=/nyan/mesa-gl/x86_64_linux_glibc_amdgpu/lib/dri
109 fi
110 #===============================================================================
111
112
113 #===============================================================================
114 # linux
115 linux_cppflags="\
116 -DHAVE_DRM=1 \
117 -DHAVE_LINUX_FUTEX_H=1 \
118 "
119 #===============================================================================
120
121
122 #===============================================================================
123 # glibc
124 glibc_cppflags="\
125 -DPIC=1 \
126 -D_GNU_SOURCE=1 \
127 -DHAVE_SYS_SYSCTL_H=1 \
128 -DHAVE_ENDIAN_H=1 \
129 -DHAVE_DLFCN_H=1 \
130 -DHAVE_UNISTD_H=1 \
131 \
132 -DMAJOR_IN_SYSMACROS=1 \
133 -DHAVE_STRTOF=1 \
134 -DHAVE_MKOSTEMP=1 \
135 -DHAVE_POSIX_MEMALIGN=1 \
136 -DHAVE_TIMESPEC_GET=1 \
137 -DHAVE_STRTOD_L=1 \
138 -DHAVE_DLADDR=1 \
139 -DHAVE_DL_ITERATE_PHDR=1 \
140 -DHAVE_PTHREAD=1 \
141 -DHAVE_PTHREAD_SETAFFINITY=1 \
142 \
143 -DHAVE_PROGRAM_INVOCATION_NAME=1 \
144 -DHAVE_FLOCK=1 \
145 "
146 #-------------------------------------------------------------------------------
147 # glibc linux wrappers
148 glibc_linux_cppflags="\
149 -DHAVE_MEMFD_CREATE=1 \
150 -DHAVE_MINCORE=1 \
151 "
152 #-------------------------------------------------------------------------------
153 glibc_ldflags='-pthread -ldl -lm'
154 #===============================================================================
155
156
157 #===============================================================================
158 # lexer and parser
159 if test "${bison-unset}" = unset; then
160 bison=/nyan/nyanbison/current/bin/bison
161 fi
162 if test "${flex-unset}" = unset; then
163 flex=/nyan/flex/current/bin/flex
164 fi
165 #===============================================================================
166
167
168 #===============================================================================
169 # python/perl/ruby/javascript/lua/etc whatever...
170 if test "${python3-unset}" = unset; then
171 python3=/nyan/python3/current/bin/python3
172 fi
173
174 if test "${mako-unset}" = unset; then
175 mako=/nyan/mako/current
176 fi
177 #===============================================================================
178
179
180 #===============================================================================
181 . $script_dir/gcc_binutils.sh
182 #===============================================================================
183
184
185 #===============================================================================
186 # configuration of mesa code paths
187
188 # enable/disable debug code paths
189 #debug_cppflags='-DDEBUG'
190 debug_cppflags='-DNDEBUG=1'
191
192 # no GLX_INDIRECT_RENDERING, only GLX_DIRECT_RENDERING
193 mesa_cppflags="\
194 $debug_cppflags \
195 -DENABLE_SHADER_CACHE=1 \
196 -DHAVE_DRI3=1 \
197 -DHAVE_DRI3_MODIFIERS=1 \
198 -DGLX_USE_TLS=1 \
199 -DGLX_DIRECT_RENDERING=1 \
200 -DGLX_USE_DRM=1 \
201 -DPACKAGE_VERSION=\"$version\" \
202 -DPACKAGE_BUGREPORT=\"https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa\" \
203 "
204 #===============================================================================
205
206
207 #===============================================================================
208 . $script_dir/external_deps.sh
209 #===============================================================================
210
211
212 #===============================================================================
213 # some values repeating often
214 cco_slib_common_trailer="\
215 $mesa_cppflags \
216 \
217 $external_deps_cppflags \
218 \
219 $glibc_cppflags \
220 $glibc_linux_cppflags \
221 $linux_cppflags \
222 $gcc_cppflags \
223 \
224 $cflags_opt \
225 "
226
227 cxxo_slib_common_trailer="\
228 $mesa_cppflags \
229 \
230 $external_deps_cppflags \
231 \
232 $glibc_cppflags \
233 $glibc_linux_cppflags \
234 $linux_cppflags \
235 $gcc_cppflags \
236 \
237 $cxxflags_opt \
238 "
239 #===============================================================================
240
241
242
243 ################################################################################
244 ################################################################################
245 ################################################################################
246 ################################################################################
247 ################################################################################
248 ################################################################################
249 ################################################################################
250 ################################################################################
251
252
253 #===============================================================================
254 # the install root tree
255 mkdir -p $build_dir/install_root
256 #===============================================================================
257
258
259 #===============================================================================
260 # the git sha
261 mkdir -p $build_dir/src
262 git_sha1=no_git_sha1_available
263 if test -d $src_dir/.git; then
264 git_sha1=$(git --git-dir=$src_dir/.git rev-parse HEAD)
265 fi
266 echo git_sha1=$git_sha1
267 echo "#define MESA_GIT_SHA1 \"$git_sha1\"" >$build_dir/src/git_sha1.h
268 #===============================================================================
269
270
271 #===============================================================================
272 . $script_dir/util.sh
273 #------------------------------------------------------------------------------
274 # APIs management
275 . $script_dir/loader.sh
276 . $script_dir/gbm.sh
277 . $script_dir/mapi.sh
278 . $script_dir/compiler.sh
279 . $script_dir/mesa.sh
280 . $script_dir/glx.sh
281 . $script_dir/egl.sh
282 #------------------------------------------------------------------------------
283 # hardware dri gallium drivers for above APIs
284 . $script_dir/amd.sh
285 . $script_dir/gallium.sh
286 #===============================================================================
287
288
289 #===============================================================================
290 mkdir -p $build_dir/install_root$libdir/pkgconfig
291 cp $src_dir/contrib/pkgconfig/gl.pc.in $build_dir/install_root$libdir/pkgconfig/gl.pc
292 sed -i "\
293 s:@prefix@:$prefix:;\
294 s:@libdir@:$libdir:;\
295 s:@includedir@:$incdir:;\
296 s:@GL_PC_REQ_PRIV@::;\
297 s:@PACKAGE_VERSION@:$version:;\
298 s:@GL_PKGCONF_LIB@:GL:;\
299 s:@GL_PC_LIB_PRIV@::;\
300 s:@GL_PC_CFLAGS@::;\
301 s:@GLX_TLS@:yes:;\
302 " $build_dir/install_root$libdir/pkgconfig/gl.pc
303 #===============================================================================
File builders/mesa-gl-amd-sh-1/builder.sh added (mode: 100644) (index 0000000..908b924)
1 git_commit=ea83fd912423ac0247395f5c1ccabe94cd95ee24
2 slot=1
3 . $nyan_root/builders/mesa-gl/builder.sh
File builders/mesa-gl-amd-sh-1/contrib/amd.sh renamed from builders/mesa-gl-1/contrib/amd.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/compiler.sh copied from file builders/mesa-gl-amd-sh-0/contrib/compiler.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/compiler_glsl.sh copied from file builders/mesa-gl-amd-sh-0/contrib/compiler_glsl.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/compiler_nir.sh copied from file builders/mesa-gl-amd-sh-0/contrib/compiler_nir.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/drm_helper.h.patch renamed from builders/mesa-gl-1/contrib/drm_helper.h.patch (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/egl.sh renamed from builders/mesa-gl-1/contrib/egl.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/egl_dri2.c.patch renamed from builders/mesa-gl-1/contrib/egl_dri2.c.patch (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/external_deps.sh renamed from builders/mesa-gl-1/contrib/external_deps.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/gallium.sh renamed from builders/mesa-gl-1/contrib/gallium.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/gallium_auxiliary.sh copied from file builders/mesa-gl-amd-sh-0/contrib/gallium_auxiliary.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/gallium_drivers.sh copied from file builders/mesa-gl-amd-sh-0/contrib/gallium_drivers.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/gallium_frontends.sh renamed from builders/mesa-gl-1/contrib/gallium_frontends.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/gallium_state_trackers.sh copied from file builders/mesa-gl-amd-sh-0/contrib/gallium_state_trackers.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/gallium_targets.sh copied from file builders/mesa-gl-amd-sh-0/contrib/gallium_targets.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/gallium_winsys.sh renamed from builders/mesa-gl-1/contrib/gallium_winsys.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/gbm.sh renamed from builders/mesa-gl-1/contrib/gbm.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/gcc_binutils.sh copied from file builders/mesa-gl-amd-sh-0/contrib/gcc_binutils.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/glx.sh copied from file builders/mesa-gl-amd-sh-0/contrib/glx.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/loader.sh renamed from builders/mesa-gl-1/contrib/loader.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/mapi.sh renamed from builders/mesa-gl-1/contrib/mapi.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/matypes.h.x86_64 renamed from builders/mesa-gl-1/contrib/matypes.h.x86_64 (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/mesa.sh copied from file builders/mesa-gl-amd-sh-0/contrib/mesa.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/pipe_loader.c.patch renamed from builders/mesa-gl-1/contrib/pipe_loader.c.patch (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/pkgconfig/dri.pc.in renamed from builders/mesa-gl-1/contrib/pkgconfig/dri.pc.in (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/pkgconfig/egl.pc.in renamed from builders/mesa-gl-1/contrib/pkgconfig/egl.pc.in (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/pkgconfig/gbm.pc.in renamed from builders/mesa-gl-1/contrib/pkgconfig/gbm.pc.in (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/pkgconfig/gl.pc.in renamed from builders/mesa-gl-1/contrib/pkgconfig/gl.pc.in (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/si_pipe.c.patch renamed from builders/mesa-gl-1/contrib/si_pipe.c.patch (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/si_uvd.c renamed from builders/mesa-gl-1/contrib/si_uvd.c (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/util.sh copied from file builders/mesa-gl-amd-sh-0/contrib/util.sh (similarity 100%)
File builders/mesa-gl-amd-sh-1/contrib/x86_64_linux_glibc_amdgpu.sh copied from file builders/mesa-gl-amd-sh-0/contrib/x86_64_linux_glibc_amdgpu.sh (similarity 100%)
File builders/mesa-vulkan-0/contrib/ezxml/changelog.txt deleted (index f05f918..0000000)
1 ezXML 0.8.6
2 - fixed a bug in ezxml_add_child() that can occur when adding tags out of order
3 - for consistency, ezxml_set_attr() now returns the tag given
4 - added ezxml_move() and supporting functions ezxml_cut() and ezxml_insert()
5 - fixed a bug where parsing an empty file could cause a segfault
6
7 ezXML 0.8.5
8 - fixed ezxml_toxml() to not output siblings of tag being converted
9 - fixed a segfault when ezxml_set_attr() was used on a new root tag
10 - added ezxml_name() function macro
11 - all external functions now handle NULL ezxml_t structs without segfaulting
12
13 ezXML 0.8.4
14 - fixed to compile under win-doze when NOMMAP make option is set
15 - fixed a bug where ezxml_toxml() could segfault if tag offset is out of bounds
16 - ezxml_add_child() now works properly when tags are added out of order
17 - improved error messages now include line numbers
18 - fixed memory leak when entity reference is shorter than replacement text
19 - added ezxml_new_d(), ezxml_add_child_d(), ezxml_set_txt_d() and
20 ezxml_set_attr_d() function macros as wrappers that strdup() their arguments
21
22 ezXML 0.8.3
23 - fixed a UTF-16 decoding bug affecting larger unicode values
24 - added internal dtd processing for entity declarations and default attributes
25 - now correctly normalizes attribute values in compliance with the XML 1.0 spec
26 - added check for correct tag nesting
27 - ezxml_toxml() now generates canonical xml (apart from the namespace stuff)
28
29 ezXML 0.8.2
30 - fixed compiler warning about lvalue type casting
31 - ezxml_get() argument list can now be terminated by an empty string tag name
32 - added NOMMAP make option for systems without posix memory mapping
33 - added support for UTF-16
34 - fixed bug in ezxml_toxml() where UTF-8 sequences were being ampersand encoded
35 - added ezxml_new(), ezxml_add_child(), ezxml_set_txt(), ezxml_set_attr(),
36 and ezxml_remove() to facilitate creating and modifying xml
37
38 ezXML 0.8.1
39 - fixed bug where tags of same name were not recognized as such
40 - fixed a memory allocation bug in ezxml_toxml() that could cause a segfault
41 - added an extra check for missing root tag
42 - now allows for space between ] and > when closing <!DOCTYPE [ ... ]>
43 - now allows : as tag name start char
44 - added ezxml_next() and ezxml_txt() function macros
45
46 ezXML 0.8
47 - added ezxml_toxml() function
48 - removed ezxml_print(), just use printf() with ezxml_toxml() (minor version
49 api changes will all be backwards compatible after 1.0 release)
50 - added ezxml_pi() for retrieving <? ?> parsing instructions
51 - whitespace in tag data is now preserved in compliance with the XML 1.0 spec
52
53 ezXML 0.7
54 - initial public release
File builders/mesa-vulkan-0/contrib/ezxml/ezxml.c deleted (index 82b11fb..0000000)
1 /* ezxml.c
2 *
3 * Copyright 2004-2006 Aaron Voisine <aaron@voisine.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
20 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #include <stdlib.h>
26 #include <stdio.h>
27 #include <stdarg.h>
28 #include <string.h>
29 #include <ctype.h>
30 #include <unistd.h>
31 #include <sys/types.h>
32 #ifndef EZXML_NOMMAP
33 #include <sys/mman.h>
34 #endif // EZXML_NOMMAP
35 #include <sys/stat.h>
36 #include "ezxml.h"
37
38 #define EZXML_WS "\t\r\n " // whitespace
39 #define EZXML_ERRL 128 // maximum error string length
40
41 typedef struct ezxml_root *ezxml_root_t;
42 struct ezxml_root { // additional data for the root tag
43 struct ezxml xml; // is a super-struct built on top of ezxml struct
44 ezxml_t cur; // current xml tree insertion point
45 char *m; // original xml string
46 size_t len; // length of allocated memory for mmap, -1 for malloc
47 char *u; // UTF-8 conversion of string if original was UTF-16
48 char *s; // start of work area
49 char *e; // end of work area
50 char **ent; // general entities (ampersand sequences)
51 char ***attr; // default attributes
52 char ***pi; // processing instructions
53 short standalone; // non-zero if <?xml standalone="yes"?>
54 char err[EZXML_ERRL]; // error string
55 };
56
57 char *EZXML_NIL[] = { NULL }; // empty, null terminated array of strings
58
59 // returns the first child tag with the given name or NULL if not found
60 ezxml_t ezxml_child(ezxml_t xml, const char *name)
61 {
62 xml = (xml) ? xml->child : NULL;
63 while (xml && strcmp(name, xml->name)) xml = xml->sibling;
64 return xml;
65 }
66
67 // returns the Nth tag with the same name in the same subsection or NULL if not
68 // found
69 ezxml_t ezxml_idx(ezxml_t xml, int idx)
70 {
71 for (; xml && idx; idx--) xml = xml->next;
72 return xml;
73 }
74
75 // returns the value of the requested tag attribute or NULL if not found
76 const char *ezxml_attr(ezxml_t xml, const char *attr)
77 {
78 int i = 0, j = 1;
79 ezxml_root_t root = (ezxml_root_t)xml;
80
81 if (! xml || ! xml->attr) return NULL;
82 while (xml->attr[i] && strcmp(attr, xml->attr[i])) i += 2;
83 if (xml->attr[i]) return xml->attr[i + 1]; // found attribute
84
85 while (root->xml.parent) root = (ezxml_root_t)root->xml.parent; // root tag
86 for (i = 0; root->attr[i] && strcmp(xml->name, root->attr[i][0]); i++);
87 if (! root->attr[i]) return NULL; // no matching default attributes
88 while (root->attr[i][j] && strcmp(attr, root->attr[i][j])) j += 3;
89 return (root->attr[i][j]) ? root->attr[i][j + 1] : NULL; // found default
90 }
91
92 // same as ezxml_get but takes an already initialized va_list
93 ezxml_t ezxml_vget(ezxml_t xml, va_list ap)
94 {
95 char *name = va_arg(ap, char *);
96 int idx = -1;
97
98 if (name && *name) {
99 idx = va_arg(ap, int);
100 xml = ezxml_child(xml, name);
101 }
102 return (idx < 0) ? xml : ezxml_vget(ezxml_idx(xml, idx), ap);
103 }
104
105 // Traverses the xml tree to retrieve a specific subtag. Takes a variable
106 // length list of tag names and indexes. The argument list must be terminated
107 // by either an index of -1 or an empty string tag name. Example:
108 // title = ezxml_get(library, "shelf", 0, "book", 2, "title", -1);
109 // This retrieves the title of the 3rd book on the 1st shelf of library.
110 // Returns NULL if not found.
111 ezxml_t ezxml_get(ezxml_t xml, ...)
112 {
113 va_list ap;
114 ezxml_t r;
115
116 va_start(ap, xml);
117 r = ezxml_vget(xml, ap);
118 va_end(ap);
119 return r;
120 }
121
122 // returns a null terminated array of processing instructions for the given
123 // target
124 const char **ezxml_pi(ezxml_t xml, const char *target)
125 {
126 ezxml_root_t root = (ezxml_root_t)xml;
127 int i = 0;
128
129 if (! root) return (const char **)EZXML_NIL;
130 while (root->xml.parent) root = (ezxml_root_t)root->xml.parent; // root tag
131 while (root->pi[i] && strcmp(target, root->pi[i][0])) i++; // find target
132 return (const char **)((root->pi[i]) ? root->pi[i] + 1 : EZXML_NIL);
133 }
134
135 // set an error string and return root
136 ezxml_t ezxml_err(ezxml_root_t root, char *s, const char *err, ...)
137 {
138 va_list ap;
139 int line = 1;
140 char *t, fmt[EZXML_ERRL];
141
142 for (t = root->s; t < s; t++) if (*t == '\n') line++;
143 snprintf(fmt, EZXML_ERRL, "[error near line %d]: %s", line, err);
144
145 va_start(ap, err);
146 vsnprintf(root->err, EZXML_ERRL, fmt, ap);
147 va_end(ap);
148
149 return &root->xml;
150 }
151
152 // Recursively decodes entity and character references and normalizes new lines
153 // ent is a null terminated array of alternating entity names and values. set t
154 // to '&' for general entity decoding, '%' for parameter entity decoding, 'c'
155 // for cdata sections, ' ' for attribute normalization, or '*' for non-cdata
156 // attribute normalization. Returns s, or if the decoded string is longer than
157 // s, returns a malloced string that must be freed.
158 char *ezxml_decode(char *s, char **ent, char t)
159 {
160 char *e, *r = s, *m = s;
161 long b, c, d, l;
162
163 for (; *s; s++) { // normalize line endings
164 while (*s == '\r') {
165 *(s++) = '\n';
166 if (*s == '\n') memmove(s, (s + 1), strlen(s));
167 }
168 }
169
170 for (s = r; ; ) {
171 while (*s && *s != '&' && (*s != '%' || t != '%') && !isspace(*s)) s++;
172
173 if (! *s) break;
174 else if (t != 'c' && ! strncmp(s, "&#", 2)) { // character reference
175 if (s[2] == 'x') c = strtol(s + 3, &e, 16); // base 16
176 else c = strtol(s + 2, &e, 10); // base 10
177 if (! c || *e != ';') { s++; continue; } // not a character ref
178
179 if (c < 0x80) *(s++) = c; // US-ASCII subset
180 else { // multi-byte UTF-8 sequence
181 for (b = 0, d = c; d; d /= 2) b++; // number of bits in c
182 b = (b - 2) / 5; // number of bytes in payload
183 *(s++) = (0xFF << (7 - b)) | (c >> (6 * b)); // head
184 while (b) *(s++) = 0x80 | ((c >> (6 * --b)) & 0x3F); // payload
185 }
186
187 memmove(s, strchr(s, ';') + 1, strlen(strchr(s, ';')));
188 }
189 else if ((*s == '&' && (t == '&' || t == ' ' || t == '*')) ||
190 (*s == '%' && t == '%')) { // entity reference
191 for (b = 0; ent[b] && strncmp(s + 1, ent[b], strlen(ent[b]));
192 b += 2); // find entity in entity list
193
194 if (ent[b++]) { // found a match
195 if ((c = strlen(ent[b])) - 1 > (e = strchr(s, ';')) - s) {
196 l = (d = (s - r)) + c + strlen(e); // new length
197 r = (r == m) ? strcpy(malloc(l), r) : realloc(r, l);
198 e = strchr((s = r + d), ';'); // fix up pointers
199 }
200
201 memmove(s + c, e + 1, strlen(e)); // shift rest of string
202 strncpy(s, ent[b], c); // copy in replacement text
203 }
204 else s++; // not a known entity
205 }
206 else if ((t == ' ' || t == '*') && isspace(*s)) *(s++) = ' ';
207 else s++; // no decoding needed
208 }
209
210 if (t == '*') { // normalize spaces for non-cdata attributes
211 for (s = r; *s; s++) {
212 if ((l = strspn(s, " "))) memmove(s, s + l, strlen(s + l) + 1);
213 while (*s && *s != ' ') s++;
214 }
215 if (--s >= r && *s == ' ') *s = '\0'; // trim any trailing space
216 }
217 return r;
218 }
219
220 // called when parser finds start of new tag
221 void ezxml_open_tag(ezxml_root_t root, char *name, char **attr)
222 {
223 ezxml_t xml = root->cur;
224
225 if (xml->name) xml = ezxml_add_child(xml, name, strlen(xml->txt));
226 else xml->name = name; // first open tag
227
228 xml->attr = attr;
229 root->cur = xml; // update tag insertion point
230 }
231
232 // called when parser finds character content between open and closing tag
233 void ezxml_char_content(ezxml_root_t root, char *s, size_t len, char t)
234 {
235 ezxml_t xml = root->cur;
236 char *m = s;
237 size_t l;
238
239 if (! xml || ! xml->name || ! len) return; // sanity check
240
241 s[len] = '\0'; // null terminate text (calling functions anticipate this)
242 len = strlen(s = ezxml_decode(s, root->ent, t)) + 1;
243
244 if (! *(xml->txt)) xml->txt = s; // initial character content
245 else { // allocate our own memory and make a copy
246 xml->txt = (xml->flags & EZXML_TXTM) // allocate some space
247 ? realloc(xml->txt, (l = strlen(xml->txt)) + len)
248 : strcpy(malloc((l = strlen(xml->txt)) + len), xml->txt);
249 strcpy(xml->txt + l, s); // add new char content
250 if (s != m) free(s); // free s if it was malloced by ezxml_decode()
251 }
252
253 if (xml->txt != m) ezxml_set_flag(xml, EZXML_TXTM);
254 }
255
256 // called when parser finds closing tag
257 ezxml_t ezxml_close_tag(ezxml_root_t root, char *name, char *s)
258 {
259 if (! root->cur || ! root->cur->name || strcmp(name, root->cur->name))
260 return ezxml_err(root, s, "unexpected closing tag </%s>", name);
261
262 root->cur = root->cur->parent;
263 return NULL;
264 }
265
266 // checks for circular entity references, returns non-zero if no circular
267 // references are found, zero otherwise
268 int ezxml_ent_ok(char *name, char *s, char **ent)
269 {
270 int i;
271
272 for (; ; s++) {
273 while (*s && *s != '&') s++; // find next entity reference
274 if (! *s) return 1;
275 if (! strncmp(s + 1, name, strlen(name))) return 0; // circular ref.
276 for (i = 0; ent[i] && strncmp(ent[i], s + 1, strlen(ent[i])); i += 2);
277 if (ent[i] && ! ezxml_ent_ok(name, ent[i + 1], ent)) return 0;
278 }
279 }
280
281 // called when the parser finds a processing instruction
282 void ezxml_proc_inst(ezxml_root_t root, char *s, size_t len)
283 {
284 int i = 0, j = 1;
285 char *target = s;
286
287 s[len] = '\0'; // null terminate instruction
288 if (*(s += strcspn(s, EZXML_WS))) {
289 *s = '\0'; // null terminate target
290 s += strspn(s + 1, EZXML_WS) + 1; // skip whitespace after target
291 }
292
293 if (! strcmp(target, "xml")) { // <?xml ... ?>
294 if ((s = strstr(s, "standalone")) && ! strncmp(s + strspn(s + 10,
295 EZXML_WS "='\"") + 10, "yes", 3)) root->standalone = 1;
296 return;
297 }
298
299 if (! root->pi[0]) *(root->pi = malloc(sizeof(char **))) = NULL; //first pi
300
301 while (root->pi[i] && strcmp(target, root->pi[i][0])) i++; // find target
302 if (! root->pi[i]) { // new target
303 root->pi = realloc(root->pi, sizeof(char **) * (i + 2));
304 root->pi[i] = malloc(sizeof(char *) * 3);
305 root->pi[i][0] = target;
306 root->pi[i][1] = (char *)(root->pi[i + 1] = NULL); // terminate pi list
307 root->pi[i][2] = strdup(""); // empty document position list
308 }
309
310 while (root->pi[i][j]) j++; // find end of instruction list for this target
311 root->pi[i] = realloc(root->pi[i], sizeof(char *) * (j + 3));
312 root->pi[i][j + 2] = realloc(root->pi[i][j + 1], j + 1);
313 strcpy(root->pi[i][j + 2] + j - 1, (root->xml.name) ? ">" : "<");
314 root->pi[i][j + 1] = NULL; // null terminate pi list for this target
315 root->pi[i][j] = s; // set instruction
316 }
317
318 // called when the parser finds an internal doctype subset
319 short ezxml_internal_dtd(ezxml_root_t root, char *s, size_t len)
320 {
321 char q, *c, *t, *n = NULL, *v, **ent, **pe;
322 int i, j;
323
324 pe = memcpy(malloc(sizeof(EZXML_NIL)), EZXML_NIL, sizeof(EZXML_NIL));
325
326 for (s[len] = '\0'; s; ) {
327 while (*s && *s != '<' && *s != '%') s++; // find next declaration
328
329 if (! *s) break;
330 else if (! strncmp(s, "<!ENTITY", 8)) { // parse entity definitions
331 c = s += strspn(s + 8, EZXML_WS) + 8; // skip white space separator
332 n = s + strspn(s, EZXML_WS "%"); // find name
333 *(s = n + strcspn(n, EZXML_WS)) = ';'; // append ; to name
334
335 v = s + strspn(s + 1, EZXML_WS) + 1; // find value
336 if ((q = *(v++)) != '"' && q != '\'') { // skip externals
337 s = strchr(s, '>');
338 continue;
339 }
340
341 for (i = 0, ent = (*c == '%') ? pe : root->ent; ent[i]; i++);
342 ent = realloc(ent, (i + 3) * sizeof(char *)); // space for next ent
343 if (*c == '%') pe = ent;
344 else root->ent = ent;
345
346 *(++s) = '\0'; // null terminate name
347 if ((s = strchr(v, q))) *(s++) = '\0'; // null terminate value
348 ent[i + 1] = ezxml_decode(v, pe, '%'); // set value
349 ent[i + 2] = NULL; // null terminate entity list
350 if (! ezxml_ent_ok(n, ent[i + 1], ent)) { // circular reference
351 if (ent[i + 1] != v) free(ent[i + 1]);
352 ezxml_err(root, v, "circular entity declaration &%s", n);
353 break;
354 }
355 else ent[i] = n; // set entity name
356 }
357 else if (! strncmp(s, "<!ATTLIST", 9)) { // parse default attributes
358 t = s + strspn(s + 9, EZXML_WS) + 9; // skip whitespace separator
359 if (! *t) { ezxml_err(root, t, "unclosed <!ATTLIST"); break; }
360 if (*(s = t + strcspn(t, EZXML_WS ">")) == '>') continue;
361 else *s = '\0'; // null terminate tag name
362 for (i = 0; root->attr[i] && strcmp(n, root->attr[i][0]); i++);
363
364 while (*(n = ++s + strspn(s, EZXML_WS)) && *n != '>') {
365 if (*(s = n + strcspn(n, EZXML_WS))) *s = '\0'; // attr name
366 else { ezxml_err(root, t, "malformed <!ATTLIST"); break; }
367
368 s += strspn(s + 1, EZXML_WS) + 1; // find next token
369 c = (strncmp(s, "CDATA", 5)) ? "*" : " "; // is it cdata?
370 if (! strncmp(s, "NOTATION", 8))
371 s += strspn(s + 8, EZXML_WS) + 8;
372 s = (*s == '(') ? strchr(s, ')') : s + strcspn(s, EZXML_WS);
373 if (! s) { ezxml_err(root, t, "malformed <!ATTLIST"); break; }
374
375 s += strspn(s, EZXML_WS ")"); // skip white space separator
376 if (! strncmp(s, "#FIXED", 6))
377 s += strspn(s + 6, EZXML_WS) + 6;
378 if (*s == '#') { // no default value
379 s += strcspn(s, EZXML_WS ">") - 1;
380 if (*c == ' ') continue; // cdata is default, nothing to do
381 v = NULL;
382 }
383 else if ((*s == '"' || *s == '\'') && // default value
384 (s = strchr(v = s + 1, *s))) *s = '\0';
385 else { ezxml_err(root, t, "malformed <!ATTLIST"); break; }
386
387 if (! root->attr[i]) { // new tag name
388 root->attr = (! i) ? malloc(2 * sizeof(char **))
389 : realloc(root->attr,
390 (i + 2) * sizeof(char **));
391 root->attr[i] = malloc(2 * sizeof(char *));
392 root->attr[i][0] = t; // set tag name
393 root->attr[i][1] = (char *)(root->attr[i + 1] = NULL);
394 }
395
396 for (j = 1; root->attr[i][j]; j += 3); // find end of list
397 root->attr[i] = realloc(root->attr[i],
398 (j + 4) * sizeof(char *));
399
400 root->attr[i][j + 3] = NULL; // null terminate list
401 root->attr[i][j + 2] = c; // is it cdata?
402 root->attr[i][j + 1] = (v) ? ezxml_decode(v, root->ent, *c)
403 : NULL;
404 root->attr[i][j] = n; // attribute name
405 }
406 }
407 else if (! strncmp(s, "<!--", 4)) s = strstr(s + 4, "-->"); // comments
408 else if (! strncmp(s, "<?", 2)) { // processing instructions
409 if ((s = strstr(c = s + 2, "?>")))
410 ezxml_proc_inst(root, c, s++ - c);
411 }
412 else if (*s == '<') s = strchr(s, '>'); // skip other declarations
413 else if (*(s++) == '%' && ! root->standalone) break;
414 }
415
416 free(pe);
417 return ! *root->err;
418 }
419
420 // Converts a UTF-16 string to UTF-8. Returns a new string that must be freed
421 // or NULL if no conversion was needed.
422 char *ezxml_str2utf8(char **s, size_t *len)
423 {
424 char *u;
425 size_t l = 0, sl, max = *len;
426 long c, d;
427 int b, be = (**s == '\xFE') ? 1 : (**s == '\xFF') ? 0 : -1;
428
429 if (be == -1) return NULL; // not UTF-16
430
431 u = malloc(max);
432 for (sl = 2; sl < *len - 1; sl += 2) {
433 c = (be) ? (((*s)[sl] & 0xFF) << 8) | ((*s)[sl + 1] & 0xFF) //UTF-16BE
434 : (((*s)[sl + 1] & 0xFF) << 8) | ((*s)[sl] & 0xFF); //UTF-16LE
435 if (c >= 0xD800 && c <= 0xDFFF && (sl += 2) < *len - 1) { // high-half
436 d = (be) ? (((*s)[sl] & 0xFF) << 8) | ((*s)[sl + 1] & 0xFF)
437 : (((*s)[sl + 1] & 0xFF) << 8) | ((*s)[sl] & 0xFF);
438 c = (((c & 0x3FF) << 10) | (d & 0x3FF)) + 0x10000;
439 }
440
441 while (l + 6 > max) u = realloc(u, max += EZXML_BUFSIZE);
442 if (c < 0x80) u[l++] = c; // US-ASCII subset
443 else { // multi-byte UTF-8 sequence
444 for (b = 0, d = c; d; d /= 2) b++; // bits in c
445 b = (b - 2) / 5; // bytes in payload
446 u[l++] = (0xFF << (7 - b)) | (c >> (6 * b)); // head
447 while (b) u[l++] = 0x80 | ((c >> (6 * --b)) & 0x3F); // payload
448 }
449 }
450 return *s = realloc(u, *len = l);
451 }
452
453 // frees a tag attribute list
454 void ezxml_free_attr(char **attr) {
455 int i = 0;
456 char *m;
457
458 if (! attr || attr == EZXML_NIL) return; // nothing to free
459 while (attr[i]) i += 2; // find end of attribute list
460 m = attr[i + 1]; // list of which names and values are malloced
461 for (i = 0; m[i]; i++) {
462 if (m[i] & EZXML_NAMEM) free(attr[i * 2]);
463 if (m[i] & EZXML_TXTM) free(attr[(i * 2) + 1]);
464 }
465 free(m);
466 free(attr);
467 }
468
469 // parse the given xml string and return an ezxml structure
470 ezxml_t ezxml_parse_str(char *s, size_t len)
471 {
472 ezxml_root_t root = (ezxml_root_t)ezxml_new(NULL);
473 char q, e, *d, **attr, **a = NULL; // initialize a to avoid compile warning
474 int l, i, j;
475
476 root->m = s;
477 if (! len) return ezxml_err(root, NULL, "root tag missing");
478 root->u = ezxml_str2utf8(&s, &len); // convert utf-16 to utf-8
479 root->e = (root->s = s) + len; // record start and end of work area
480
481 e = s[len - 1]; // save end char
482 s[len - 1] = '\0'; // turn end char into null terminator
483
484 while (*s && *s != '<') s++; // find first tag
485 if (! *s) return ezxml_err(root, s, "root tag missing");
486
487 for (; ; ) {
488 attr = (char **)EZXML_NIL;
489 d = ++s;
490
491 if (isalpha(*s) || *s == '_' || *s == ':' || *s < '\0') { // new tag
492 if (! root->cur)
493 return ezxml_err(root, d, "markup outside of root element");
494
495 s += strcspn(s, EZXML_WS "/>");
496 while (isspace(*s)) *(s++) = '\0'; // null terminate tag name
497
498 if (*s && *s != '/' && *s != '>') // find tag in default attr list
499 for (i = 0; (a = root->attr[i]) && strcmp(a[0], d); i++);
500
501 for (l = 0; *s && *s != '/' && *s != '>'; l += 2) { // new attrib
502 attr = (l) ? realloc(attr, (l + 4) * sizeof(char *))
503 : malloc(4 * sizeof(char *)); // allocate space
504 attr[l + 3] = (l) ? realloc(attr[l + 1], (l / 2) + 2)
505 : malloc(2); // mem for list of maloced vals
506 strcpy(attr[l + 3] + (l / 2), " "); // value is not malloced
507 attr[l + 2] = NULL; // null terminate list
508 attr[l + 1] = ""; // temporary attribute value
509 attr[l] = s; // set attribute name
510
511 s += strcspn(s, EZXML_WS "=/>");
512 if (*s == '=' || isspace(*s)) {
513 *(s++) = '\0'; // null terminate tag attribute name
514 q = *(s += strspn(s, EZXML_WS "="));
515 if (q == '"' || q == '\'') { // attribute value
516 attr[l + 1] = ++s;
517 while (*s && *s != q) s++;
518 if (*s) *(s++) = '\0'; // null terminate attribute val
519 else {
520 ezxml_free_attr(attr);
521 return ezxml_err(root, d, "missing %c", q);
522 }
523
524 for (j = 1; a && a[j] && strcmp(a[j], attr[l]); j +=3);
525 attr[l + 1] = ezxml_decode(attr[l + 1], root->ent, (a
526 && a[j]) ? *a[j + 2] : ' ');
527 if (attr[l + 1] < d || attr[l + 1] > s)
528 attr[l + 3][l / 2] = EZXML_TXTM; // value malloced
529 }
530 }
531 while (isspace(*s)) s++;
532 }
533
534 if (*s == '/') { // self closing tag
535 *(s++) = '\0';
536 if ((*s && *s != '>') || (! *s && e != '>')) {
537 if (l) ezxml_free_attr(attr);
538 return ezxml_err(root, d, "missing >");
539 }
540 ezxml_open_tag(root, d, attr);
541 ezxml_close_tag(root, d, s);
542 }
543 else if ((q = *s) == '>' || (! *s && e == '>')) { // open tag
544 *s = '\0'; // temporarily null terminate tag name
545 ezxml_open_tag(root, d, attr);
546 *s = q;
547 }
548 else {
549 if (l) ezxml_free_attr(attr);
550 return ezxml_err(root, d, "missing >");
551 }
552 }
553 else if (*s == '/') { // close tag
554 s += strcspn(d = s + 1, EZXML_WS ">") + 1;
555 if (! (q = *s) && e != '>') return ezxml_err(root, d, "missing >");
556 *s = '\0'; // temporarily null terminate tag name
557 if (ezxml_close_tag(root, d, s)) return &root->xml;
558 if (isspace(*s = q)) s += strspn(s, EZXML_WS);
559 }
560 else if (! strncmp(s, "!--", 3)) { // xml comment
561 if (! (s = strstr(s + 3, "--")) || (*(s += 2) != '>' && *s) ||
562 (! *s && e != '>')) return ezxml_err(root, d, "unclosed <!--");
563 }
564 else if (! strncmp(s, "![CDATA[", 8)) { // cdata
565 if ((s = strstr(s, "]]>")))
566 ezxml_char_content(root, d + 8, (s += 2) - d - 10, 'c');
567 else return ezxml_err(root, d, "unclosed <![CDATA[");
568 }
569 else if (! strncmp(s, "!DOCTYPE", 8)) { // dtd
570 for (l = 0; *s && ((! l && *s != '>') || (l && (*s != ']' ||
571 *(s + strspn(s + 1, EZXML_WS) + 1) != '>')));
572 l = (*s == '[') ? 1 : l) s += strcspn(s + 1, "[]>") + 1;
573 if (! *s && e != '>')
574 return ezxml_err(root, d, "unclosed <!DOCTYPE");
575 d = (l) ? strchr(d, '[') + 1 : d;
576 if (l && ! ezxml_internal_dtd(root, d, s++ - d)) return &root->xml;
577 }
578 else if (*s == '?') { // <?...?> processing instructions
579 do { s = strchr(s, '?'); } while (s && *(++s) && *s != '>');
580 if (! s || (! *s && e != '>'))
581 return ezxml_err(root, d, "unclosed <?");
582 else ezxml_proc_inst(root, d + 1, s - d - 2);
583 }
584 else return ezxml_err(root, d, "unexpected <");
585
586 if (! s || ! *s) break;
587 *s = '\0';
588 d = ++s;
589 if (*s && *s != '<') { // tag character content
590 while (*s && *s != '<') s++;
591 if (*s) ezxml_char_content(root, d, s - d, '&');
592 else break;
593 }
594 else if (! *s) break;
595 }
596
597 if (! root->cur) return &root->xml;
598 else if (! root->cur->name) return ezxml_err(root, d, "root tag missing");
599 else return ezxml_err(root, d, "unclosed tag <%s>", root->cur->name);
600 }
601
602 // Wrapper for ezxml_parse_str() that accepts a file stream. Reads the entire
603 // stream into memory and then parses it. For xml files, use ezxml_parse_file()
604 // or ezxml_parse_fd()
605 ezxml_t ezxml_parse_fp(FILE *fp)
606 {
607 ezxml_root_t root;
608 size_t l, len = 0;
609 char *s;
610
611 if (! (s = malloc(EZXML_BUFSIZE))) return NULL;
612 do {
613 len += (l = fread((s + len), 1, EZXML_BUFSIZE, fp));
614 if (l == EZXML_BUFSIZE) s = realloc(s, len + EZXML_BUFSIZE);
615 } while (s && l == EZXML_BUFSIZE);
616
617 if (! s) return NULL;
618 root = (ezxml_root_t)ezxml_parse_str(s, len);
619 root->len = -1; // so we know to free s in ezxml_free()
620 return &root->xml;
621 }
622
623 // A wrapper for ezxml_parse_str() that accepts a file descriptor. First
624 // attempts to mem map the file. Failing that, reads the file into memory.
625 // Returns NULL on failure.
626 ezxml_t ezxml_parse_fd(int fd)
627 {
628 ezxml_root_t root;
629 struct stat st;
630 size_t l;
631 void *m;
632
633 if (fd < 0) return NULL;
634 fstat(fd, &st);
635
636 #ifndef EZXML_NOMMAP
637 l = (st.st_size + sysconf(_SC_PAGESIZE) - 1) & ~(sysconf(_SC_PAGESIZE) -1);
638 if ((m = mmap(NULL, l, PROT_READ | PROT_WRITE, MAP_PRIVATE, fd, 0)) !=
639 MAP_FAILED) {
640 madvise(m, l, MADV_SEQUENTIAL); // optimize for sequential access
641 root = (ezxml_root_t)ezxml_parse_str(m, st.st_size);
642 madvise(m, root->len = l, MADV_NORMAL); // put it back to normal
643 }
644 else { // mmap failed, read file into memory
645 #endif // EZXML_NOMMAP
646 l = read(fd, m = malloc(st.st_size), st.st_size);
647 root = (ezxml_root_t)ezxml_parse_str(m, l);
648 root->len = -1; // so we know to free s in ezxml_free()
649 #ifndef EZXML_NOMMAP
650 }
651 #endif // EZXML_NOMMAP
652 return &root->xml;
653 }
654
655 // a wrapper for ezxml_parse_fd that accepts a file name
656 ezxml_t ezxml_parse_file(const char *file)
657 {
658 int fd = open(file, O_RDONLY, 0);
659 ezxml_t xml = ezxml_parse_fd(fd);
660
661 if (fd >= 0) close(fd);
662 return xml;
663 }
664
665 // Encodes ampersand sequences appending the results to *dst, reallocating *dst
666 // if length excedes max. a is non-zero for attribute encoding. Returns *dst
667 char *ezxml_ampencode(const char *s, size_t len, char **dst, size_t *dlen,
668 size_t *max, short a)
669 {
670 const char *e;
671
672 for (e = s + len; s != e; s++) {
673 while (*dlen + 10 > *max) *dst = realloc(*dst, *max += EZXML_BUFSIZE);
674
675 switch (*s) {
676 case '\0': return *dst;
677 case '&': *dlen += sprintf(*dst + *dlen, "&amp;"); break;
678 case '<': *dlen += sprintf(*dst + *dlen, "&lt;"); break;
679 case '>': *dlen += sprintf(*dst + *dlen, "&gt;"); break;
680 case '"': *dlen += sprintf(*dst + *dlen, (a) ? "&quot;" : "\""); break;
681 case '\n': *dlen += sprintf(*dst + *dlen, (a) ? "&#xA;" : "\n"); break;
682 case '\t': *dlen += sprintf(*dst + *dlen, (a) ? "&#x9;" : "\t"); break;
683 case '\r': *dlen += sprintf(*dst + *dlen, "&#xD;"); break;
684 default: (*dst)[(*dlen)++] = *s;
685 }
686 }
687 return *dst;
688 }
689
690 // Recursively converts each tag to xml appending it to *s. Reallocates *s if
691 // its length excedes max. start is the location of the previous tag in the
692 // parent tag's character content. Returns *s.
693 char *ezxml_toxml_r(ezxml_t xml, char **s, size_t *len, size_t *max,
694 size_t start, char ***attr)
695 {
696 int i, j;
697 char *txt = (xml->parent) ? xml->parent->txt : "";
698 size_t off = 0;
699
700 // parent character content up to this tag
701 *s = ezxml_ampencode(txt + start, xml->off - start, s, len, max, 0);
702
703 while (*len + strlen(xml->name) + 4 > *max) // reallocate s
704 *s = realloc(*s, *max += EZXML_BUFSIZE);
705
706 *len += sprintf(*s + *len, "<%s", xml->name); // open tag
707 for (i = 0; xml->attr[i]; i += 2) { // tag attributes
708 if (ezxml_attr(xml, xml->attr[i]) != xml->attr[i + 1]) continue;
709 while (*len + strlen(xml->attr[i]) + 7 > *max) // reallocate s
710 *s = realloc(*s, *max += EZXML_BUFSIZE);
711
712 *len += sprintf(*s + *len, " %s=\"", xml->attr[i]);
713 ezxml_ampencode(xml->attr[i + 1], -1, s, len, max, 1);
714 *len += sprintf(*s + *len, "\"");
715 }
716
717 for (i = 0; attr[i] && strcmp(attr[i][0], xml->name); i++);
718 for (j = 1; attr[i] && attr[i][j]; j += 3) { // default attributes
719 if (! attr[i][j + 1] || ezxml_attr(xml, attr[i][j]) != attr[i][j + 1])
720 continue; // skip duplicates and non-values
721 while (*len + strlen(attr[i][j]) + 7 > *max) // reallocate s
722 *s = realloc(*s, *max += EZXML_BUFSIZE);
723
724 *len += sprintf(*s + *len, " %s=\"", attr[i][j]);
725 ezxml_ampencode(attr[i][j + 1], -1, s, len, max, 1);
726 *len += sprintf(*s + *len, "\"");
727 }
728 *len += sprintf(*s + *len, ">");
729
730 *s = (xml->child) ? ezxml_toxml_r(xml->child, s, len, max, 0, attr) //child
731 : ezxml_ampencode(xml->txt, -1, s, len, max, 0); //data
732
733 while (*len + strlen(xml->name) + 4 > *max) // reallocate s
734 *s = realloc(*s, *max += EZXML_BUFSIZE);
735
736 *len += sprintf(*s + *len, "</%s>", xml->name); // close tag
737
738 while (txt[off] && off < xml->off) off++; // make sure off is within bounds
739 return (xml->ordered) ? ezxml_toxml_r(xml->ordered, s, len, max, off, attr)
740 : ezxml_ampencode(txt + off, -1, s, len, max, 0);
741 }
742
743 // Converts an ezxml structure back to xml. Returns a string of xml data that
744 // must be freed.
745 char *ezxml_toxml(ezxml_t xml)
746 {
747 ezxml_t p = (xml) ? xml->parent : NULL, o = (xml) ? xml->ordered : NULL;
748 ezxml_root_t root = (ezxml_root_t)xml;
749 size_t len = 0, max = EZXML_BUFSIZE;
750 char *s = strcpy(malloc(max), ""), *t, *n;
751 int i, j, k;
752
753 if (! xml || ! xml->name) return realloc(s, len + 1);
754 while (root->xml.parent) root = (ezxml_root_t)root->xml.parent; // root tag
755
756 for (i = 0; ! p && root->pi[i]; i++) { // pre-root processing instructions
757 for (k = 2; root->pi[i][k - 1]; k++);
758 for (j = 1; (n = root->pi[i][j]); j++) {
759 if (root->pi[i][k][j - 1] == '>') continue; // not pre-root
760 while (len + strlen(t = root->pi[i][0]) + strlen(n) + 7 > max)
761 s = realloc(s, max += EZXML_BUFSIZE);
762 len += sprintf(s + len, "<?%s%s%s?>\n", t, *n ? " " : "", n);
763 }
764 }
765
766 xml->parent = xml->ordered = NULL;
767 s = ezxml_toxml_r(xml, &s, &len, &max, 0, root->attr);
768 xml->parent = p;
769 xml->ordered = o;
770
771 for (i = 0; ! p && root->pi[i]; i++) { // post-root processing instructions
772 for (k = 2; root->pi[i][k - 1]; k++);
773 for (j = 1; (n = root->pi[i][j]); j++) {
774 if (root->pi[i][k][j - 1] == '<') continue; // not post-root
775 while (len + strlen(t = root->pi[i][0]) + strlen(n) + 7 > max)
776 s = realloc(s, max += EZXML_BUFSIZE);
777 len += sprintf(s + len, "\n<?%s%s%s?>", t, *n ? " " : "", n);
778 }
779 }
780 return realloc(s, len + 1);
781 }
782
783 // free the memory allocated for the ezxml structure
784 void ezxml_free(ezxml_t xml)
785 {
786 ezxml_root_t root = (ezxml_root_t)xml;
787 int i, j;
788 char **a, *s;
789
790 if (! xml) return;
791 ezxml_free(xml->child);
792 ezxml_free(xml->ordered);
793
794 if (! xml->parent) { // free root tag allocations
795 for (i = 10; root->ent[i]; i += 2) // 0 - 9 are default entites (<>&"')
796 if ((s = root->ent[i + 1]) < root->s || s > root->e) free(s);
797 free(root->ent); // free list of general entities
798
799 for (i = 0; (a = root->attr[i]); i++) {
800 for (j = 1; a[j++]; j += 2) // free malloced attribute values
801 if (a[j] && (a[j] < root->s || a[j] > root->e)) free(a[j]);
802 free(a);
803 }
804 if (root->attr[0]) free(root->attr); // free default attribute list
805
806 for (i = 0; root->pi[i]; i++) {
807 for (j = 1; root->pi[i][j]; j++);
808 free(root->pi[i][j + 1]);
809 free(root->pi[i]);
810 }
811 if (root->pi[0]) free(root->pi); // free processing instructions
812
813 if (root->len == -1) free(root->m); // malloced xml data
814 #ifndef EZXML_NOMMAP
815 else if (root->len) munmap(root->m, root->len); // mem mapped xml data
816 #endif // EZXML_NOMMAP
817 if (root->u) free(root->u); // utf8 conversion
818 }
819
820 ezxml_free_attr(xml->attr); // tag attributes
821 if ((xml->flags & EZXML_TXTM)) free(xml->txt); // character content
822 if ((xml->flags & EZXML_NAMEM)) free(xml->name); // tag name
823 free(xml);
824 }
825
826 // return parser error message or empty string if none
827 const char *ezxml_error(ezxml_t xml)
828 {
829 while (xml && xml->parent) xml = xml->parent; // find root tag
830 return (xml) ? ((ezxml_root_t)xml)->err : "";
831 }
832
833 // returns a new empty ezxml structure with the given root tag name
834 ezxml_t ezxml_new(const char *name)
835 {
836 static char *ent[] = { "lt;", "&#60;", "gt;", "&#62;", "quot;", "&#34;",
837 "apos;", "&#39;", "amp;", "&#38;", NULL };
838 ezxml_root_t root = (ezxml_root_t)memset(malloc(sizeof(struct ezxml_root)),
839 '\0', sizeof(struct ezxml_root));
840 root->xml.name = (char *)name;
841 root->cur = &root->xml;
842 strcpy(root->err, root->xml.txt = "");
843 root->ent = memcpy(malloc(sizeof(ent)), ent, sizeof(ent));
844 root->attr = root->pi = (char ***)(root->xml.attr = EZXML_NIL);
845 return &root->xml;
846 }
847
848 // inserts an existing tag into an ezxml structure
849 ezxml_t ezxml_insert(ezxml_t xml, ezxml_t dest, size_t off)
850 {
851 ezxml_t cur, prev, head;
852
853 xml->next = xml->sibling = xml->ordered = NULL;
854 xml->off = off;
855 xml->parent = dest;
856
857 if ((head = dest->child)) { // already have sub tags
858 if (head->off <= off) { // not first subtag
859 for (cur = head; cur->ordered && cur->ordered->off <= off;
860 cur = cur->ordered);
861 xml->ordered = cur->ordered;
862 cur->ordered = xml;
863 }
864 else { // first subtag
865 xml->ordered = head;
866 dest->child = xml;
867 }
868
869 for (cur = head, prev = NULL; cur && strcmp(cur->name, xml->name);
870 prev = cur, cur = cur->sibling); // find tag type
871 if (cur && cur->off <= off) { // not first of type
872 while (cur->next && cur->next->off <= off) cur = cur->next;
873 xml->next = cur->next;
874 cur->next = xml;
875 }
876 else { // first tag of this type
877 if (prev && cur) prev->sibling = cur->sibling; // remove old first
878 xml->next = cur; // old first tag is now next
879 for (cur = head, prev = NULL; cur && cur->off <= off;
880 prev = cur, cur = cur->sibling); // new sibling insert point
881 xml->sibling = cur;
882 if (prev) prev->sibling = xml;
883 }
884 }
885 else dest->child = xml; // only sub tag
886
887 return xml;
888 }
889
890 // Adds a child tag. off is the offset of the child tag relative to the start
891 // of the parent tag's character content. Returns the child tag.
892 ezxml_t ezxml_add_child(ezxml_t xml, const char *name, size_t off)
893 {
894 ezxml_t child;
895
896 if (! xml) return NULL;
897 child = (ezxml_t)memset(malloc(sizeof(struct ezxml)), '\0',
898 sizeof(struct ezxml));
899 child->name = (char *)name;
900 child->attr = EZXML_NIL;
901 child->txt = "";
902
903 return ezxml_insert(child, xml, off);
904 }
905
906 // sets the character content for the given tag and returns the tag
907 ezxml_t ezxml_set_txt(ezxml_t xml, const char *txt)
908 {
909 if (! xml) return NULL;
910 if (xml->flags & EZXML_TXTM) free(xml->txt); // existing txt was malloced
911 xml->flags &= ~EZXML_TXTM;
912 xml->txt = (char *)txt;
913 return xml;
914 }
915
916 // Sets the given tag attribute or adds a new attribute if not found. A value
917 // of NULL will remove the specified attribute. Returns the tag given.
918 ezxml_t ezxml_set_attr(ezxml_t xml, const char *name, const char *value)
919 {
920 int l = 0, c;
921
922 if (! xml) return NULL;
923 while (xml->attr[l] && strcmp(xml->attr[l], name)) l += 2;
924 if (! xml->attr[l]) { // not found, add as new attribute
925 if (! value) return xml; // nothing to do
926 if (xml->attr == EZXML_NIL) { // first attribute
927 xml->attr = malloc(4 * sizeof(char *));
928 xml->attr[1] = strdup(""); // empty list of malloced names/vals
929 }
930 else xml->attr = realloc(xml->attr, (l + 4) * sizeof(char *));
931
932 xml->attr[l] = (char *)name; // set attribute name
933 xml->attr[l + 2] = NULL; // null terminate attribute list
934 xml->attr[l + 3] = realloc(xml->attr[l + 1],
935 (c = strlen(xml->attr[l + 1])) + 2);
936 strcpy(xml->attr[l + 3] + c, " "); // set name/value as not malloced
937 if (xml->flags & EZXML_DUP) xml->attr[l + 3][c] = EZXML_NAMEM;
938 }
939 else if (xml->flags & EZXML_DUP) free((char *)name); // name was strduped
940
941 for (c = l; xml->attr[c]; c += 2); // find end of attribute list
942 if (xml->attr[c + 1][l / 2] & EZXML_TXTM) free(xml->attr[l + 1]); //old val
943 if (xml->flags & EZXML_DUP) xml->attr[c + 1][l / 2] |= EZXML_TXTM;
944 else xml->attr[c + 1][l / 2] &= ~EZXML_TXTM;
945
946 if (value) xml->attr[l + 1] = (char *)value; // set attribute value
947 else { // remove attribute
948 if (xml->attr[c + 1][l / 2] & EZXML_NAMEM) free(xml->attr[l]);
949 memmove(xml->attr + l, xml->attr + l + 2, (c - l + 2) * sizeof(char*));
950 xml->attr = realloc(xml->attr, (c + 2) * sizeof(char *));
951 memmove(xml->attr[c + 1] + (l / 2), xml->attr[c + 1] + (l / 2) + 1,
952 (c / 2) - (l / 2)); // fix list of which name/vals are malloced
953 }
954 xml->flags &= ~EZXML_DUP; // clear strdup() flag
955 return xml;
956 }
957
958 // sets a flag for the given tag and returns the tag
959 ezxml_t ezxml_set_flag(ezxml_t xml, short flag)
960 {
961 if (xml) xml->flags |= flag;
962 return xml;
963 }
964
965 // removes a tag along with its subtags without freeing its memory
966 ezxml_t ezxml_cut(ezxml_t xml)
967 {
968 ezxml_t cur;
969
970 if (! xml) return NULL; // nothing to do
971 if (xml->next) xml->next->sibling = xml->sibling; // patch sibling list
972
973 if (xml->parent) { // not root tag
974 cur = xml->parent->child; // find head of subtag list
975 if (cur == xml) xml->parent->child = xml->ordered; // first subtag
976 else { // not first subtag
977 while (cur->ordered != xml) cur = cur->ordered;
978 cur->ordered = cur->ordered->ordered; // patch ordered list
979
980 cur = xml->parent->child; // go back to head of subtag list
981 if (strcmp(cur->name, xml->name)) { // not in first sibling list
982 while (strcmp(cur->sibling->name, xml->name))
983 cur = cur->sibling;
984 if (cur->sibling == xml) { // first of a sibling list
985 cur->sibling = (xml->next) ? xml->next
986 : cur->sibling->sibling;
987 }
988 else cur = cur->sibling; // not first of a sibling list
989 }
990
991 while (cur->next && cur->next != xml) cur = cur->next;
992 if (cur->next) cur->next = cur->next->next; // patch next list
993 }
994 }
995 xml->ordered = xml->sibling = xml->next = NULL;
996 return xml;
997 }
998
999 #ifdef EZXML_TEST // test harness
1000 int main(int argc, char **argv)
1001 {
1002 ezxml_t xml;
1003 char *s;
1004 int i;
1005
1006 if (argc != 2) return fprintf(stderr, "usage: %s xmlfile\n", argv[0]);
1007
1008 xml = ezxml_parse_file(argv[1]);
1009 printf("%s\n", (s = ezxml_toxml(xml)));
1010 free(s);
1011 i = fprintf(stderr, "%s", ezxml_error(xml));
1012 ezxml_free(xml);
1013 return (i) ? 1 : 0;
1014 }
1015 #endif // EZXML_TEST
File builders/mesa-vulkan-0/contrib/ezxml/ezxml.h deleted (index 3e02078..0000000)
1 /* ezxml.h
2 *
3 * Copyright 2004-2006 Aaron Voisine <aaron@voisine.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
20 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #ifndef _EZXML_H
26 #define _EZXML_H
27
28 #include <stdlib.h>
29 #include <stdio.h>
30 #include <stdarg.h>
31 #include <fcntl.h>
32
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36
37 #define EZXML_BUFSIZE 1024 // size of internal memory buffers
38 #define EZXML_NAMEM 0x80 // name is malloced
39 #define EZXML_TXTM 0x40 // txt is malloced
40 #define EZXML_DUP 0x20 // attribute name and value are strduped
41
42 typedef struct ezxml *ezxml_t;
43 struct ezxml {
44 char *name; // tag name
45 char **attr; // tag attributes { name, value, name, value, ... NULL }
46 char *txt; // tag character content, empty string if none
47 size_t off; // tag offset from start of parent tag character content
48 ezxml_t next; // next tag with same name in this section at this depth
49 ezxml_t sibling; // next tag with different name in same section and depth
50 ezxml_t ordered; // next tag, same section and depth, in original order
51 ezxml_t child; // head of sub tag list, NULL if none
52 ezxml_t parent; // parent tag, NULL if current tag is root tag
53 short flags; // additional information
54 };
55
56 // Given a string of xml data and its length, parses it and creates an ezxml
57 // structure. For efficiency, modifies the data by adding null terminators
58 // and decoding ampersand sequences. If you don't want this, copy the data and
59 // pass in the copy. Returns NULL on failure.
60 ezxml_t ezxml_parse_str(char *s, size_t len);
61
62 // A wrapper for ezxml_parse_str() that accepts a file descriptor. First
63 // attempts to mem map the file. Failing that, reads the file into memory.
64 // Returns NULL on failure.
65 ezxml_t ezxml_parse_fd(int fd);
66
67 // a wrapper for ezxml_parse_fd() that accepts a file name
68 ezxml_t ezxml_parse_file(const char *file);
69
70 // Wrapper for ezxml_parse_str() that accepts a file stream. Reads the entire
71 // stream into memory and then parses it. For xml files, use ezxml_parse_file()
72 // or ezxml_parse_fd()
73 ezxml_t ezxml_parse_fp(FILE *fp);
74
75 // returns the first child tag (one level deeper) with the given name or NULL
76 // if not found
77 ezxml_t ezxml_child(ezxml_t xml, const char *name);
78
79 // returns the next tag of the same name in the same section and depth or NULL
80 // if not found
81 #define ezxml_next(xml) ((xml) ? xml->next : NULL)
82
83 // Returns the Nth tag with the same name in the same section at the same depth
84 // or NULL if not found. An index of 0 returns the tag given.
85 ezxml_t ezxml_idx(ezxml_t xml, int idx);
86
87 // returns the name of the given tag
88 #define ezxml_name(xml) ((xml) ? xml->name : NULL)
89
90 // returns the given tag's character content or empty string if none
91 #define ezxml_txt(xml) ((xml) ? xml->txt : "")
92
93 // returns the value of the requested tag attribute, or NULL if not found
94 const char *ezxml_attr(ezxml_t xml, const char *attr);
95
96 // Traverses the ezxml sturcture to retrieve a specific subtag. Takes a
97 // variable length list of tag names and indexes. The argument list must be
98 // terminated by either an index of -1 or an empty string tag name. Example:
99 // title = ezxml_get(library, "shelf", 0, "book", 2, "title", -1);
100 // This retrieves the title of the 3rd book on the 1st shelf of library.
101 // Returns NULL if not found.
102 ezxml_t ezxml_get(ezxml_t xml, ...);
103
104 // Converts an ezxml structure back to xml. Returns a string of xml data that
105 // must be freed.
106 char *ezxml_toxml(ezxml_t xml);
107
108 // returns a NULL terminated array of processing instructions for the given
109 // target
110 const char **ezxml_pi(ezxml_t xml, const char *target);
111
112 // frees the memory allocated for an ezxml structure
113 void ezxml_free(ezxml_t xml);
114
115 // returns parser error message or empty string if none
116 const char *ezxml_error(ezxml_t xml);
117
118 // returns a new empty ezxml structure with the given root tag name
119 ezxml_t ezxml_new(const char *name);
120
121 // wrapper for ezxml_new() that strdup()s name
122 #define ezxml_new_d(name) ezxml_set_flag(ezxml_new(strdup(name)), EZXML_NAMEM)
123
124 // Adds a child tag. off is the offset of the child tag relative to the start
125 // of the parent tag's character content. Returns the child tag.
126 ezxml_t ezxml_add_child(ezxml_t xml, const char *name, size_t off);
127
128 // wrapper for ezxml_add_child() that strdup()s name
129 #define ezxml_add_child_d(xml, name, off) \
130 ezxml_set_flag(ezxml_add_child(xml, strdup(name), off), EZXML_NAMEM)
131
132 // sets the character content for the given tag and returns the tag
133 ezxml_t ezxml_set_txt(ezxml_t xml, const char *txt);
134
135 // wrapper for ezxml_set_txt() that strdup()s txt
136 #define ezxml_set_txt_d(xml, txt) \
137 ezxml_set_flag(ezxml_set_txt(xml, strdup(txt)), EZXML_TXTM)
138
139 // Sets the given tag attribute or adds a new attribute if not found. A value
140 // of NULL will remove the specified attribute. Returns the tag given.
141 ezxml_t ezxml_set_attr(ezxml_t xml, const char *name, const char *value);
142
143 // Wrapper for ezxml_set_attr() that strdup()s name/value. Value cannot be NULL
144 #define ezxml_set_attr_d(xml, name, value) \
145 ezxml_set_attr(ezxml_set_flag(xml, EZXML_DUP), strdup(name), strdup(value))
146
147 // sets a flag for the given tag and returns the tag
148 ezxml_t ezxml_set_flag(ezxml_t xml, short flag);
149
150 // removes a tag along with its subtags without freeing its memory
151 ezxml_t ezxml_cut(ezxml_t xml);
152
153 // inserts an existing tag into an ezxml structure
154 ezxml_t ezxml_insert(ezxml_t xml, ezxml_t dest, size_t off);
155
156 // Moves an existing tag to become a subtag of dest at the given offset from
157 // the start of dest's character content. Returns the moved tag.
158 #define ezxml_move(xml, dest, off) ezxml_insert(ezxml_cut(xml), dest, off)
159
160 // removes a tag along with all its subtags
161 #define ezxml_remove(xml) ezxml_free(ezxml_cut(xml))
162
163 #ifdef __cplusplus
164 }
165 #endif
166
167 #endif // _EZXML_H
File builders/mesa-vulkan-0/contrib/ezxml/ezxml.html deleted (index 6c17852..0000000)
1 <!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN"
2 "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
3 <html xmlns="http://www.w3.org/1999/xhtml">
4 <head><title>ezXML</title></head>
5 <body>
6 <h1>ezXML - XML Parsing C Library</h1>
7 <h3>version 0.8.6</h3>
8 <p>
9 ezXML is a C library for parsing XML documents inspired by
10 <a href="http://www.php.net/SimpleXML">simpleXML</a> for
11 PHP. As the name implies, it's easy to use. It's ideal for parsing XML
12 configuration files or REST web service responses. It's also fast and
13 lightweight (less than 20k compiled). The latest version is available
14 here:
15 <a href="http://prdownloads.sf.net/ezxml/ezxml-0.8.6.tar.gz?download"
16 >ezxml-0.8.6.tar.gz</a>
17 </p>
18
19 <b>Example Usage</b>
20 <p>
21 Given the following example XML document:
22 </p>
23 <code>
24 &lt;?xml version="1.0"?&gt;<br />
25 &lt;formula1&gt;<br />
26 &nbsp;&nbsp;&lt;team name="McLaren"&gt;<br />
27 &nbsp;&nbsp;&nbsp;&nbsp;&lt;driver&gt;<br />
28 &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&lt;name&gt;Kimi
29 Raikkonen&lt;/name&gt;<br />
30 &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&lt;points&gt;112&lt;/points&gt;<br />
31 &nbsp;&nbsp;&nbsp;&nbsp;&lt;/driver&gt;<br />
32 &nbsp;&nbsp;&nbsp;&nbsp;&lt;driver&gt;<br />
33 &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&lt;name&gt;Juan Pablo
34 Montoya&lt;/name&gt;<br />
35 &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&lt;points&gt;60&lt;/points&gt;<br />
36 &nbsp;&nbsp;&nbsp;&nbsp;&lt;/driver&gt;<br />
37 &nbsp;&nbsp;&lt;/team&gt;<br />
38 &lt;/formula1&gt;
39 </code>
40 <p>
41 This code snippet prints out a list of drivers, which team they drive for,
42 and how many championship points they have:
43 </p>
44 <code>
45 ezxml_t f1 = ezxml_parse_file("formula1.xml"), team, driver;<br />
46 const char *teamname;<br />
47 &nbsp;<br />
48 for (team = ezxml_child(f1, "team"); team; team = team->next) {<br />
49 &nbsp;&nbsp;&nbsp;&nbsp;teamname = ezxml_attr(team, "name");<br />
50 &nbsp;&nbsp;&nbsp;&nbsp;for (driver = ezxml_child(team, "driver"); driver;
51 driver = driver->next) {<br />
52 &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;printf("%s, %s: %s\n",
53 ezxml_child(driver, "name")->txt, teamname,<br />
54 &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
55 &nbsp;&nbsp;ezxml_child(driver, "points")->txt);<br />
56 &nbsp;&nbsp;&nbsp;&nbsp;}<br />
57 }<br />
58 ezxml_free(f1);
59 </code>
60 <p>
61 Alternately, the following would print out the name of the second driver
62 on the first team:
63 </p>
64 <code>
65 ezxml_t f1 = ezxml_parse_file("formula1.xml");<br />
66 &nbsp;<br />
67 printf("%s\n", ezxml_get(f1, "team", 0, "driver", 1, "name", -1)->txt);
68 <br />ezxml_free(f1);
69 </code>
70 <p>
71 The -1 indicates the end of the argument list. That's pretty much all
72 there is to it. Complete API documentation can be found in ezxml.h.
73 </p>
74
75 <b>Known Limitations</b>
76 <ul>
77 <li>
78 ezXML is not a validating parser.
79 <br />&nbsp;
80 </li>
81 <li>
82 Loads the entire XML document into memory at once and does not allow for
83 documents to be passed in a chunk at a time. Large XML files can still
84 be handled though through <code>ezxml_parse_file()</code> and
85 <code>ezxml_parse_fd()</code>, which use mmap to map the file to a
86 virtual address space and rely on the virtual memory system to page in
87 data as needed.
88 <br />&nbsp;
89 </li>
90 <li>
91 Does not currently recognize all possible well-formedness errors. It
92 should correctly handle all well-formed XML documents and will either
93 ignore or halt XML processing on well-formedness errors. More
94 well-formedness checking will be added in subsiquent releases.
95 <br />&nbsp;
96 </li>
97 <li>
98 In making the character content of tags easy to access, there is no
99 way provided to keep track of the location of sub tags relative to the
100 character data. Example:
101 <p>
102 <code>&lt;doc&gt;line one&lt;br/&gt;<br />line two&lt;/doc&gt;</code>
103 </p>
104 <p>
105 The character content of the doc tag is reported as
106 <code>"line one\nline two"</code>, and <code>&lt;br/&gt;</code> is
107 reported as a sub tag, but the location of <code>&lt;br/&gt;</code>
108 within the character data is not. The function
109 <code>ezxml_toxml()</code> will convert an ezXML structure back to XML
110 with sub tag locations intact.
111 </p>
112 </li>
113 </ul>
114
115 <b>Licensing</b>
116 <p>
117 ezXML was written by Aaron Voisine and is distributed under the terms of
118 the <a href="license.txt">MIT license</a>.
119 </p>
120 </body>
121 </html>
File builders/mesa-vulkan-0/contrib/ezxml/ezxml.txt deleted (index 1dcd5ad..0000000)
1 ezXML - XML Parsing C Library
2 version 0.8.5
3
4 ezXML is a C library for parsing XML documents inspired by simpleXML for PHP.
5 As the name implies, it's easy to use. It's ideal for parsing XML configuration
6 files or REST web service responses. It's also fast and lightweight (less than
7 20k compiled). The latest verions is available here:
8 http://prdownloads.sf.net/ezxml/ezxml-0.8.6.tar.gz?download
9
10 Example Usage
11
12 Given the following example XML document:
13
14 <?xml version="1.0"?>
15 <formula1>
16 <team name="McLaren">
17 <driver>
18 <name>Kimi Raikkonen</name>
19 <points>112</points>
20 </driver>
21 <driver>
22 <name>Juan Pablo Montoya</name>
23 <points>60</points>
24 </driver>
25 </team>
26 </formula1>
27
28 This code snippet prints out a list of drivers, which team they drive for,
29 and how many championship points they have:
30
31 ezxml_t f1 = ezxml_parse_file("formula1.xml"), team, driver;
32 const char *teamname;
33
34 for (team = ezxml_child(f1, "team"); team; team = team->next) {
35 teamname = ezxml_attr(team, "name");
36 for (driver = ezxml_child(team, "driver"); driver; driver = driver->next) {
37 printf("%s, %s: %s\n", ezxml_child(driver, "name")->txt, teamname,
38 ezxml_child(driver, "points")->txt);
39 }
40 }
41 ezxml_free(f1);
42
43 Alternately, the following would print out the name of the second driver on the
44 first team:
45
46 ezxml_t f1 = ezxml_parse_file("formula1.xml");
47
48 printf("%s\n", ezxml_get(f1, "team", 0, "driver", 1, "name", -1)->txt);
49 ezxml_free(f1);
50
51 The -1 indicates the end of the argument list. That's pretty much all
52 there is to it. Complete API documentation can be found in ezxml.h.
53
54 Known Limitations
55
56 - ezXML is not a validating parser
57
58 - Loads the entire XML document into memory at once and does not allow for
59 documents to be passed in a chunk at a time. Large XML files can still be
60 handled though through ezxml_parse_file() and ezxml_parse_fd(), which use mmap
61 to map the file to a virtual address space and rely on the virtual memory
62 system to page in data as needed.
63
64 - Does not currently recognize all possible well-formedness errors. It should
65 correctly handle all well-formed XML documents and will either ignore or halt
66 XML processing on well-formedness errors. More well-formedness checking will
67 be added in subsiquent releases.
68
69 - In making the character content of tags easy to access, there is no way
70 provided to keep track of the location of sub tags relative to the character
71 data. Example:
72
73 <doc>line one<br/>
74 line two</doc>
75
76 The character content of the doc tag is reported as "line one\nline two", and
77 <br/> is reported as a sub tag, but the location of <br/> within the
78 character data is not. The function ezxml_toxml() will convert an ezXML
79 structure back to XML with sub tag locations intact.
80
81 Licensing
82
83 ezXML was written by Aaron Voisine <aaron@voisine.org> and is distributed under
84 the terms of the MIT license, described in license.txt.
File builders/mesa-vulkan-0/contrib/ezxml/license.txt deleted (index 80e4e88..0000000)
1 Copyright 2004-2006 Aaron Voisine <aaron@voisine.org>
2
3 Permission is hereby granted, free of charge, to any person obtaining
4 a copy of this software and associated documentation files (the
5 "Software"), to deal in the Software without restriction, including
6 without limitation the rights to use, copy, modify, merge, publish,
7 distribute, sublicense, and/or sell copies of the Software, and to
8 permit persons to whom the Software is furnished to do so, subject to
9 the following conditions:
10
11 The above copyright notice and this permission notice shall be included
12 in all copies or substantial portions of the Software.
13
14 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
16 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
17 IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
18 CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
19 TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
20 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
File builders/mesa-vulkan-0/contrib/generators/gen_enum_to_str.deprecated/gen_enum_to_str.c deleted (index 8b69c3c..0000000)
1 #define _GNU_SOURCE
2 #include <sys/stat.h>
3
4 #include <stdio.h>
5 #include <string.h>
6 #include <fcntl.h>
7 #include <stdlib.h>
8 #include <stdbool.h>
9
10 #include "ezxml.h"
11
12 /*
13 * we don't care about memory management
14 * we don't care about global variables
15 * something is not expected:
16 * - corrupted generation
17 * - more likely a crash (good!)
18 */
19
20 /*
21 * attr(s): attribute(s)
22 * enum(s): enumeration(s)
23 * XXX:DO NOT BE MISLEAD-->HERE XML "ENUM" ARE NOT RELATED
24 * IN ANY WAY TO C ENUM.
25 * ABBREVIATIONS:
26 * e: Epilogue
27 * fd: File Descriptor
28 * p: Prologue
29 * str(s): STRing(s)
30 */
31
32 /* do fix C */
33 #define loop for(;;)
34 /* #define char u8 */
35
36 #define ERR(fmt, ...) dprintf(2,fmt,##__VA_ARGS__)
37 #define INFO(fmt, ...) dprintf(2,fmt,##__VA_ARGS__)
38
39 /*
40 * ezxml_t is a pointer... typedef has really nothing to do in C, *REALLY*!!
41 *
42 * tag hierarchy, in order:
43 * platforms
44 * platform+
45 * tags
46 * tag+
47 * types
48 * type+
49 * enums+
50 * enum+
51 * commands
52 * command+
53 * feature+ (basically 2 features, vulkan 1.0 and vulkan 1.1)
54 * extensions
55 * extension+
56 * require+
57 * enum+
58 */
59
60 /* major uniq tags */
61 static ezxml_t registry;
62 static ezxml_t registry_platforms;
63 static ezxml_t registry_commands;
64 static ezxml_t registry_extensions;
65
66 static int fd_h; /* file descriptor for vk_enum_to_str.h */
67 static int fd_c; /* file descriptor for vk_enum_to_str.c */
68
69 /* enough or unreasonable */
70 static char path[1024];
71
72 /*============================================================================*/
73 /* vk_enum_to_str.h template */
74 static char *h_p = "\
75 #ifndef MESA_VK_ENUM_TO_STR_H\n\
76 #define MESA_VK_ENUM_TO_STR_H\n\n\
77 #include <vulkan/vulkan.h>\n\
78 #include <vulkan/vk_android_native_buffer.h>\n\
79 ";
80
81 /* here goes the mapping of extension names to their numbers */
82
83 /* here goes the function declarations to convert the enums/enum to text */
84
85 static char *h_instance_table_p = "\n\n\
86 struct vk_instance_dispatch_table {\n\
87 PFN_vkGetInstanceProcAddr GetInstanceProcAddr;";
88 /* here we fill the name of entry points related to an instance */
89 static char *h_instance_table_e = "\n\
90 };";
91
92 static char *h_device_table_p = "\n\n\
93 struct vk_device_dispatch_table {\n\
94 PFN_vkGetDeviceProcAddr GetDeviceProcAddr;";
95 /* here we fill the name of entry points related to an instance */
96 static char *h_device_table_e = "\n\
97 };";
98
99 static char *h_tables_e = "\n\n\
100 void vk_load_instance_commands(VkInstance instance, PFN_vkGetInstanceProcAddr gpa, struct vk_instance_dispatch_table *table);\n\
101 void vk_load_device_commands(VkDevice device, PFN_vkGetDeviceProcAddr gpa, struct vk_device_dispatch_table *table);\
102 ";
103 static char *h_e = "\n\
104 #endif";
105 /*============================================================================*/
106
107
108 /*============================================================================*/
109 /* vk_enum_to_str.c template */
110 static char *c_p = "\
111 #include <string.h>\n\
112 #include <vulkan/vulkan.h>\n\
113 #include <vulkan/vk_android_native_buffer.h>\n\
114 #include \"util/macros.h\"\n\
115 #include \"vk_enum_to_str.h\"\n\
116 ";
117
118 /* here goes the enum value conversion to text code */
119
120 static char *c_instance_table_p = "\n\n\
121 void vk_load_instance_commands(VkInstance instance,\n\
122 PFN_vkGetInstanceProcAddr gpa,\n\
123 struct vk_instance_dispatch_table *table)\n\
124 {\n\
125 memset(table, 0, sizeof(*table));\n\
126 table->GetInstanceProcAddr = gpa;";
127 /* here the command table entry points are actually initialized */
128 static char *c_instance_table_e = "\n\
129 }";
130
131 static char *c_device_table_p ="\n\n\
132 void vk_load_device_commands(VkDevice device,\n\
133 PFN_vkGetDeviceProcAddr gpa,\n\
134 struct vk_device_dispatch_table *table)\n\
135 {\n\
136 memset(table, 0, sizeof(*table));\n\
137 table->GetDeviceProcAddr = gpa;";
138 static char *c_device_table_e = "\n\
139 }";
140
141 /*============================================================================*/
142
143
144 static ezxml_t extension_platform_get(ezxml_t extension)
145 {
146 ezxml_t platform;
147
148 const char *extension_platform_name = ezxml_attr(extension, "platform");
149 if (extension_platform_name == 0)
150 return 0;
151
152 platform = ezxml_get(registry_platforms, "platform", -1);
153 loop {
154 if (platform == 0)
155 return 0;
156
157 if (strcmp(ezxml_attr(platform, "name"),
158 extension_platform_name) == 0)
159 return platform;
160
161 platform = ezxml_next(platform);
162 }
163 }
164
165 #include "gen_enum_to_str_enums.c"
166 /* wow */
167 #include "gen_enum_to_str_commands.c"
168
169 int main(int args_n, char **args)
170 {
171 if (args_n != 3) {
172 ERR("usage: gen_enum_to_str VULKAN_XML_REGISTRY OUT_DIR\n");
173 return 1;
174 }
175
176 INFO("VULKAN REGISTRY=%s\nOUT_DIR=%s\n", args[1], args[2]);
177
178 /* this does return the root "registry" tag */
179 registry = ezxml_parse_file(args[1]);
180 if (registry == 0) {
181 ERR("unable to load and parse %s\n", args[1]);
182 return 1;
183 }
184 umask(0);
185 #define MODE_0666 S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH
186
187 sprintf(path, "%s/vk_enum_to_str.h", args[2]);
188 fd_h = open(path, O_WRONLY|O_CREAT|O_TRUNC, MODE_0666);
189 dprintf(fd_h, h_p);
190
191 sprintf(path, "%s/vk_enum_to_str.c", args[2]);
192 fd_c = open(path, O_WRONLY|O_CREAT|O_TRUNC, MODE_0666);
193 dprintf(fd_c, c_p);
194
195 /*--------------------------------------------------------------------*/
196 /* get the major uniq tags once */
197 registry_platforms = ezxml_get(registry, "platforms", -1);
198 registry_commands = ezxml_get(registry, "commands", -1);
199 registry_extensions = ezxml_get(registry, "extensions", -1);
200
201 /*--------------------------------------------------------------------*/
202 /*
203 * first part, extension name to number, and enums with their
204 * extensions
205 */
206 extensions_names_to_numbers();
207
208 dprintf(fd_h, "\n");
209
210 enumss_to_strs();
211
212 /*--------------------------------------------------------------------*/
213 /* second part, dispatch tables of commands */
214 instance_dispatch_table_gen();
215 device_dispatch_table_gen();
216 dprintf(fd_h, h_tables_e);
217
218 /*--------------------------------------------------------------------*/
219 dprintf(fd_h, h_e);
220 return 0;
221 }
File builders/mesa-vulkan-0/contrib/generators/gen_enum_to_str.deprecated/gen_enum_to_str_commands.c deleted (index b11cbec..0000000)
1 /*
2 * a device command, is:
3 * - _NOT_ vkGetInstanceProcAdd or vkGetDeviceProcAddr (hardcoded)
4 * - a command with its first param being one of the following types:
5 * - VkDevice
6 * - VkCommandBuffer
7 * - VkQueue
8 */
9
10 static bool require_commands_look_for_command(ezxml_t require, ezxml_t command)
11 {
12 ezxml_t command_proto = ezxml_get(command, "proto", -1);
13 ezxml_t command_name = ezxml_get(command_proto, "name", -1);
14 ezxml_t require_command = ezxml_get(require, "command", -1);
15 loop {
16 if (require_command == 0)
17 return false;
18 if (strcmp(ezxml_attr(require_command, "name"),
19 ezxml_txt(command_name)) == 0)
20 return true;
21 require_command = ezxml_next(require_command);
22 }
23 }
24
25 static bool requires_look_for_command(ezxml_t extension, ezxml_t command)
26 {
27 ezxml_t require = ezxml_get(extension, "require", -1);
28 loop {
29 if (require == 0)
30 return false;
31
32 /* we account for "no feature" require, basically vulkan 1.0 */
33 if (ezxml_attr(require, "feature") == 0
34 && require_commands_look_for_command(require, command))
35 return true;
36 require = ezxml_next(require);
37 }
38 }
39
40 static ezxml_t command_extension_get(ezxml_t command)
41 {
42 ezxml_t extension = ezxml_get(registry_extensions, "extension", -1);
43 loop {
44 if (extension == 0
45 || requires_look_for_command(extension, command))
46 break;
47 extension = ezxml_next(extension);
48 }
49 return extension;
50 }
51
52 static void command_gen(ezxml_t command, char *table_name)
53 {
54 ezxml_t command_extension;
55 ezxml_t command_proto;
56 ezxml_t command_name;
57
58 ezxml_t extension_platform = 0;
59
60 /*
61 * check if the command belongs to an extension in the current supported
62 * feature set (aka vulkan 1.0 for us)
63 */
64 command_extension = command_extension_get(command);
65 if (command_extension != 0)
66 extension_platform = extension_platform_get(command_extension);
67
68 if (extension_platform != 0) {
69 dprintf(fd_h, "\n#ifdef %s", ezxml_attr(extension_platform,
70 "protect"));
71 dprintf(fd_c, "\n#ifdef %s", ezxml_attr(extension_platform,
72 "protect"));
73 }
74 command_proto = ezxml_get(command, "proto", -1);
75 command_name = ezxml_get(command_proto, "name", -1);
76 dprintf(fd_h, "\nPFN_%s %s;", ezxml_txt(command_name),
77 /* skip the vk prefix */
78 ezxml_txt(command_name) + 2);
79 dprintf(fd_c, "\ntable->%s = (PFN_%s) gpa(%s, \"%s\");",
80 ezxml_txt(command_name) + 2,
81 ezxml_txt(command_name),
82 table_name,
83 ezxml_txt(command_name));
84 if (extension_platform != 0) {
85 dprintf(fd_h, "\n#endif");
86 dprintf(fd_c, "\n#endif");
87 }
88 }
89
90 /*
91 * a proc addr command is the first command in a dispatch table, since
92 * it will be used to get the other entry point
93 */
94 static bool is_proc_addr_command(ezxml_t command)
95 {
96 ezxml_t command_proto = ezxml_get(command, "proto", -1);
97 ezxml_t command_name = ezxml_get(command_proto, "name", -1);
98 if (strcmp("vkGetInstanceProcAddr", ezxml_txt(command_name)) == 0
99 || strcmp("vkGetDeviceProcAddr", ezxml_txt(command_name)) == 0)
100 return true;
101 return false;
102 }
103
104 #define FIRST_PARAM_TYPE_IS(str) strcmp(str, ezxml_txt(first_param_type)) == 0
105 static bool is_device_command(ezxml_t command)
106 {
107 ezxml_t command_first_param = ezxml_get(command, "param", -1);
108 ezxml_t first_param_type = ezxml_get(command_first_param, "type", -1);
109
110 if ( FIRST_PARAM_TYPE_IS("VkDevice")
111 || FIRST_PARAM_TYPE_IS("VkCommandBuffer")
112 || FIRST_PARAM_TYPE_IS("VkQueue"))
113 return true;
114 return false;
115 }
116 #undef FIRST_PARAM_TYPE_IS
117
118 static bool is_command_alias(ezxml_t command)
119 {
120 if (ezxml_attr(command, "alias") != 0)
121 return true;
122 return false;
123 }
124
125 /*
126 * This generate the instance dispatch table of instance commands.
127 * An instance command is:
128 * - _NOT_ vkGetInstanceProcAddr or vkGetDeviceProcAddr (hardcoded)
129 * - _NOT_ a device command
130 */
131 static void instance_dispatch_table_gen(void)
132 {
133 ezxml_t command;
134
135 dprintf(fd_h, h_instance_table_p);
136 dprintf(fd_c, c_instance_table_p);
137
138 command = ezxml_get(registry_commands, "command", -1);
139 loop {
140 if (command == 0)
141 break;
142 if (!is_command_alias(command) && !is_proc_addr_command(command)
143 && !is_device_command(command))
144 command_gen(command, "instance");
145 command = ezxml_next(command);
146 }
147 dprintf(fd_h, h_instance_table_e);
148 dprintf(fd_c, c_instance_table_e);
149 }
150
151 static void device_dispatch_table_gen(void)
152 {
153 ezxml_t command;
154
155 dprintf(fd_h, h_device_table_p);
156 dprintf(fd_c, c_device_table_p);
157
158 command = ezxml_get(registry_commands, "command", -1);
159 loop {
160 if (command == 0)
161 break;
162 if (!is_command_alias(command) && !is_proc_addr_command(command)
163 && is_device_command(command))
164 command_gen(command, "device");
165 command = ezxml_next(command);
166 }
167 dprintf(fd_h, h_device_table_e);
168 dprintf(fd_c, c_device_table_e);
169 }
File builders/mesa-vulkan-0/contrib/generators/gen_enum_to_str.deprecated/gen_enum_to_str_enums.c deleted (index 77bc714..0000000)
1 static void require_enum_to_str(ezxml_t enums, ezxml_t extension,
2 ezxml_t require_enum)
3 {
4 const char *offset_str;
5 int offset;
6
7 const char *name;
8
9 const char *extension_number_str;
10 const char *extension_number_override_str;
11 int extension_number_index;
12
13 const char *direction; /* presume if it there, it's negative */
14
15 int enum_value;
16
17 /*--------*/
18
19 /* we must have an offset, a name, an extension number */
20 offset_str = ezxml_attr(require_enum, "offset");
21 name = ezxml_attr(require_enum, "name");
22 extension_number_str = ezxml_attr(extension, "number");
23 if (name == 0 || offset_str == 0 || extension_number_str == 0)
24 return;
25
26 /*--------*/
27
28 /* optional: we can have a extension number override, and a direction */
29 direction = ezxml_attr(require_enum, "dir");
30
31 extension_number_override_str = ezxml_attr(require_enum, "extnumber");
32 if (extension_number_override_str != 0)
33 extension_number_str = extension_number_override_str;
34
35 /*--------*/
36
37 /* numeric conversion */
38 offset = atoi(offset_str);
39 extension_number_index = atoi(extension_number_str) - 1;
40
41 /* ... no comment ... only insults come here */
42 enum_value = (direction ? -1 : 1)
43 * (1000000000
44 + extension_number_index * 1000
45 + offset);
46
47 /*--------*/
48
49 /* output the source code */
50 dprintf(fd_c, "\n\t\tcase %d:\n\t\t\treturn \"%s\";", enum_value, name);
51 }
52
53 static void require_enum_filter(ezxml_t enums, ezxml_t extension,
54 ezxml_t require_enum)
55 {
56 const char *extended_type_name;
57
58 extended_type_name = ezxml_attr(require_enum, "extends");
59
60 /* does this extension enum actually extends an existing enum */
61 if (extended_type_name == 0)
62 return;
63
64 /*
65 * the extension enum do extend an enums, is this the enums we are
66 * currently processing?
67 */
68 if (strcmp(ezxml_attr(enums, "name"), extended_type_name) != 0)
69 return;
70
71 require_enum_to_str(enums, extension, require_enum);
72 }
73
74 static void require_enums_to_strs(ezxml_t enums, ezxml_t extension,
75 ezxml_t require)
76 {
77 /* disable the enum keyword in the C parser? */
78 ezxml_t require_enum = ezxml_get(require, "enum", -1);
79 loop {
80 if (require_enum == 0)
81 break;
82
83 require_enum_filter(enums, extension, require_enum);
84
85 require_enum = ezxml_next(require_enum);
86 }
87 }
88
89 static void extension_requires_filter(ezxml_t enums, ezxml_t extension)
90 {
91 ezxml_t require = ezxml_get(extension, "require", -1);
92 loop {
93 if (require == 0)
94 break;
95
96 /*
97 * require block can target a "feature", mostly a major
98 * revision of vulkan api. Since we deal only with api revision
99 * 1.0, filter out such require blocks.
100 */
101 if (ezxml_attr(require, "feature") == 0)
102 require_enums_to_strs(enums, extension, require);
103
104 require = ezxml_next(require);
105 }
106 }
107
108 static void enums_extensions_to_strs(ezxml_t enums)
109 {
110 ezxml_t extension = ezxml_get(registry_extensions, "extension", -1);
111 loop {
112 if (extension == 0)
113 break;
114
115 /* only enabled vulkan extensions */
116 if (strcmp("vulkan", ezxml_attr(extension, "supported")) == 0)
117 extension_requires_filter(enums, extension);
118
119 extension = ezxml_next(extension);
120 }
121 }
122
123 static void enums_enums_to_strs(ezxml_t enums)
124 {
125 /* disable the enum keyword in the C parser? */
126 ezxml_t enums_enum = ezxml_get(enums, "enum", -1);
127 loop {
128 if (enums_enum == 0)
129 break;
130
131 if (ezxml_attr(enums_enum, "value") != 0)
132 dprintf(fd_c, "\n\t\tcase %s:\n\t\t\treturn \"%s\";",
133 ezxml_attr(enums_enum, "value"),
134 ezxml_attr(enums_enum, "name"));
135 enums_enum = ezxml_next(enums_enum);
136 }
137 }
138
139 static bool types_look_for_enums(ezxml_t require, ezxml_t enums)
140 {
141 const char *enums_name = ezxml_attr(enums, "name");
142 ezxml_t type = ezxml_get(require, "type", -1);
143 loop {
144 if (type == 0)
145 return false;
146 if (strcmp(ezxml_attr(type, "name"), enums_name) == 0)
147 return true;
148 type = ezxml_next(type);
149 }
150 }
151
152 static bool requires_look_for_enums(ezxml_t extension, ezxml_t enums)
153 {
154 ezxml_t require = ezxml_get(extension, "require", -1);
155 loop {
156 if (require == 0)
157 return false;
158
159 /* we account for "no feature" require, basically vulkan 1.0 */
160 if (ezxml_attr(require, "feature") == 0
161 && types_look_for_enums(require, enums))
162 return true;
163 require = ezxml_next(require);
164 }
165 }
166
167 static ezxml_t enums_extension_get(ezxml_t enums)
168 {
169 ezxml_t extension = ezxml_get(registry_extensions, "extension", -1);
170 loop {
171 if (extension == 0 || requires_look_for_enums(extension, enums))
172 break;
173 extension = ezxml_next(extension);
174 }
175 return extension;
176 }
177
178 static void enums_to_strs(ezxml_t enums)
179 {
180 ezxml_t enums_extension;
181
182 ezxml_t extension_platform = 0;
183
184 /*
185 * we check if this enums belongs to one extension, and if this
186 * extension is specific to a platform
187 */
188 enums_extension = enums_extension_get(enums);
189 if (enums_extension != 0)
190 extension_platform = extension_platform_get(enums_extension);
191
192 /*--------------------------------------------------------------------*/
193 if (extension_platform != 0)
194 dprintf(fd_h, "\n\n#ifdef %s\n",
195 ezxml_attr(extension_platform, "protect"));
196 else
197 dprintf(fd_h, "\n");
198
199 dprintf(fd_h, "const char * vk_%s_to_str(%s input);",
200 /* remove the vk prefix from the enums name */
201 ezxml_attr(enums, "name") + 2,
202 ezxml_attr(enums, "name"));
203 if (extension_platform != 0)
204 dprintf(fd_h, "\n#endif");
205
206 /*--------------------------------------------------------------------*/
207 if (extension_platform != 0)
208 dprintf(fd_c, "\n\n#ifdef %s\n",
209 ezxml_attr(extension_platform, "protect"));
210 else
211 dprintf(fd_c, "\n");
212
213 dprintf(fd_c, "const char *\nvk_%s_to_str(%s input)\n{\n\tswitch(input) {",
214 /* remove the vk prefix from the enums name */
215 ezxml_attr(enums, "name") + 2,
216 ezxml_attr(enums, "name"));
217
218 enums_enums_to_strs(enums);
219 /* must add any enum from extensions for this very enums */
220 enums_extensions_to_strs(enums);
221
222 dprintf(fd_c, "\n\tdefault:\n\t\tunreachable(\"Undefined enum value.\");\n\t}\n}");
223 if (extension_platform != 0)
224 dprintf(fd_c, "\n#endif");
225 }
226
227 static void enumss_to_strs(void)
228 {
229 ezxml_t enums = ezxml_get(registry, "enums", -1);
230 loop {
231 const char *type_attr;
232
233 if (enums == 0)
234 break;
235
236 type_attr = ezxml_attr(enums, "type");
237 if (type_attr != 0 && strcmp(type_attr, "enum") == 0) /* wow */
238 enums_to_strs(enums);
239
240 enums = ezxml_next(enums);
241 }
242 }
243
244 static void extensions_names_to_numbers(void)
245 {
246 ezxml_t extension = ezxml_get(registry_extensions, "extension", -1);
247 loop {
248 const char *supported;
249
250 if (extension == 0)
251 break;
252
253 supported = ezxml_attr(extension, "supported");
254 if (strcmp("vulkan", supported) == 0)
255 dprintf(fd_h, "#define _%s_number (%s)\n",
256 ezxml_attr(extension, "name"),
257 ezxml_attr(extension, "number"));
258
259 extension = ezxml_next(extension);
260 }
261 }
File builders/mesa-vulkan-0/contrib/generators/gen_enum_to_str.deprecated/log deleted (index 32a611d..0000000)
1 ********************************************************************************
2 --------------------------------------------------------------------------------
3 A breakage did happen on the 58376c6b..15012077 update
4
5 people source of the recent breakage:
6 - Samuel Pitoiset <samuel.pitoiset@gmail.com>, would be french, director of a strange company, HAKZSAM (provence-Ă¢lpes-cĂ´te-d'azur)
7 - Lionel Landwerlin <lionel.g.landwerlin@intel.com>, would be french?/german?/other?, wintel in London
8 - Eric Engestrom <eric.engestrom@intel.com> <eric@engestrom.ch> Switzerland? wintel
9 --------------------------------------------------------------------------------
10 commit eb5cda1c3eca15790c46fcb7fd62408a7e0ba5f8
11 Author: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
12 Date: Sun Mar 17 20:26:07 2019 +0100
13
14 vulkan/util: Handle enums that are in platform-specific headers.
15
16 VkFullScreenExclusiveEXT comes from the win32 header. Mostly took
17 the logic from the entrypoint scripts:
18
19 1) If there is an ext that has it in the requires and has a platform,
20 take the guard for that platform.
21 2) Otherwise assume it is from the core headers.
22
23 Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
24 Reviewed-by: Eric Engestrom <eric@engestrom.ch>
25
26 commit 3e8d5b5ed48aaa37d8b83c2203f45ce55d557351
27 Author: Eric Engestrom <eric.engestrom@intel.com>
28 Date: Thu Mar 7 13:45:14 2019 +0000
29
30 vulkan/overlay: fix missing var rename in previous commit
31
32 Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
33 Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
34
35 commit d141472d0ec1db2391a54919bc480eaa1eac36b6
36 Author: Eric Engestrom <eric.engestrom@intel.com>
37 Date: Tue Mar 5 15:57:34 2019 +0000
38
39 vulkan/util: use the platform defines in vk.xml instead of hard-coding them
40
41 See also: 3d4238d26c5de4a0f7a5 "anv: use the platform defines in vk.xml
42 instead of hard-coding them"
43 Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
44 Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
45
46 commit 530927d3f6a303d9ef1eb1e839566ccb0e813036
47 Author: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
48 Date: Tue Mar 5 10:38:14 2019 +0000
49
50 vulkan/util: generate instance/device dispatch tables
51
52 This will be used by the overlay instead of system installed
53 validation layers helpers.
54
55 Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
56 Acked-by: Eric Engestrom <eric.engestrom@intel.com>
57
58 commit a75b12ce66f0dcaa747b07410d344467e26242d8
59 Author: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
60 Date: Tue Jan 22 17:36:56 2019 +0000
61
62 vulkan: make generated enum to strings helpers available from c++
63
64 Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
65 Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
66
67 commit 14fe9fa11baa4e4e782d192e0b8c150ee9e8754f
68 Author: Timothy Arceri <tarceri@itsqueeze.com>
69 Date: Sun Sep 2 20:27:40 2018 +1000
70
71 mesa: enable ARB_vertex_buffer_object in core profile
72
73 This extension is required by "Wolfenstein: The Old Blood"
74 and is exposed in core in the Nvidia binary driver.
75
76 All the functions are just alias of the core functions so
77 there should be nothing more to do.
78
79 Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
80 ********************************************************************************
81 --------------------------------------------------------------------------------
82 A new factory for the vkstructures was introduced 07745f94..c14b13d0
83 in src/vulkan/util/gen_enum_to_str.py
84 did not implement it yet as it seems not really use yet
85 --------------------------------------------------------------------------------
86 ********************************************************************************
87
File builders/mesa-vulkan-0/contrib/generators/nir/alu/generic/binop/binop.c deleted (index 4c4fe5a..0000000)
1 static struct nir_op nir_fadd = {
2 "fadd",
3 NIR_OP_TYPE_ALU,
4 0,
5 NIR_TYPE_FLOAT,
6 2,
7 {0,0},
8 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
9 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
10 };
11 static struct nir_op nir_iadd = {
12 "iadd",
13 NIR_OP_TYPE_ALU,
14 0,
15 NIR_TYPE_INT,
16 2,
17 {0,0},
18 {NIR_TYPE_INT,NIR_TYPE_INT},
19 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
20 };
21 static struct nir_op nir_iadd_sat = {
22 "iadd_sat",
23 NIR_OP_TYPE_ALU,
24 0,
25 NIR_TYPE_INT,
26 2,
27 {0,0},
28 {NIR_TYPE_INT,NIR_TYPE_INT},
29 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
30 };
31 static struct nir_op nir_uadd_sat = {
32 "uadd_sat",
33 NIR_OP_TYPE_ALU,
34 0,
35 NIR_TYPE_UINT,
36 2,
37 {0,0},
38 {NIR_TYPE_UINT,NIR_TYPE_UINT},
39 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
40 };
41 static struct nir_op nir_isub_sat = {
42 "isub_sat",
43 NIR_OP_TYPE_ALU,
44 0,
45 NIR_TYPE_INT,
46 2,
47 {0,0},
48 {NIR_TYPE_INT,NIR_TYPE_INT},
49 0
50 };
51 static struct nir_op nir_usub_sat = {
52 "usub_sat",
53 NIR_OP_TYPE_ALU,
54 0,
55 NIR_TYPE_UINT,
56 2,
57 {0,0},
58 {NIR_TYPE_UINT,NIR_TYPE_UINT},
59 0
60 };
61 static struct nir_op nir_fsub = {
62 "fsub",
63 NIR_OP_TYPE_ALU,
64 0,
65 NIR_TYPE_FLOAT,
66 2,
67 {0,0},
68 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
69 0
70 };
71 static struct nir_op nir_isub = {
72 "isub",
73 NIR_OP_TYPE_ALU,
74 0,
75 NIR_TYPE_INT,
76 2,
77 {0,0},
78 {NIR_TYPE_INT,NIR_TYPE_INT},
79 0
80 };
81 static struct nir_op nir_uabs_usub = {
82 "uabs_usub",
83 NIR_OP_TYPE_ALU,
84 0,
85 NIR_TYPE_UINT,
86 2,
87 {0,0},
88 {NIR_TYPE_UINT,NIR_TYPE_UINT},
89 0
90 };
91 static struct nir_op nir_fmul = {
92 "fmul",
93 NIR_OP_TYPE_ALU,
94 0,
95 NIR_TYPE_FLOAT,
96 2,
97 {0,0},
98 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
99 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
100 };
101 static struct nir_op nir_imul = {
102 "imul",
103 NIR_OP_TYPE_ALU,
104 0,
105 NIR_TYPE_INT,
106 2,
107 {0,0},
108 {NIR_TYPE_INT,NIR_TYPE_INT},
109 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
110 };
111 /* high 32-bits of signed integer multiply */
112 static struct nir_op nir_imul_high = {
113 "imul_high",
114 NIR_OP_TYPE_ALU,
115 0,
116 NIR_TYPE_INT,
117 2,
118 {0,0},
119 {NIR_TYPE_INT,NIR_TYPE_INT},
120 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
121 };
122 /* high 32-bits of unsigned integer multiply */
123 static struct nir_op nir_umul_high = {
124 "umul_high",
125 NIR_OP_TYPE_ALU,
126 0,
127 NIR_TYPE_UINT,
128 2,
129 {0,0},
130 {NIR_TYPE_UINT,NIR_TYPE_UINT},
131 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
132 };
133 /* low 32-bits of unsigned integer multiply */
134 static struct nir_op nir_umul_low = {
135 "umul_low",
136 NIR_OP_TYPE_ALU,
137 0,
138 NIR_TYPE_UINT32,
139 2,
140 {0,0},
141 {NIR_TYPE_UINT32,NIR_TYPE_UINT32},
142 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
143 };
144 /*----------------------------------------------------------------------------*/
145 /* Multiply 32-bits with low 16-bits. */
146 static struct nir_op nir_imul_32x16 = {
147 "imul_32x16",
148 NIR_OP_TYPE_ALU,
149 0,
150 NIR_TYPE_INT32,
151 2,
152 {0,0},
153 {NIR_TYPE_INT32,NIR_TYPE_INT32},
154 0
155 };
156 static struct nir_op nir_umul_32x16 = {
157 "umul_32x16",
158 NIR_OP_TYPE_ALU,
159 0,
160 NIR_TYPE_UINT32,
161 2,
162 {0,0},
163 {NIR_TYPE_UINT32,NIR_TYPE_UINT32},
164 0
165 };
166 /*----------------------------------------------------------------------------*/
167 static struct nir_op nir_fdiv = {
168 "fdiv",
169 NIR_OP_TYPE_ALU,
170 0,
171 NIR_TYPE_FLOAT,
172 2,
173 {0,0},
174 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
175 0
176 };
177 static struct nir_op nir_idiv = {
178 "idiv",
179 NIR_OP_TYPE_ALU,
180 0,
181 NIR_TYPE_INT,
182 2,
183 {0,0},
184 {NIR_TYPE_INT,NIR_TYPE_INT},
185 0
186 };
187 static struct nir_op nir_udiv = {
188 "udiv",
189 NIR_OP_TYPE_ALU,
190 0,
191 NIR_TYPE_UINT,
192 2,
193 {0,0},
194 {NIR_TYPE_UINT,NIR_TYPE_UINT},
195 0
196 };
197 /*----------------------------------------------------------------------------*/
198 /* [iu]hadd: (a + b) >> 1 (without overflow) */
199 static struct nir_op nir_ihadd = {
200 "ihadd",
201 NIR_OP_TYPE_ALU,
202 0,
203 NIR_TYPE_INT,
204 2,
205 {0,0},
206 {NIR_TYPE_INT,NIR_TYPE_INT},
207 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
208 };
209 static struct nir_op nir_uhadd = {
210 "uhadd",
211 NIR_OP_TYPE_ALU,
212 0,
213 NIR_TYPE_UINT,
214 2,
215 {0,0},
216 {NIR_TYPE_UINT,NIR_TYPE_UINT},
217 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
218 };
219 /* [iu]hadd: (a + b) >> 1 (without overflow) */
220 /*----------------------------------------------------------------------------*/
221 /* rhadd: (a + b + 1) >> 1 (without overflow) */
222 static struct nir_op nir_irhadd = {
223 "irhadd",
224 NIR_OP_TYPE_ALU,
225 0,
226 NIR_TYPE_INT,
227 2,
228 {0,0},
229 {NIR_TYPE_INT,NIR_TYPE_INT},
230 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
231 };
232 static struct nir_op nir_urhadd = {
233 "urhadd",
234 NIR_OP_TYPE_ALU,
235 0,
236 NIR_TYPE_UINT,
237 2,
238 {0,0},
239 {NIR_TYPE_UINT,NIR_TYPE_UINT},
240 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
241 };
242 /* rhadd: (a + b + 1) >> 1 (without overflow) */
243 /*----------------------------------------------------------------------------*/
244 static struct nir_op nir_umod = {
245 "umod",
246 NIR_OP_TYPE_ALU,
247 0,
248 NIR_TYPE_UINT,
249 2,
250 {0,0},
251 {NIR_TYPE_UINT,NIR_TYPE_UINT},
252 0
253 };
254 /*----------------------------------------------------------------------------*/
255 /*
256 * For signed integers, there are several different possible definitions of
257 * "modulus" or "remainder". We follow the conventions used by LLVM and
258 * SPIR-V. The irem opcode implements the standard C/C++ signed "%"
259 * operation while the imod opcode implements the more mathematical
260 * "modulus" operation. For details on the difference, see
261 *
262 * http://mathforum.org/library/drmath/view/52343.html
263 */
264 static struct nir_op nir_irem = {
265 "irem",
266 NIR_OP_TYPE_ALU,
267 0,
268 NIR_TYPE_INT,
269 2,
270 {0,0},
271 {NIR_TYPE_INT,NIR_TYPE_INT},
272 0
273 };
274 static struct nir_op nir_imod = {
275 "imod",
276 NIR_OP_TYPE_ALU,
277 0,
278 NIR_TYPE_INT,
279 2,
280 {0,0},
281 {NIR_TYPE_INT,NIR_TYPE_INT},
282 0
283 };
284 static struct nir_op nir_fmod = {
285 "fmod",
286 NIR_OP_TYPE_ALU,
287 0,
288 NIR_TYPE_FLOAT,
289 2,
290 {0,0},
291 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
292 0
293 };
294 static struct nir_op nir_frem = {
295 "frem",
296 NIR_OP_TYPE_ALU,
297 0,
298 NIR_TYPE_FLOAT,
299 2,
300 {0,0},
301 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
302 0
303 };
304 /* mod and rem */
305 /*----------------------------------------------------------------------------*/
306 /*
307 * These comparisons for integer-less hardware return 1.0 and 0.0 for true
308 * and false respectively
309 */
310 static struct nir_op nir_slt = {
311 "slt",
312 NIR_OP_TYPE_ALU,
313 0,
314 NIR_TYPE_FLOAT32,
315 2,
316 {0,0},
317 {NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32},
318 0
319 };
320 static struct nir_op nir_sge = {
321 "sge",
322 NIR_OP_TYPE_ALU,
323 0,
324 NIR_TYPE_FLOAT,
325 2,
326 {0,0},
327 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
328 0
329 };
330 static struct nir_op nir_seq = {
331 "seq",
332 NIR_OP_TYPE_ALU,
333 0,
334 NIR_TYPE_FLOAT32,
335 2,
336 {0,0},
337 {NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32},
338 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
339 };
340 static struct nir_op nir_sne = {
341 "sne",
342 NIR_OP_TYPE_ALU,
343 0,
344 NIR_TYPE_FLOAT32,
345 2,
346 {0,0},
347 {NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32},
348 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
349 };
350 /* software comparisons */
351 /*----------------------------------------------------------------------------*/
352 /* bitwise logic operators */
353 static struct nir_op nir_iand = {
354 "iand",
355 NIR_OP_TYPE_ALU,
356 0,
357 NIR_TYPE_UINT,
358 2,
359 {0,0},
360 {NIR_TYPE_UINT,NIR_TYPE_UINT},
361 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
362 };
363 static struct nir_op nir_ior = {
364 "ior",
365 NIR_OP_TYPE_ALU,
366 0,
367 NIR_TYPE_UINT,
368 2,
369 {0,0},
370 {NIR_TYPE_UINT,NIR_TYPE_UINT},
371 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
372 };
373 static struct nir_op nir_ixor = {
374 "ixor",
375 NIR_OP_TYPE_ALU,
376 0,
377 NIR_TYPE_UINT,
378 2,
379 {0,0},
380 {NIR_TYPE_UINT,NIR_TYPE_UINT},
381 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
382 };
383 /* bitwise logic operators */
384 /*----------------------------------------------------------------------------*/
385 static struct nir_op nir_fmin = {
386 "fmin",
387 NIR_OP_TYPE_ALU,
388 0,
389 NIR_TYPE_FLOAT,
390 2,
391 {0,0},
392 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
393 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
394 };
395 static struct nir_op nir_imin = {
396 "imin",
397 NIR_OP_TYPE_ALU,
398 0,
399 NIR_TYPE_INT,
400 2,
401 {0,0},
402 {NIR_TYPE_INT,NIR_TYPE_INT},
403 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
404 };
405 static struct nir_op nir_umin = {
406 "umin",
407 NIR_OP_TYPE_ALU,
408 0,
409 NIR_TYPE_UINT,
410 2,
411 {0,0},
412 {NIR_TYPE_UINT,NIR_TYPE_UINT},
413 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
414 };
415 static struct nir_op nir_fmax = {
416 "fmax",
417 NIR_OP_TYPE_ALU,
418 0,
419 NIR_TYPE_FLOAT,
420 2,
421 {0,0},
422 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
423 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
424 };
425 static struct nir_op nir_imax = {
426 "imax",
427 NIR_OP_TYPE_ALU,
428 0,
429 NIR_TYPE_INT,
430 2,
431 {0,0},
432 {NIR_TYPE_INT,NIR_TYPE_INT},
433 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
434 };
435 static struct nir_op nir_umax = {
436 "umax",
437 NIR_OP_TYPE_ALU,
438 0,
439 NIR_TYPE_UINT,
440 2,
441 {0,0},
442 {NIR_TYPE_UINT,NIR_TYPE_UINT},
443 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
444 };
445 /* Saturated vector add for 4 8bit ints. */
446 static struct nir_op nir_usadd_4x8 = {
447 "usadd_4x8",
448 NIR_OP_TYPE_ALU,
449 0,
450 NIR_TYPE_INT32,
451 2,
452 {0,0},
453 {NIR_TYPE_INT32,NIR_TYPE_INT32},
454 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
455 };
456 /* Saturated vector subtract for 4 8bit ints. */
457 static struct nir_op nir_ussub_4x8 = {
458 "ussub_4x8",
459 NIR_OP_TYPE_ALU,
460 0,
461 NIR_TYPE_INT32,
462 2,
463 {0,0},
464 {NIR_TYPE_INT32,NIR_TYPE_INT32},
465 0
466 };
467 /* vector min for 4 8bit ints. */
468 static struct nir_op nir_umin_4x8 = {
469 "umin_4x8",
470 NIR_OP_TYPE_ALU,
471 0,
472 NIR_TYPE_INT32,
473 2,
474 {0,0},
475 {NIR_TYPE_INT32, NIR_TYPE_INT32},
476 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
477 };
478 /* vector max for 4 8bit ints. */
479 static struct nir_op nir_umax_4x8 = {
480 "umax_4x8",
481 NIR_OP_TYPE_ALU,
482 0,
483 NIR_TYPE_INT32,
484 2,
485 {0,0},
486 {NIR_TYPE_INT32,NIR_TYPE_INT32},
487 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
488 };
489 /* unorm multiply: (a * b) / 255. */
490 static struct nir_op nir_umul_unorm_4x8 = {
491 "umul_unorm_4x8",
492 NIR_OP_TYPE_ALU,
493 0,
494 NIR_TYPE_INT32,
495 2,
496 {0,0},
497 {NIR_TYPE_INT32,NIR_TYPE_INT32},
498 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
499 };
500 static struct nir_op nir_fpow = {
501 "fpow",
502 NIR_OP_TYPE_ALU,
503 0,
504 NIR_TYPE_FLOAT,
505 2,
506 {0,0},
507 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
508 0
509
510 };
511 /*----------------------------------------------------------------------------*/
512 /* Byte extraction */
513 static struct nir_op nir_extract_u8 = {
514 "extract_u8",
515 NIR_OP_TYPE_ALU,
516 0,
517 NIR_TYPE_UINT,
518 2,
519 {0,0},
520 {NIR_TYPE_UINT,NIR_TYPE_UINT},
521 0
522 };
523 static struct nir_op nir_extract_i8 = {
524 "extract_i8",
525 NIR_OP_TYPE_ALU,
526 0,
527 NIR_TYPE_INT,
528 2,
529 {0,0},
530 {NIR_TYPE_INT,NIR_TYPE_INT},
531 0
532 };
533 /* Byte extraction */
534 /*----------------------------------------------------------------------------*/
535 /* Word extraction */
536 static struct nir_op nir_extract_u16 = {
537 "extract_u16",
538 NIR_OP_TYPE_ALU,
539 0,
540 NIR_TYPE_UINT,
541 2,
542 {0,0},
543 {NIR_TYPE_UINT,NIR_TYPE_UINT},
544 0
545 };
546 static struct nir_op nir_extract_i16 = {
547 "extract_i16",
548 NIR_OP_TYPE_ALU,
549 0,
550 NIR_TYPE_INT,
551 2,
552 {0,0},
553 {NIR_TYPE_INT,NIR_TYPE_INT},
554 0
555 };
556 /* Word extraction */
557 /*----------------------------------------------------------------------------*/
558 /*
559 * An integer multiply instruction for address calculation. This is
560 * similar to imul, except that the results are undefined in case of
561 * overflow. Overflow is defined according to the size of the variable
562 * being dereferenced.
563 *
564 * This relaxed definition, compared to imul, allows an optimization
565 * pass to propagate bounds (ie, from an load/store intrinsic) to the
566 * sources, such that lower precision integer multiplies can be used.
567 * This is useful on hw that has 24b or perhaps 16b integer multiply
568 * instructions.
569 */
570 static struct nir_op nir_amul = {
571 "amul",
572 NIR_OP_TYPE_ALU,
573 0,
574 NIR_TYPE_INT,
575 2,
576 {0,0},
577 {NIR_TYPE_INT,NIR_TYPE_INT},
578 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
579 };
File builders/mesa-vulkan-0/contrib/generators/nir/alu/generic/binop/compare_all_sizes.c deleted (index 1f39964..0000000)
1 /*----------------------------------------------------------------------------*/
2 /* flt[b1,b8,b16,b32 */
3 static struct nir_op nir_flt = {
4 "flt",
5 NIR_OP_TYPE_ALU,
6 0,
7 NIR_TYPE_BOOL1,
8 2,
9 {0,0},
10 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
11 0
12 };
13 static struct nir_op nir_flt8 = {
14 "flt8",
15 NIR_OP_TYPE_ALU,
16 0,
17 NIR_TYPE_BOOL8,
18 2,
19 {0,0},
20 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
21 0
22 };
23 static struct nir_op nir_flt16 = {
24 "flt16",
25 NIR_OP_TYPE_ALU,
26 0,
27 NIR_TYPE_BOOL16,
28 2,
29 {0,0},
30 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
31 0
32 };
33 static struct nir_op nir_flt32 = {
34 "flt32",
35 NIR_OP_TYPE_ALU,
36 0,
37 NIR_TYPE_BOOL32,
38 2,
39 {0,0},
40 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
41 0
42 };
43 /* flt[b1,b8,b16,b32] */
44 /*----------------------------------------------------------------------------*/
45 /* fge[b1,b8,b16,b32] */
46 static struct nir_op nir_fge = {
47 "fge",
48 NIR_OP_TYPE_ALU,
49 0,
50 NIR_TYPE_BOOL1,
51 2,
52 {0,0},
53 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
54 0
55 };
56 static struct nir_op nir_fge8 = {
57 "fge8",
58 NIR_OP_TYPE_ALU,
59 0,
60 NIR_TYPE_BOOL8,
61 2,
62 {0,0},
63 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
64 0
65 };
66 static struct nir_op nir_fge16 = {
67 "fge16",
68 NIR_OP_TYPE_ALU,
69 0,
70 NIR_TYPE_BOOL16,
71 2,
72 {0,0},
73 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
74 0
75 };
76 static struct nir_op nir_fge32 = {
77 "fge32",
78 NIR_OP_TYPE_ALU,
79 0,
80 NIR_TYPE_BOOL32,
81 2,
82 {0,0},
83 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
84 0
85 };
86 /* fge[b1,b8,b16,b32] */
87 /*----------------------------------------------------------------------------*/
88 /* feq[b1,b8,b16,b32] */
89 static struct nir_op nir_feq = {
90 "feq",
91 NIR_OP_TYPE_ALU,
92 0,
93 NIR_TYPE_BOOL1,
94 2,
95 {0,0},
96 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
97 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
98 };
99 static struct nir_op nir_feq8 = {
100 "feq8",
101 NIR_OP_TYPE_ALU,
102 0,
103 NIR_TYPE_BOOL8,
104 2,
105 {0,0},
106 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
107 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
108 };
109 static struct nir_op nir_feq16 = {
110 "feq16",
111 NIR_OP_TYPE_ALU,
112 0,
113 NIR_TYPE_BOOL16,
114 2,
115 {0,0},
116 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
117 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
118 };
119 static struct nir_op nir_feq32 = {
120 "feq32",
121 NIR_OP_TYPE_ALU,
122 0,
123 NIR_TYPE_BOOL32,
124 2,
125 {0,0},
126 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
127 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
128 };
129 /* feq[b1,b8,b16,b32] */
130 /*----------------------------------------------------------------------------*/
131 /* fneu[b1,b8,b16,b32] */
132 static struct nir_op nir_fneu = {
133 "fneu",
134 NIR_OP_TYPE_ALU,
135 0,
136 NIR_TYPE_BOOL1,
137 2,
138 {0,0},
139 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
140 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
141 };
142 static struct nir_op nir_fneu8 = {
143 "fneu8",
144 NIR_OP_TYPE_ALU,
145 0,
146 NIR_TYPE_BOOL8,
147 2,
148 {0,0},
149 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
150 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
151 };
152 static struct nir_op nir_fneu16 = {
153 "fneu16",
154 NIR_OP_TYPE_ALU,
155 0,
156 NIR_TYPE_BOOL16,
157 2,
158 {0,0},
159 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
160 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
161 };
162 static struct nir_op nir_fneu32 = {
163 "fneu32",
164 NIR_OP_TYPE_ALU,
165 0,
166 NIR_TYPE_BOOL32,
167 2,
168 {0,0},
169 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
170 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
171 };
172 /* fneu[b1,b8,b16,b32] */
173 /*----------------------------------------------------------------------------*/
174 /* ilt[b1,b8,b16,b32] */
175 static struct nir_op nir_ilt = {
176 "ilt",
177 NIR_OP_TYPE_ALU,
178 0,
179 NIR_TYPE_BOOL1,
180 2,
181 {0,0},
182 {NIR_TYPE_INT,NIR_TYPE_INT},
183 0
184 };
185 static struct nir_op nir_ilt8 = {
186 "ilt8",
187 NIR_OP_TYPE_ALU,
188 0,
189 NIR_TYPE_BOOL8,
190 2,
191 {0,0},
192 {NIR_TYPE_INT,NIR_TYPE_INT},
193 0
194 };
195 static struct nir_op nir_ilt16 = {
196 "ilt16",
197 NIR_OP_TYPE_ALU,
198 0,
199 NIR_TYPE_BOOL16,
200 2,
201 {0,0},
202 {NIR_TYPE_INT,NIR_TYPE_INT},
203 0
204 };
205 static struct nir_op nir_ilt32 = {
206 "ilt32",
207 NIR_OP_TYPE_ALU,
208 0,
209 NIR_TYPE_BOOL32,
210 2,
211 {0,0},
212 {NIR_TYPE_INT,NIR_TYPE_INT},
213 0
214 };
215 /* ilt[b1,b8,b16,b32] */
216 /*----------------------------------------------------------------------------*/
217 /* ige[b1,b8,b16,b32] */
218 static struct nir_op nir_ige = {
219 "ige",
220 NIR_OP_TYPE_ALU,
221 0,
222 NIR_TYPE_BOOL1,
223 2,
224 {0,0},
225 {NIR_TYPE_INT,NIR_TYPE_INT},
226 0
227 };
228 static struct nir_op nir_ige8 = {
229 "ige8",
230 NIR_OP_TYPE_ALU,
231 0,
232 NIR_TYPE_BOOL8,
233 2,
234 {0,0},
235 {NIR_TYPE_INT,NIR_TYPE_INT},
236 0
237 };
238 static struct nir_op nir_ige16 = {
239 "ige16",
240 NIR_OP_TYPE_ALU,
241 0,
242 NIR_TYPE_BOOL16,
243 2,
244 {0,0},
245 {NIR_TYPE_INT,NIR_TYPE_INT},
246 0
247 };
248 static struct nir_op nir_ige32 = {
249 "ige32",
250 NIR_OP_TYPE_ALU,
251 0,
252 NIR_TYPE_BOOL32,
253 2,
254 {0,0},
255 {NIR_TYPE_INT,NIR_TYPE_INT},
256 0
257 };
258 /* ige[b1,b8,b16,b32] */
259 /*----------------------------------------------------------------------------*/
260 /* ieq[b1,b8,b16,b32] */
261 static struct nir_op nir_ieq = {
262 "ieq",
263 NIR_OP_TYPE_ALU,
264 0,
265 NIR_TYPE_BOOL1,
266 2,
267 {0,0},
268 {NIR_TYPE_INT,NIR_TYPE_INT},
269 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
270 };
271 static struct nir_op nir_ieq8 = {
272 "ieq8",
273 NIR_OP_TYPE_ALU,
274 0,
275 NIR_TYPE_BOOL8,
276 2,
277 {0,0},
278 {NIR_TYPE_INT,NIR_TYPE_INT},
279 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
280 };
281 static struct nir_op nir_ieq16 = {
282 "ieq16",
283 NIR_OP_TYPE_ALU,
284 0,
285 NIR_TYPE_BOOL16,
286 2,
287 {0,0},
288 {NIR_TYPE_INT,NIR_TYPE_INT},
289 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
290 };
291 static struct nir_op nir_ieq32 = {
292 "ieq32",
293 NIR_OP_TYPE_ALU,
294 0,
295 NIR_TYPE_BOOL32,
296 2,
297 {0,0},
298 {NIR_TYPE_INT,NIR_TYPE_INT},
299 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
300 };
301 /* ieq[b1,b8,b16,b32] */
302 /*----------------------------------------------------------------------------*/
303 /* ine[b1,b8,b16,b32] */
304 static struct nir_op nir_ine = {
305 "ine",
306 NIR_OP_TYPE_ALU,
307 0,
308 NIR_TYPE_BOOL1,
309 2,
310 {0,0},
311 {NIR_TYPE_INT,NIR_TYPE_INT},
312 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
313 };
314 static struct nir_op nir_ine8 = {
315 "ine8",
316 NIR_OP_TYPE_ALU,
317 0,
318 NIR_TYPE_BOOL8,
319 2,
320 {0,0},
321 {NIR_TYPE_INT,NIR_TYPE_INT},
322 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
323 };
324 static struct nir_op nir_ine16 = {
325 "ine16",
326 NIR_OP_TYPE_ALU,
327 0,
328 NIR_TYPE_BOOL16,
329 2,
330 {0,0},
331 {NIR_TYPE_INT,NIR_TYPE_INT},
332 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
333 };
334 static struct nir_op nir_ine32 = {
335 "ine32",
336 NIR_OP_TYPE_ALU,
337 0,
338 NIR_TYPE_BOOL32,
339 2,
340 {0,0},
341 {NIR_TYPE_INT,NIR_TYPE_INT},
342 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
343 };
344 /* ine[b1,b8,b16,b32] */
345 /*----------------------------------------------------------------------------*/
346 /* ult[b1,b8,b16,b32] */
347 static struct nir_op nir_ult = {
348 "ult",
349 NIR_OP_TYPE_ALU,
350 0,
351 NIR_TYPE_BOOL1,
352 2,
353 {0,0},
354 {NIR_TYPE_UINT,NIR_TYPE_UINT},
355 0
356 };
357 static struct nir_op nir_ult8 = {
358 "ult8",
359 NIR_OP_TYPE_ALU,
360 0,
361 NIR_TYPE_BOOL8,
362 2,
363 {0,0},
364 {NIR_TYPE_UINT,NIR_TYPE_UINT},
365 0
366 };
367 static struct nir_op nir_ult16 = {
368 "ult16",
369 NIR_OP_TYPE_ALU,
370 0,
371 NIR_TYPE_BOOL16,
372 2,
373 {0,0},
374 {NIR_TYPE_UINT,NIR_TYPE_UINT},
375 0
376 };
377 static struct nir_op nir_ult32 = {
378 "ult32",
379 NIR_OP_TYPE_ALU,
380 0,
381 NIR_TYPE_BOOL32,
382 2,
383 {0,0},
384 {NIR_TYPE_UINT,NIR_TYPE_UINT},
385 0
386 };
387 /* ult[b1,b8,b16,b32] */
388 /*---------------------------------------------------------------------------*/
389 /* uge[b1,b8,b16,b32] */
390 static struct nir_op nir_uge = {
391 "uge",
392 NIR_OP_TYPE_ALU,
393 0,
394 NIR_TYPE_BOOL1,
395 2,
396 {0,0},
397 {NIR_TYPE_UINT,NIR_TYPE_UINT},
398 0
399 };
400 static struct nir_op nir_uge8 = {
401 "uge8",
402 NIR_OP_TYPE_ALU,
403 0,
404 NIR_TYPE_BOOL8,
405 2,
406 {0,0},
407 {NIR_TYPE_UINT,NIR_TYPE_UINT},
408 0
409 };
410 static struct nir_op nir_uge16 = {
411 "uge16",
412 NIR_OP_TYPE_ALU,
413 0,
414 NIR_TYPE_BOOL16,
415 2,
416 {0,0},
417 {NIR_TYPE_UINT,NIR_TYPE_UINT},
418 0
419 };
420 static struct nir_op nir_uge32 = {
421 "uge32",
422 NIR_OP_TYPE_ALU,
423 0,
424 NIR_TYPE_BOOL32,
425 2,
426 {0,0},
427 {NIR_TYPE_UINT,NIR_TYPE_UINT},
428 0
429 };
430 /* uge[b1,b8,b16,b32] */
431 /*---------------------------------------------------------------------------*/
File builders/mesa-vulkan-0/contrib/generators/nir/alu/generic/binop/convert.c deleted (index b996972..0000000)
1 static struct nir_op nir_uabs_isub = {
2 "uabs_isub",
3 NIR_OP_TYPE_ALU,
4 0,
5 NIR_TYPE_UINT,
6 2,
7 {0,0},
8 {NIR_TYPE_INT,NIR_TYPE_INT},
9 0
10 };
11 /*----------------------------------------------------------------------------*/
12 /* Generate 64 bit result from 2 32 bits quantity */
13 static struct nir_op nir_imul_2x32_64 = {
14 "imul_2x32_64",
15 NIR_OP_TYPE_ALU,
16 0,
17 NIR_TYPE_INT64,
18 2,
19 {0,0},
20 {NIR_TYPE_INT32,NIR_TYPE_INT32},
21 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
22 };
23 static struct nir_op nir_umul_2x32_64 = {
24 "umul_2x32_64",
25 NIR_OP_TYPE_ALU,
26 0,
27 NIR_TYPE_UINT64,
28 2,
29 {0,0},
30 {NIR_TYPE_UINT32,NIR_TYPE_UINT32},
31 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
32 };
33 /*----------------------------------------------------------------------------*/
34 /*
35 * returns a boolean representing the carry resulting from the addition of
36 * the two unsigned arguments.
37 */
38 static struct nir_op nir_uadd_carry = {
39 "uadd_carry",
40 NIR_OP_TYPE_ALU,
41 0,
42 NIR_TYPE_UINT,
43 2,
44 {0,0},
45 {NIR_TYPE_UINT,NIR_TYPE_UINT},
46 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
47 };
48 /*
49 * returns a boolean representing the borrow resulting from the subtraction
50 * of the two unsigned arguments.
51 */
52 static struct nir_op nir_usub_borrow = {
53 "usub_borrow",
54 NIR_OP_TYPE_ALU,
55 0,
56 NIR_TYPE_UINT,
57 2,
58 {0,0},
59 {NIR_TYPE_UINT,NIR_TYPE_UINT},
60 0
61 };
62 static struct nir_op nir_pack_64_2x32_split = {
63 "pack_64_2x32_split",
64 NIR_OP_TYPE_ALU,
65 0,
66 NIR_TYPE_UINT64,
67 2,
68 {0,0},
69 {NIR_TYPE_UINT32,NIR_TYPE_UINT32},
70 0
71 };
72 static struct nir_op nir_pack_32_2x16_split = {
73 "pack_32_2x16_split",
74 NIR_OP_TYPE_ALU,
75 0,
76 NIR_TYPE_UINT32,
77 2,
78 {0,0},
79 {NIR_TYPE_UINT16,NIR_TYPE_UINT16},
80 0
81 };
82 /*
83 * bfm implements the behavior of the first operation of the SM5 "bfi" assembly
84 * and that of the "bfi1" i965 instruction. That is, the bits and offset values
85 * are from the low five bits of src0 and src1, respectively.
86 */
87 static struct nir_op nir_bfm = {
88 "bfm",
89 NIR_OP_TYPE_ALU,
90 0,
91 NIR_TYPE_UINT32,
92 2,
93 {0,0},
94 {NIR_TYPE_INT32,NIR_TYPE_INT32},
95 0
96 };
File builders/mesa-vulkan-0/contrib/generators/nir/alu/generic/binop/horiz.c deleted (index 138d682..0000000)
1 static struct nir_op nir_pack_half_2x16_split = {
2 "pack_half_2x16_split",
3 NIR_OP_TYPE_ALU,
4 1,
5 NIR_TYPE_UINT32,
6 2,
7 {1,1},
8 {NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32},
9 0
10 };
11 /* Combines the first component of each input to make a 2-component vector. */
12 static struct nir_op nir_vec2 = {
13 "vec2",
14 NIR_OP_TYPE_ALU,
15 2,
16 NIR_TYPE_UINT,
17 2,
18 {1,1},
19 {NIR_TYPE_UINT,NIR_TYPE_UINT},
20 0
21 };
File builders/mesa-vulkan-0/contrib/generators/nir/alu/generic/binop/reduce/all_sizes.c deleted (index 79df8a9..0000000)
1 /*============================================================================*/
2 /* b[1,8,16,32]all_fequal[2,3,4,8,16] */
3 static struct nir_op nir_ball_fequal2 = {
4 "ball_fequal2",
5 NIR_OP_TYPE_ALU,
6 1,
7 NIR_TYPE_BOOL1,
8 2,
9 {2,2},
10 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
11 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
12 };
13 static struct nir_op nir_ball_fequal3 = {
14 "ball_fequal3",
15 NIR_OP_TYPE_ALU,
16 1,
17 NIR_TYPE_BOOL1,
18 2,
19 {3,3},
20 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
21 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
22 };
23 static struct nir_op nir_ball_fequal4 = {
24 "ball_fequal4",
25 NIR_OP_TYPE_ALU,
26 1,
27 NIR_TYPE_BOOL1,
28 2,
29 {4,4},
30 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
31 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
32 };
33 static struct nir_op nir_ball_fequal8 = {
34 "ball_fequal8",
35 NIR_OP_TYPE_ALU,
36 1,
37 NIR_TYPE_BOOL1,
38 2,
39 {8,8},
40 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
41 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
42 };
43 static struct nir_op nir_ball_fequal16 = {
44 "ball_fequal16",
45 NIR_OP_TYPE_ALU,
46 1,
47 NIR_TYPE_BOOL1,
48 2,
49 {16,16},
50 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
51 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
52 };
53 /*----------------------------------------------------------------------------*/
54 static struct nir_op nir_b8all_fequal2 = {
55 "b8all_fequal2",
56 NIR_OP_TYPE_ALU,
57 1,
58 NIR_TYPE_BOOL8,
59 2,
60 {2,2},
61 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
62 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
63 };
64 static struct nir_op nir_b8all_fequal3 = {
65 "b8all_fequal3",
66 NIR_OP_TYPE_ALU,
67 1,
68 NIR_TYPE_BOOL8,
69 2,
70 {3,3},
71 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
72 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
73 };
74 static struct nir_op nir_b8all_fequal4 = {
75 "b8all_fequal4",
76 NIR_OP_TYPE_ALU,
77 1,
78 NIR_TYPE_BOOL8,
79 2,
80 {4,4},
81 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
82 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
83 };
84 static struct nir_op nir_b8all_fequal8 = {
85 "b8all_fequal8",
86 NIR_OP_TYPE_ALU,
87 1,
88 NIR_TYPE_BOOL8,
89 2,
90 {8,8},
91 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
92 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
93 };
94 static struct nir_op nir_b8all_fequal16 = {
95 "b8all_fequal16",
96 NIR_OP_TYPE_ALU,
97 1,
98 NIR_TYPE_BOOL8,
99 2,
100 {16,16},
101 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
102 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
103 };
104 /*----------------------------------------------------------------------------*/
105 static struct nir_op nir_b16all_fequal2 = {
106 "b16all_fequal2",
107 NIR_OP_TYPE_ALU,
108 1,
109 NIR_TYPE_BOOL16,
110 2,
111 {2,2},
112 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
113 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
114 };
115 static struct nir_op nir_b16all_fequal3 = {
116 "b16all_fequal3",
117 NIR_OP_TYPE_ALU,
118 1,
119 NIR_TYPE_BOOL16,
120 2,
121 {3,3},
122 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
123 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
124 };
125 static struct nir_op nir_b16all_fequal4 = {
126 "b16all_fequal4",
127 NIR_OP_TYPE_ALU,
128 1,
129 NIR_TYPE_BOOL16,
130 2,
131 {4,4},
132 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
133 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
134 };
135 static struct nir_op nir_b16all_fequal8 = {
136 "b16all_fequal8",
137 NIR_OP_TYPE_ALU,
138 1,
139 NIR_TYPE_BOOL16,
140 2,
141 {8,8},
142 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
143 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
144 };
145 static struct nir_op nir_b16all_fequal16 = {
146 "b16all_fequal16",
147 NIR_OP_TYPE_ALU,
148 1,
149 NIR_TYPE_BOOL16,
150 2,
151 {16,16},
152 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
153 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
154 };
155 /*----------------------------------------------------------------------------*/
156 static struct nir_op nir_b32all_fequal2 = {
157 "b32all_fequal2",
158 NIR_OP_TYPE_ALU,
159 1,
160 NIR_TYPE_BOOL32,
161 2,
162 {2,2},
163 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
164 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
165 };
166 static struct nir_op nir_b32all_fequal3 = {
167 "b32all_fequal3",
168 NIR_OP_TYPE_ALU,
169 1,
170 NIR_TYPE_BOOL32,
171 2,
172 {3,3},
173 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
174 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
175 };
176 static struct nir_op nir_b32all_fequal4 = {
177 "b32all_fequal4",
178 NIR_OP_TYPE_ALU,
179 1,
180 NIR_TYPE_BOOL32,
181 2,
182 {4,4},
183 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
184 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
185 };
186 static struct nir_op nir_b32all_fequal8 = {
187 "b32all_fequal8",
188 NIR_OP_TYPE_ALU,
189 1,
190 NIR_TYPE_BOOL32,
191 2,
192 {8,8},
193 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
194 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
195 };
196 static struct nir_op nir_b32all_fequal16 = {
197 "b32all_fequal16",
198 NIR_OP_TYPE_ALU,
199 1,
200 NIR_TYPE_BOOL32,
201 2,
202 {16,16},
203 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
204 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
205 };
206 /* b[1,8,16,32]all_fequal[2,3,4,8,16] */
207 /*============================================================================*/
208 /* b[1,8,16,32]any_fnequal[2,3,4,8,16] */
209 static struct nir_op nir_bany_fnequal2 = {
210 "bany_fnequal2",
211 NIR_OP_TYPE_ALU,
212 1,
213 NIR_TYPE_BOOL1,
214 2,
215 {2,2},
216 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
217 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
218 };
219 static struct nir_op nir_bany_fnequal3 = {
220 "bany_fnequal3",
221 NIR_OP_TYPE_ALU,
222 1,
223 NIR_TYPE_BOOL1,
224 2,
225 {3,3},
226 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
227 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
228 };
229 static struct nir_op nir_bany_fnequal4 = {
230 "bany_fnequal4",
231 NIR_OP_TYPE_ALU,
232 1,
233 NIR_TYPE_BOOL1,
234 2,
235 {4,4},
236 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
237 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
238 };
239 static struct nir_op nir_bany_fnequal8 = {
240 "bany_fnequal8",
241 NIR_OP_TYPE_ALU,
242 1,
243 NIR_TYPE_BOOL1,
244 2,
245 {8,8},
246 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
247 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
248 };
249 static struct nir_op nir_bany_fnequal16 = {
250 "bany_fnequal16",
251 NIR_OP_TYPE_ALU,
252 1,
253 NIR_TYPE_BOOL1,
254 2,
255 {16,16},
256 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
257 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
258 };
259 /*----------------------------------------------------------------------------*/
260 static struct nir_op nir_b8any_fnequal2 = {
261 "b8any_fnequal2",
262 NIR_OP_TYPE_ALU,
263 1,
264 NIR_TYPE_BOOL8,
265 2,
266 {2,2},
267 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
268 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
269 };
270 static struct nir_op nir_b8any_fnequal3 = {
271 "b8any_fnequal3",
272 NIR_OP_TYPE_ALU,
273 1,
274 NIR_TYPE_BOOL8,
275 2,
276 {3,3},
277 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
278 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
279 };
280 static struct nir_op nir_b8any_fnequal4 = {
281 "b8any_fnequal4",
282 NIR_OP_TYPE_ALU,
283 1,
284 NIR_TYPE_BOOL8,
285 2,
286 {4,4},
287 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
288 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
289 };
290 static struct nir_op nir_b8any_fnequal8 = {
291 "b8any_fnequal8",
292 NIR_OP_TYPE_ALU,
293 1,
294 NIR_TYPE_BOOL8,
295 2,
296 {8,8},
297 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
298 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
299 };
300 static struct nir_op nir_b8any_fnequal16 = {
301 "b8any_fnequal16",
302 NIR_OP_TYPE_ALU,
303 1,
304 NIR_TYPE_BOOL8,
305 2,
306 {16,16},
307 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
308 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
309 };
310 /*----------------------------------------------------------------------------*/
311 static struct nir_op nir_b16any_fnequal2 = {
312 "b16any_fnequal2",
313 NIR_OP_TYPE_ALU,
314 1,
315 NIR_TYPE_BOOL16,
316 2,
317 {2,2},
318 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
319 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
320 };
321 static struct nir_op nir_b16any_fnequal3 = {
322 "b16any_fnequal3",
323 NIR_OP_TYPE_ALU,
324 1,
325 NIR_TYPE_BOOL16,
326 2,
327 {3,3},
328 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
329 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
330 };
331 static struct nir_op nir_b16any_fnequal4 = {
332 "b16any_fnequal4",
333 NIR_OP_TYPE_ALU,
334 1,
335 NIR_TYPE_BOOL16,
336 2,
337 {4,4},
338 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
339 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
340 };
341 static struct nir_op nir_b16any_fnequal8 = {
342 "b16any_fnequal8",
343 NIR_OP_TYPE_ALU,
344 1,
345 NIR_TYPE_BOOL16,
346 2,
347 {8,8},
348 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
349 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
350 };
351 static struct nir_op nir_b16any_fnequal16 = {
352 "b16any_fnequal16",
353 NIR_OP_TYPE_ALU,
354 1,
355 NIR_TYPE_BOOL16,
356 2,
357 {16,16},
358 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
359 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
360 };
361 /*----------------------------------------------------------------------------*/
362 static struct nir_op nir_b32any_fnequal2 = {
363 "b32any_fnequal2",
364 NIR_OP_TYPE_ALU,
365 1,
366 NIR_TYPE_BOOL32,
367 2,
368 {2,2},
369 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
370 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
371 };
372 static struct nir_op nir_b32any_fnequal3 = {
373 "b32any_fnequal3",
374 NIR_OP_TYPE_ALU,
375 1,
376 NIR_TYPE_BOOL32,
377 2,
378 {3,3},
379 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
380 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
381 };
382 static struct nir_op nir_b32any_fnequal4 = {
383 "b32any_fnequal4",
384 NIR_OP_TYPE_ALU,
385 1,
386 NIR_TYPE_BOOL32,
387 2,
388 {4,4},
389 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
390 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
391 };
392 static struct nir_op nir_b32any_fnequal8 = {
393 "b32any_fnequal8",
394 NIR_OP_TYPE_ALU,
395 1,
396 NIR_TYPE_BOOL32,
397 2,
398 {8,8},
399 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
400 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
401 };
402 static struct nir_op nir_b32any_fnequal16 = {
403 "b32any_fnequal16",
404 NIR_OP_TYPE_ALU,
405 1,
406 NIR_TYPE_BOOL32,
407 2,
408 {16,16},
409 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
410 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
411 };
412 /* b[1,8,16,32]any_fnequal[2,3,4,8,16] */
413 /*============================================================================*/
414 /* b[1,8,16,32]all_iequal[2,3,4,8,16] */
415 static struct nir_op nir_ball_iequal2 = {
416 "ball_iequal2",
417 NIR_OP_TYPE_ALU,
418 1,
419 NIR_TYPE_BOOL1,
420 2,
421 {2,2},
422 {NIR_TYPE_INT,NIR_TYPE_INT},
423 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
424 };
425 static struct nir_op nir_ball_iequal3 = {
426 "ball_iequal3",
427 NIR_OP_TYPE_ALU,
428 1,
429 NIR_TYPE_BOOL1,
430 2,
431 {3,3},
432 {NIR_TYPE_INT,NIR_TYPE_INT},
433 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
434 };
435 static struct nir_op nir_ball_iequal4 = {
436 "ball_iequal4",
437 NIR_OP_TYPE_ALU,
438 1,
439 NIR_TYPE_BOOL1,
440 2,
441 {4,4},
442 {NIR_TYPE_INT,NIR_TYPE_INT},
443 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
444 };
445 static struct nir_op nir_ball_iequal8 = {
446 "ball_iequal8",
447 NIR_OP_TYPE_ALU,
448 1,
449 NIR_TYPE_BOOL1,
450 2,
451 {8,8},
452 {NIR_TYPE_INT,NIR_TYPE_INT},
453 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
454 };
455 static struct nir_op nir_ball_iequal16 = {
456 "ball_iequal16",
457 NIR_OP_TYPE_ALU,
458 1,
459 NIR_TYPE_BOOL1,
460 2,
461 {16,16},
462 {NIR_TYPE_INT,NIR_TYPE_INT},
463 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
464 };
465 /*----------------------------------------------------------------------------*/
466 static struct nir_op nir_b8all_iequal2 = {
467 "b8all_iequal2",
468 NIR_OP_TYPE_ALU,
469 1,
470 NIR_TYPE_BOOL8,
471 2,
472 {2,2},
473 {NIR_TYPE_INT,NIR_TYPE_INT},
474 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
475 };
476 static struct nir_op nir_b8all_iequal3 = {
477 "b8all_iequal3",
478 NIR_OP_TYPE_ALU,
479 1,
480 NIR_TYPE_BOOL8,
481 2,
482 {3,3},
483 {NIR_TYPE_INT,NIR_TYPE_INT},
484 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
485 };
486 static struct nir_op nir_b8all_iequal4 = {
487 "b8all_iequal4",
488 NIR_OP_TYPE_ALU,
489 1,
490 NIR_TYPE_BOOL8,
491 2,
492 {4,4},
493 {NIR_TYPE_INT,NIR_TYPE_INT},
494 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
495 };
496 static struct nir_op nir_b8all_iequal8 = {
497 "b8all_iequal8",
498 NIR_OP_TYPE_ALU,
499 1,
500 NIR_TYPE_BOOL8,
501 2,
502 {8,8},
503 {NIR_TYPE_INT,NIR_TYPE_INT},
504 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
505 };
506 static struct nir_op nir_b8all_iequal16 = {
507 "b8all_iequal16",
508 NIR_OP_TYPE_ALU,
509 1,
510 NIR_TYPE_BOOL8,
511 2,
512 {16,16},
513 {NIR_TYPE_INT,NIR_TYPE_INT},
514 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
515 };
516 /*----------------------------------------------------------------------------*/
517 static struct nir_op nir_b16all_iequal2 = {
518 "b16all_iequal2",
519 NIR_OP_TYPE_ALU,
520 1,
521 NIR_TYPE_BOOL16,
522 2,
523 {2,2},
524 {NIR_TYPE_INT,NIR_TYPE_INT},
525 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
526 };
527 static struct nir_op nir_b16all_iequal3 = {
528 "b16all_iequal3",
529 NIR_OP_TYPE_ALU,
530 1,
531 NIR_TYPE_BOOL16,
532 2,
533 {3,3},
534 {NIR_TYPE_INT,NIR_TYPE_INT},
535 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
536 };
537 static struct nir_op nir_b16all_iequal4 = {
538 "b16all_iequal4",
539 NIR_OP_TYPE_ALU,
540 1,
541 NIR_TYPE_BOOL16,
542 2,
543 {4,4},
544 {NIR_TYPE_INT,NIR_TYPE_INT},
545 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
546 };
547 static struct nir_op nir_b16all_iequal8 = {
548 "b16all_iequal8",
549 NIR_OP_TYPE_ALU,
550 1,
551 NIR_TYPE_BOOL16,
552 2,
553 {8,8},
554 {NIR_TYPE_INT,NIR_TYPE_INT},
555 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
556 };
557 static struct nir_op nir_b16all_iequal16 = {
558 "b16all_iequal16",
559 NIR_OP_TYPE_ALU,
560 1,
561 NIR_TYPE_BOOL16,
562 2,
563 {16,16},
564 {NIR_TYPE_INT,NIR_TYPE_INT},
565 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
566 };
567 /*----------------------------------------------------------------------------*/
568 static struct nir_op nir_b32all_iequal2 = {
569 "b32all_iequal2",
570 NIR_OP_TYPE_ALU,
571 1,
572 NIR_TYPE_BOOL32,
573 2,
574 {2,2},
575 {NIR_TYPE_INT,NIR_TYPE_INT},
576 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
577 };
578 static struct nir_op nir_b32all_iequal3 = {
579 "b32all_iequal3",
580 NIR_OP_TYPE_ALU,
581 1,
582 NIR_TYPE_BOOL32,
583 2,
584 {3,3},
585 {NIR_TYPE_INT,NIR_TYPE_INT},
586 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
587 };
588 static struct nir_op nir_b32all_iequal4 = {
589 "b32all_iequal4",
590 NIR_OP_TYPE_ALU,
591 1,
592 NIR_TYPE_BOOL32,
593 2,
594 {4,4},
595 {NIR_TYPE_INT,NIR_TYPE_INT},
596 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
597 };
598 static struct nir_op nir_b32all_iequal8 = {
599 "b32all_iequal8",
600 NIR_OP_TYPE_ALU,
601 1,
602 NIR_TYPE_BOOL32,
603 2,
604 {8,8},
605 {NIR_TYPE_INT,NIR_TYPE_INT},
606 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
607 };
608 static struct nir_op nir_b32all_iequal16 = {
609 "b32all_iequal16",
610 NIR_OP_TYPE_ALU,
611 1,
612 NIR_TYPE_BOOL32,
613 2,
614 {16,16},
615 {NIR_TYPE_INT,NIR_TYPE_INT},
616 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
617 };
618 /* b[1,8,16,32]all_iequal[2,3,4,8,16] */
619 /*============================================================================*/
620 /* b[1,8,16,32]any_inequal[2,3,4,8,16] */
621 static struct nir_op nir_bany_inequal2 = {
622 "bany_inequal2",
623 NIR_OP_TYPE_ALU,
624 1,
625 NIR_TYPE_BOOL1,
626 2,
627 {2,2},
628 {NIR_TYPE_INT,NIR_TYPE_INT},
629 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
630 };
631 static struct nir_op nir_bany_inequal3 = {
632 "bany_inequal3",
633 NIR_OP_TYPE_ALU,
634 1,
635 NIR_TYPE_BOOL1,
636 2,
637 {3,3},
638 {NIR_TYPE_INT,NIR_TYPE_INT},
639 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
640 };
641 static struct nir_op nir_bany_inequal4 = {
642 "bany_inequal4",
643 NIR_OP_TYPE_ALU,
644 1,
645 NIR_TYPE_BOOL1,
646 2,
647 {4,4},
648 {NIR_TYPE_INT,NIR_TYPE_INT},
649 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
650 };
651 static struct nir_op nir_bany_inequal8 = {
652 "bany_inequal8",
653 NIR_OP_TYPE_ALU,
654 1,
655 NIR_TYPE_BOOL1,
656 2,
657 {8,8},
658 {NIR_TYPE_INT,NIR_TYPE_INT},
659 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
660 };
661 static struct nir_op nir_bany_inequal16 = {
662 "bany_inequal16",
663 NIR_OP_TYPE_ALU,
664 1,
665 NIR_TYPE_BOOL1,
666 2,
667 {16,16},
668 {NIR_TYPE_INT,NIR_TYPE_INT},
669 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
670 };
671 /*----------------------------------------------------------------------------*/
672 static struct nir_op nir_b8any_inequal2 = {
673 "b8any_inequal2",
674 NIR_OP_TYPE_ALU,
675 1,
676 NIR_TYPE_BOOL8,
677 2,
678 {2,2},
679 {NIR_TYPE_INT,NIR_TYPE_INT},
680 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
681 };
682 static struct nir_op nir_b8any_inequal3 = {
683 "b8any_inequal3",
684 NIR_OP_TYPE_ALU,
685 1,
686 NIR_TYPE_BOOL8,
687 2,
688 {3,3},
689 {NIR_TYPE_INT,NIR_TYPE_INT},
690 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
691 };
692 static struct nir_op nir_b8any_inequal4 = {
693 "b8any_inequal4",
694 NIR_OP_TYPE_ALU,
695 1,
696 NIR_TYPE_BOOL8,
697 2,
698 {4,4},
699 {NIR_TYPE_INT,NIR_TYPE_INT},
700 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
701 };
702 static struct nir_op nir_b8any_inequal8 = {
703 "b8any_inequal8",
704 NIR_OP_TYPE_ALU,
705 1,
706 NIR_TYPE_BOOL8,
707 2,
708 {8,8},
709 {NIR_TYPE_INT,NIR_TYPE_INT},
710 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
711 };
712 static struct nir_op nir_b8any_inequal16 = {
713 "b8any_inequal16",
714 NIR_OP_TYPE_ALU,
715 1,
716 NIR_TYPE_BOOL8,
717 2,
718 {16,16},
719 {NIR_TYPE_INT,NIR_TYPE_INT},
720 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
721 };
722 /*----------------------------------------------------------------------------*/
723 static struct nir_op nir_b16any_inequal2 = {
724 "b16any_inequal2",
725 NIR_OP_TYPE_ALU,
726 1,
727 NIR_TYPE_BOOL16,
728 2,
729 {2,2},
730 {NIR_TYPE_INT,NIR_TYPE_INT},
731 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
732 };
733 static struct nir_op nir_b16any_inequal3 = {
734 "b16any_inequal3",
735 NIR_OP_TYPE_ALU,
736 1,
737 NIR_TYPE_BOOL16,
738 2,
739 {3,3},
740 {NIR_TYPE_INT,NIR_TYPE_INT},
741 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
742 };
743 static struct nir_op nir_b16any_inequal4 = {
744 "b16any_inequal4",
745 NIR_OP_TYPE_ALU,
746 1,
747 NIR_TYPE_BOOL16,
748 2,
749 {4,4},
750 {NIR_TYPE_INT,NIR_TYPE_INT},
751 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
752 };
753 static struct nir_op nir_b16any_inequal8 = {
754 "b16any_inequal8",
755 NIR_OP_TYPE_ALU,
756 1,
757 NIR_TYPE_BOOL16,
758 2,
759 {8,8},
760 {NIR_TYPE_INT,NIR_TYPE_INT},
761 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
762 };
763 static struct nir_op nir_b16any_inequal16 = {
764 "b16any_inequal16",
765 NIR_OP_TYPE_ALU,
766 1,
767 NIR_TYPE_BOOL16,
768 2,
769 {16,16},
770 {NIR_TYPE_INT,NIR_TYPE_INT},
771 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
772 };
773 /*----------------------------------------------------------------------------*/
774 static struct nir_op nir_b32any_inequal2 = {
775 "b32any_inequal2",
776 NIR_OP_TYPE_ALU,
777 1,
778 NIR_TYPE_BOOL32,
779 2,
780 {2,2},
781 {NIR_TYPE_INT,NIR_TYPE_INT},
782 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
783 };
784 static struct nir_op nir_b32any_inequal3 = {
785 "b32any_inequal3",
786 NIR_OP_TYPE_ALU,
787 1,
788 NIR_TYPE_BOOL32,
789 2,
790 {3,3},
791 {NIR_TYPE_INT,NIR_TYPE_INT},
792 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
793 };
794 static struct nir_op nir_b32any_inequal4 = {
795 "b32any_inequal4",
796 NIR_OP_TYPE_ALU,
797 1,
798 NIR_TYPE_BOOL32,
799 2,
800 {4,4},
801 {NIR_TYPE_INT,NIR_TYPE_INT},
802 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
803 };
804 static struct nir_op nir_b32any_inequal8 = {
805 "b32any_inequal8",
806 NIR_OP_TYPE_ALU,
807 1,
808 NIR_TYPE_BOOL32,
809 2,
810 {8,8},
811 {NIR_TYPE_INT,NIR_TYPE_INT},
812 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
813 };
814 static struct nir_op nir_b32any_inequal16 = {
815 "b32any_inequal16",
816 NIR_OP_TYPE_ALU,
817 1,
818 NIR_TYPE_BOOL32,
819 2,
820 {16,16},
821 {NIR_TYPE_INT,NIR_TYPE_INT},
822 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
823 };
824 /* b[1,8,16,32]any_inequal[2,3,4,8,16] */
File builders/mesa-vulkan-0/contrib/generators/nir/alu/generic/binop/reduce/reduce.c deleted (index f2193a6..0000000)
1 /* fall_fequal[2,3,4,8,16] */
2 static struct nir_op nir_fall_equal2 = {
3 "fall_equal2",
4 NIR_OP_TYPE_ALU,
5 1,
6 NIR_TYPE_FLOAT32,
7 2,
8 {2,2},
9 {NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32},
10 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
11 };
12 static struct nir_op nir_fall_equal3 = {
13 "fall_equal3",
14 NIR_OP_TYPE_ALU,
15 1,
16 NIR_TYPE_FLOAT32,
17 2,
18 {3,3},
19 {NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32},
20 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
21 };
22 static struct nir_op nir_fall_equal4 = {
23 "fall_equal4",
24 NIR_OP_TYPE_ALU,
25 1,
26 NIR_TYPE_FLOAT32,
27 2,
28 {4,4},
29 {NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32},
30 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
31 };
32 static struct nir_op nir_fall_equal8 = {
33 "fall_equal8",
34 NIR_OP_TYPE_ALU,
35 1,
36 NIR_TYPE_FLOAT32,
37 2,
38 {8,8},
39 {NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32},
40 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
41 };
42 static struct nir_op nir_fall_equal16 = {
43 "fall_equal16",
44 NIR_OP_TYPE_ALU,
45 1,
46 NIR_TYPE_FLOAT32,
47 2,
48 {16,16},
49 {NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32},
50 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
51 };
52 /* fall_fequal[2,3,4,8,16] */
53 /*============================================================================*/
54 /* fany_nequal[2,3,4,8,16] */
55 static struct nir_op nir_fany_nequal2 = {
56 "fany_nequal2",
57 NIR_OP_TYPE_ALU,
58 1,
59 NIR_TYPE_FLOAT32,
60 2,
61 {2,2},
62 {NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32},
63 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
64 };
65 static struct nir_op nir_fany_nequal3 = {
66 "fany_nequal3",
67 NIR_OP_TYPE_ALU,
68 1,
69 NIR_TYPE_FLOAT32,
70 2,
71 {3,3},
72 {NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32},
73 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
74 };
75 static struct nir_op nir_fany_nequal4 = {
76 "fany_nequal4",
77 NIR_OP_TYPE_ALU,
78 1,
79 NIR_TYPE_FLOAT32,
80 2,
81 {4,4},
82 {NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32},
83 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
84 };
85 static struct nir_op nir_fany_nequal8 = {
86 "fany_nequal8",
87 NIR_OP_TYPE_ALU,
88 1,
89 NIR_TYPE_FLOAT32,
90 2,
91 {8,8},
92 {NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32},
93 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
94 };
95 static struct nir_op nir_fany_nequal16 = {
96 "fany_nequal16",
97 NIR_OP_TYPE_ALU,
98 1,
99 NIR_TYPE_FLOAT32,
100 2,
101 {16,16},
102 {NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32},
103 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
104 };
105 /* fany_nequal[2,3,4,8,16] */
106 /*============================================================================*/
107 /* fdot[2,3,4,8,16] */
108 static struct nir_op nir_fdot2 = {
109 "fdot2",
110 NIR_OP_TYPE_ALU,
111 1,
112 NIR_TYPE_FLOAT,
113 2,
114 {2,2},
115 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
116 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
117 };
118 static struct nir_op nir_fdot3 = {
119 "fdot3",
120 NIR_OP_TYPE_ALU,
121 1,
122 NIR_TYPE_FLOAT,
123 2,
124 {3,3},
125 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
126 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
127 };
128 static struct nir_op nir_fdot4 = {
129 "fdot4",
130 NIR_OP_TYPE_ALU,
131 1,
132 NIR_TYPE_FLOAT,
133 2,
134 {4,4},
135 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
136 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
137 };
138 static struct nir_op nir_fdot8 = {
139 "fdot8",
140 NIR_OP_TYPE_ALU,
141 1,
142 NIR_TYPE_FLOAT,
143 2,
144 {8,8},
145 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
146 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
147 };
148 static struct nir_op nir_fdot16 = {
149 "fdot16",
150 NIR_OP_TYPE_ALU,
151 1,
152 NIR_TYPE_FLOAT,
153 2,
154 {16,16},
155 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
156 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
157 };
158 /* fdot[2,3,4,8,16] */
159 /*============================================================================*/
160 /* fdot_replicated[2,3,4,8,16] */
161 static struct nir_op nir_fdot_replicated2 = {
162 "fdot_replicated2",
163 NIR_OP_TYPE_ALU,
164 4,
165 NIR_TYPE_FLOAT,
166 2,
167 {2,2},
168 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
169 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
170 };
171 static struct nir_op nir_fdot_replicated3 = {
172 "fdot_replicated3",
173 NIR_OP_TYPE_ALU,
174 4,
175 NIR_TYPE_FLOAT,
176 2,
177 {3,3},
178 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
179 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
180 };
181 static struct nir_op nir_fdot_replicated4 = {
182 "fdot_replicated4",
183 NIR_OP_TYPE_ALU,
184 4,
185 NIR_TYPE_FLOAT,
186 2,
187 {4,4},
188 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
189 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
190 };
191 static struct nir_op nir_fdot_replicated8 = {
192 "fdot_replicated8",
193 NIR_OP_TYPE_ALU,
194 4,
195 NIR_TYPE_FLOAT,
196 2,
197 {8,8},
198 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
199 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
200 };
201 static struct nir_op nir_fdot_replicated16 = {
202 "fdot_replicated16",
203 NIR_OP_TYPE_ALU,
204 4,
205 NIR_TYPE_FLOAT,
206 2,
207 {16,16},
208 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
209 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
210 };
211 /* fdot_replicated[2,3,4,8,16] */
File builders/mesa-vulkan-0/contrib/generators/nir/alu/ir3/binop.c deleted (index 3a27500..0000000)
1 /*----------------------------------------------------------------------------*/
2 /* ir3-specific instruction that maps directly to ir3 mad.s24. */
3 /* 24b multiply into 32b result (with sign extension) */
4 static struct nir_op nir_imul24 = {
5 "imul24",
6 NIR_OP_TYPE_ALU,
7 0,
8 NIR_TYPE_INT32,
9 2,
10 {0,0},
11 {NIR_TYPE_INT32,NIR_TYPE_INT32},
12 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
13 };
14 /* unsigned 24b multiply into 32b result uint */
15 static struct nir_op nir_umul24 = {
16 "umul24",
17 NIR_OP_TYPE_ALU,
18 0,
19 NIR_TYPE_UINT32,
20 2,
21 {0,0},
22 {NIR_TYPE_UINT32,NIR_TYPE_UINT32},
23 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE | NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE
24 };
25 /* ir3-specific instruction that maps directly to ir3 mad.s24. */
26 /*----------------------------------------------------------------------------*/
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/amd/amd.c deleted (index 41f0aa7..0000000)
1 /* AMD Shader ballot operations */
2 struct nir_intrinsic nir_quad_swizzle_amd = {
3 .name = "quad_swizzle_amd",
4 .has_dest = true,
5 .idxs_n = 1,
6 .idxs_map = {
7 [NIR_INTRINSIC_IDX_SWIZZLE_MASK] = 1
8 },
9 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
10 };
11 struct nir_intrinsic nir_masked_swizzle_amd = {
12 .name = "masked_swizzle_amd",
13 .has_dest = true,
14 .idxs_n = 1,
15 .idxs_map = {
16 [NIR_INTRINSIC_IDX_SWIZZLE_MASK] = 1
17 },
18 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
19 };
20 struct nir_intrinsic nir_write_invocation_amd = {
21 .name = "write_invocation_amd",
22 .srcs_n = 3,
23 .src_components_n = {
24 0,0,1
25 },
26 .has_dest = true,
27 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
28 };
29 struct nir_intrinsic nir_mbcnt_amd = {
30 .name = "mbcnt_amd",
31 .srcs_n = 1,
32 .src_components_n = {
33 1
34 },
35 .has_dest = true,
36 .dest_components_n = 1,
37 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
38 };
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/amd/r600/load.c deleted (index b563c36..0000000)
1 /*
2 * R600 specific instrincs
3 *
4 * R600 can only fetch 16 byte aligned data from an UBO, and the actual offset
5 * is given in vec4 units, so we have to fetch the a vec4 and get the component
6 * later
7 * src[] = { buffer_index, offset }.
8 */
9 struct nir_intrinsic nir_load_ubo_r600 = {
10 .name = "load_ubo_r600",
11 .srcs_n = 2,
12 .src_components_n = {
13 1,1
14 },
15 .has_dest = true,
16 .idxs_n = 3,
17 .idxs_map = {
18 [NIR_INTRINSIC_IDX_ACCESS] = 1,
19 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 2,
20 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 3
21 },
22 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
23 };
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/amd/r600/r600.c deleted (index 3752601..0000000)
1 /* load as many components as needed giving per-component addresses */
2 struct nir_intrinsic nir_load_local_shared_r600 = {
3 .name = "load_local_shared_r600",
4 .srcs_n = 1,
5 .src_components_n = {
6 0
7 },
8 .has_dest = true,
9 .idxs_n = 1,
10 .idxs_map = {
11 [NIR_INTRINSIC_IDX_COMPONENT] = 1
12 },
13 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
14 };
15
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/amd/r600/store.c deleted (index 27ef34f..0000000)
1 struct nir_intrinsic nir_store_local_shared_r600 = {
2 .name = "store_local_shared_r600",
3 .srcs_n = 2,
4 .src_components_n = {
5 0,1
6 },
7 .idxs_n = 1,
8 .idxs_map = {
9 [NIR_INTRINSIC_IDX_WRMASK] = 1
10 }
11 };
12 struct nir_intrinsic nir_store_tf_r600 = {
13 .name = "store_tf_r600",
14 .srcs_n = 1,
15 .src_components_n = {
16 0
17 }
18 };
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/amd/r600/system_values.c deleted (index cf676f0..0000000)
1 /*----------------------------------------------------------------------------*/
2 /* location where the tesselation data is stored in LDS */
3 static struct nir_intrinsic nir_load_tcs_in_param_base_r600 = {
4 .name = "load_tcs_in_param_base_r600",
5 .has_dest = true,
6 .dest_components_n = 4,
7 .bit_szs = 0x20,
8 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
9 .system_value = true
10 };
11 static struct nir_intrinsic nir_load_tcs_out_param_base_r600 = {
12 .name = "load_tcs_out_param_base_r600",
13 .has_dest = true,
14 .dest_components_n = 4,
15 .bit_szs = 0x20,
16 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
17 .system_value = true
18 };
19 static struct nir_intrinsic nir_load_tcs_rel_patch_id_r600 = {
20 .name = "load_tcs_rel_patch_id_r600",
21 .has_dest = true,
22 .dest_components_n = 1,
23 .bit_szs = 0x20,
24 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
25 .system_value = true
26 };
27 static struct nir_intrinsic nir_load_tcs_tess_factor_base_r600 = {
28 .name = "load_tcs_tell_factor_base_r600",
29 .has_dest = true,
30 .dest_components_n = 1,
31 .bit_szs = 0x20,
32 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
33 .system_value = true
34 };
35 /*----------------------------------------------------------------------------*/
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/amd/system_values.c deleted (index 3d1244c..0000000)
1 /* System value for internal compute shaders in radeonsi. */
2 static struct nir_intrinsic nir_load_user_data_amd = {
3 .name = "load_user_data_amd",
4 .has_dest = true,
5 .dest_components_n = 4,
6 .bit_szs = 0x20,
7 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
8 .system_value = true
9 };
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/generic/barycentric.c deleted (index 9349979..0000000)
1 /*
2 * Barycentric coordinate intrinsics.
3 *
4 * These set up the barycentric coordinates for a particular interpolation.
5 * The first four are for the simple cases: pixel, centroid, per-sample
6 * (at gl_SampleID), or pull model (1/W, 1/I, 1/J) at the pixel center. The next
7 * three two handle interpolating at a specified sample location, or
8 * interpolating with a vec2 offset,
9 *
10 * The interp_mode index should be either the INTERP_MODE_SMOOTH or
11 * INTERP_MODE_NOPERSPECTIVE enum values.
12 *
13 * The vec2 value produced by these intrinsics is intended for use as the
14 * barycoord source of a load_interpolated_input intrinsic.
15 */
16 /*----------------------------------------------------------------------------*/
17 /* no source */
18 struct nir_intrinsic nir_load_barycentric_pixel = {
19 .name = "load_barycentric_pixel",
20 .srcs_n = 0,
21 .has_dest = true,
22 .dest_components_n = 2,
23 .idxs_n = 1,
24 .idxs_map = {
25 [NIR_INTRINSIC_IDX_INTERP_MODE] = 1
26 },
27 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
28 };
29 struct nir_intrinsic nir_load_barycentric_centroid = {
30 .name = "load_barycentric_centroid",
31 .srcs_n = 0,
32 .has_dest = true,
33 .dest_components_n = 2,
34 .idxs_n = 1,
35 .idxs_map = {
36 [NIR_INTRINSIC_IDX_INTERP_MODE] = 1
37 },
38 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
39 };
40 struct nir_intrinsic nir_load_barycentric_sample = {
41 .name = "load_barycentric_sample",
42 .srcs_n = 0,
43 .has_dest = true,
44 .dest_components_n = 2,
45 .idxs_n = 1,
46 .idxs_map = {
47 [NIR_INTRINSIC_IDX_INTERP_MODE] = 1
48 },
49 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
50 };
51 struct nir_intrinsic nir_load_barycentric_model = {
52 .name = "load_barycentric_model",
53 .srcs_n = 0,
54 .has_dest = true,
55 .dest_components_n = 3,
56 .idxs_n = 1,
57 .idxs_map = {
58 [NIR_INTRINSIC_IDX_INTERP_MODE] = 1
59 },
60 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
61 };
62 /* no source */
63 /*----------------------------------------------------------------------------*/
64 /* src[] = { offset.xy } */
65 struct nir_intrinsic nir_load_barycentric_at_offset = {
66 .name = "load_barycentric_at_offset",
67 .srcs_n = 1,
68 .src_components_n = {
69 2
70 },
71 .has_dest = true,
72 .dest_components_n = 2,
73 .idxs_n = 1,
74 .idxs_map = {
75 [NIR_INTRINSIC_IDX_INTERP_MODE] = 1
76 },
77 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
78 };
79 /* src[] = { sample_id } */
80 struct nir_intrinsic nir_load_barycentric_at_sample = {
81 .name = "load_barycentric_at_sample",
82 .srcs_n = 1,
83 .src_components_n = {
84 1
85 },
86 .has_dest = true,
87 .dest_components_n = 2,
88 .idxs_n = 1,
89 .idxs_map = {
90 [NIR_INTRINSIC_IDX_INTERP_MODE] = 1
91 },
92 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
93 };
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/generic/generic.c deleted (index 8550298..0000000)
1 struct nir_intrinsic nir_convert_alu_types = {
2 .name = "convert_alu_types",
3 .srcs_n = 1,
4 .src_components_n = {
5 0
6 },
7 .has_dest = true,
8 .idxs_n = 4,
9 .idxs_map = {
10 [NIR_INTRINSIC_IDX_SRC_TYPE] = 1,
11 [NIR_INTRINSIC_IDX_DEST_TYPE] = 2,
12 [NIR_INTRINSIC_IDX_ROUNDING_MODE] = 3,
13 [NIR_INTRINSIC_IDX_SATURATE] = 4
14 },
15 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
16 };
17 struct nir_intrinsic nir_atomic_counter_add = {
18 .name = "atomic_counter_add",
19 .srcs_n = 2,
20 .src_components_n = {
21 1,1
22 },
23 .has_dest = true,
24 .dest_components_n = 1,
25 .idxs_n = 1,
26 .idxs_map = {
27 [NIR_INTRINSIC_IDX_BASE] = 1
28 }
29 };
30 struct nir_intrinsic nir_atomic_counter_add_deref = {
31 .name = "atomic_counter_add_deref",
32 .srcs_n = 2,
33 .src_components_n = {
34 -1,1
35 },
36 .has_dest = true,
37 .dest_components_n = 1
38 };
39 struct nir_intrinsic nir_atomic_counter_and = {
40 .name = "atomic_counter_and",
41 .srcs_n = 2,
42 .src_components_n = {
43 1,1
44 },
45 .has_dest = true,
46 .dest_components_n = 1,
47 .idxs_n = 1,
48 .idxs_map = {
49 [NIR_INTRINSIC_IDX_BASE] = 1
50 }
51 };
52 struct nir_intrinsic nir_atomic_counter_and_deref = {
53 .name = "atomic_counter_and_deref",
54 .srcs_n = 2,
55 .src_components_n = {
56 -1,1
57 },
58 .has_dest = true,
59 .dest_components_n = 1
60 };
61 struct nir_intrinsic nir_atomic_counter_comp_swap = {
62 .name = "atomic_counter_comp_swap",
63 .srcs_n = 3,
64 .src_components_n = {
65 1,1,1
66 },
67 .has_dest = true,
68 .dest_components_n = 1,
69 .idxs_n = 1,
70 .idxs_map = {
71 [NIR_INTRINSIC_IDX_BASE] = 1
72 }
73 };
74 struct nir_intrinsic nir_atomic_counter_comp_swap_deref = {
75 .name = "atomic_counter_comp_swap_deref",
76 .srcs_n = 3,
77 .src_components_n = {
78 -1,1,1
79 },
80 .has_dest = true,
81 .dest_components_n = 1
82 };
83 struct nir_intrinsic nir_atomic_counter_exchange = {
84 .name = "atomic_counter_exchange",
85 .srcs_n = 2,
86 .src_components_n = {
87 1,1
88 },
89 .has_dest = true,
90 .dest_components_n = 1,
91 .idxs_n = 1,
92 .idxs_map = {
93 [NIR_INTRINSIC_IDX_BASE] = 1
94 }
95 };
96 struct nir_intrinsic nir_atomic_counter_exchange_deref = {
97 .name = "atomic_counter_exchange_deref",
98 .srcs_n = 2,
99 .src_components_n = {
100 -1,1
101 },
102 .has_dest = true,
103 .dest_components_n = 1
104 };
105 struct nir_intrinsic nir_atomic_counter_inc = {
106 .name = "atomic_counter_inc",
107 .srcs_n = 1,
108 .src_components_n = {
109 1
110 },
111 .has_dest = true,
112 .dest_components_n = 1,
113 .idxs_n = 1,
114 .idxs_map = {
115 [NIR_INTRINSIC_IDX_BASE] = 1
116 }
117 };
118 struct nir_intrinsic nir_atomic_counter_inc_deref = {
119 .name = "atomic_counter_inc_deref",
120 .srcs_n = 1,
121 .src_components_n = {
122 -1
123 },
124 .has_dest = true,
125 .dest_components_n = 1
126 };
127 struct nir_intrinsic nir_atomic_counter_max = {
128 .name = "atomic_counter_max",
129 .srcs_n = 2,
130 .src_components_n = {
131 1,1
132 },
133 .has_dest = true,
134 .dest_components_n = 1,
135 .idxs_n = 1,
136 .idxs_map = {
137 [NIR_INTRINSIC_IDX_BASE] = 1
138 }
139 };
140 struct nir_intrinsic nir_atomic_counter_max_deref = {
141 .name = "atomic_counter_max_deref",
142 .srcs_n = 2,
143 .src_components_n = {
144 -1,1
145 },
146 .has_dest = true,
147 .dest_components_n = 1
148 };
149 struct nir_intrinsic nir_atomic_counter_min = {
150 .name = "atomic_counter_min",
151 .srcs_n = 2,
152 .src_components_n = {
153 1,1
154 },
155 .has_dest = true,
156 .dest_components_n = 1,
157 .idxs_n = 1,
158 .idxs_map = {
159 [NIR_INTRINSIC_IDX_BASE] = 1
160 }
161 };
162 struct nir_intrinsic nir_atomic_counter_min_deref = {
163 .name = "atomic_counter_min_deref",
164 .srcs_n = 2,
165 .src_components_n = {
166 -1,1
167 },
168 .has_dest = true,
169 .dest_components_n = 1
170 };
171 struct nir_intrinsic nir_atomic_counter_or = {
172 .name = "atomic_counter_or",
173 .srcs_n = 2,
174 .src_components_n = {
175 1,1
176 },
177 .has_dest = true,
178 .dest_components_n = 1,
179 .idxs_n = 1,
180 .idxs_map = {
181 [NIR_INTRINSIC_IDX_BASE] = 1
182 }
183 };
184 struct nir_intrinsic nir_atomic_counter_or_deref = {
185 .name = "atomic_counter_or_deref",
186 .srcs_n = 2,
187 .src_components_n = {
188 -1,1
189 },
190 .has_dest = true,
191 .dest_components_n = 1
192 };
193 struct nir_intrinsic nir_atomic_counter_post_dec = {
194 .name = "atomic_counter_post_dec",
195 .srcs_n = 1,
196 .src_components_n = {
197 1
198 },
199 .has_dest = true,
200 .dest_components_n = 1,
201 .idxs_n = 1,
202 .idxs_map = {
203 [NIR_INTRINSIC_IDX_BASE] = 1
204 }
205 };
206 struct nir_intrinsic nir_atomic_counter_post_dec_deref = {
207 .name = "atomic_counter_post_dec_deref",
208 .srcs_n = 1,
209 .src_components_n = {
210 -1
211 },
212 .has_dest = true,
213 .dest_components_n = 1
214 };
215 struct nir_intrinsic nir_atomic_counter_pre_dec = {
216 .name = "atomic_counter_pre_dec",
217 .srcs_n = 1,
218 .src_components_n = {
219 1
220 },
221 .has_dest = true,
222 .dest_components_n = 1,
223 .idxs_n = 1,
224 .idxs_map = {
225 [NIR_INTRINSIC_IDX_BASE] = 1
226 }
227 };
228 struct nir_intrinsic nir_atomic_counter_pre_dec_deref = {
229 .name = "atomic_counter_pre_dec_deref",
230 .srcs_n = 1,
231 .src_components_n = {
232 -1
233 },
234 .has_dest = true,
235 .dest_components_n = 1
236 };
237 struct nir_intrinsic nir_atomic_counter_read = {
238 .name = "atomic_counter_read",
239 .srcs_n = 1,
240 .src_components_n = {
241 1
242 },
243 .has_dest = true,
244 .dest_components_n = 1,
245 .idxs_n = 1,
246 .idxs_map = {
247 [NIR_INTRINSIC_IDX_BASE] = 1
248 },
249 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
250 };
251 struct nir_intrinsic nir_atomic_counter_read_deref = {
252 .name = "atomic_counter_read_deref",
253 .srcs_n = 1,
254 .src_components_n = {
255 -1
256 },
257 .has_dest = true,
258 .dest_components_n = 1,
259 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
260 };
261 struct nir_intrinsic nir_atomic_counter_xor = {
262 .name = "atomic_counter_xor",
263 .srcs_n = 2,
264 .src_components_n = {
265 1,1
266 },
267 .has_dest = true,
268 .dest_components_n = 1,
269 .idxs_n = 1,
270 .idxs_map = {
271 [NIR_INTRINSIC_IDX_BASE] = 1
272 }
273 };
274 struct nir_intrinsic nir_atomic_counter_xor_deref = {
275 .name = "atomic_counter_xor_deref",
276 .srcs_n = 2,
277 .src_components_n = {
278 -1,1
279 },
280 .has_dest = true,
281 .dest_components_n = 1
282 };
283 struct nir_intrinsic nir_ballot = {
284 .name = "ballot",
285 .srcs_n = 1,
286 .src_components_n = {
287 1
288 },
289 .has_dest = true,
290 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
291 };
292 struct nir_intrinsic nir_ballot_bit_count_exclusive = {
293 .name = "ballot_bit_count_exclusive",
294 .srcs_n = 1,
295 .src_components_n = {
296 4
297 },
298 .has_dest = true,
299 .dest_components_n = 1,
300 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
301 };
302 struct nir_intrinsic nir_ballot_bit_count_inclusive = {
303 .name = "ballot_bit_count_inclusive",
304 .srcs_n = 1,
305 .src_components_n = {
306 4
307 },
308 .has_dest = true,
309 .dest_components_n = 1,
310 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
311 };
312 struct nir_intrinsic nir_ballot_bit_count_reduce = {
313 .name = "ballot_bit_count_reduce",
314 .srcs_n = 1,
315 .src_components_n = {
316 4
317 },
318 .has_dest = true,
319 .dest_components_n = 1,
320 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
321 };
322 struct nir_intrinsic nir_ballot_bitfield_extract = {
323 .name = "ballot_bitfield_extract",
324 .srcs_n = 2,
325 .src_components_n = {
326 4,1
327 },
328 .has_dest = true,
329 .dest_components_n = 1,
330 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
331 };
332 struct nir_intrinsic nir_ballot_find_lsb = {
333 .name = "ballot_find_lsb",
334 .srcs_n = 1,
335 .src_components_n = {
336 4
337 },
338 .has_dest = true,
339 .dest_components_n = 1,
340 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
341 };
342 struct nir_intrinsic nir_ballot_find_msb = {
343 .name = "ballot_find_msb",
344 .srcs_n = 1,
345 .src_components_n = {
346 4
347 },
348 .has_dest = true,
349 .dest_components_n = 1,
350 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
351 };
352 struct nir_intrinsic nir_barrier = {
353 .name = "barrier"
354 };
355 struct nir_intrinsic nir_begin_invocation_interlock = {
356 .name = "begin_invocation_interlock"
357 };
358 struct nir_intrinsic nir_copy_deref = {
359 .name = "copy_deref",
360 .srcs_n = 2,
361 .src_components_n = {
362 -1,-1
363 },
364 .idxs_n = 2,
365 .idxs_map = {
366 [NIR_INTRINSIC_IDX_DST_ACCESS] = 1,
367 [NIR_INTRINSIC_IDX_SRC_ACCESS] = 2
368 }
369 };
370 struct nir_intrinsic nir_memcpy_deref = {
371 .name = "memcpy_deref",
372 .srcs_n = 3,
373 .src_components_n = {
374 -1,-1,1
375 },
376 .idxs_n = 2,
377 .idxs_map = {
378 [NIR_INTRINSIC_IDX_DST_ACCESS] = 1,
379 [NIR_INTRINSIC_IDX_SRC_ACCESS] = 2
380 }
381 };
382 struct nir_intrinsic nir_deref_atomic_add = {
383 .name = "deref_atomic_add",
384 .srcs_n = 2,
385 .src_components_n = {
386 -1,1
387 },
388 .has_dest = true,
389 .dest_components_n = 1,
390 .idxs_n = 1,
391 .idxs_map = {
392 [NIR_INTRINSIC_IDX_ACCESS] = 1
393 }
394 };
395 struct nir_intrinsic nir_deref_atomic_and = {
396 .name = "deref_atomic_and",
397 .srcs_n = 2,
398 .src_components_n = {
399 -1,1
400 },
401 .has_dest = true,
402 .dest_components_n = 1,
403 .idxs_n = 1,
404 .idxs_map = {
405 [NIR_INTRINSIC_IDX_ACCESS] = 1
406 }
407 };
408 struct nir_intrinsic nir_deref_atomic_comp_swap = {
409 .name = "deref_atomic_comp_swap",
410 .srcs_n = 3,
411 .src_components_n = {
412 -1,1,1
413 },
414 .has_dest = true,
415 .dest_components_n = 1,
416 .idxs_n = 1,
417 .idxs_map = {
418 [NIR_INTRINSIC_IDX_ACCESS] = 1
419 }
420 };
421 struct nir_intrinsic nir_deref_atomic_exchange = {
422 .name = "deref_atomic_exchange",
423 .srcs_n = 2,
424 .src_components_n = {
425 -1,1
426 },
427 .has_dest = true,
428 .dest_components_n = 1,
429 .idxs_n = 1,
430 .idxs_map = {
431 [NIR_INTRINSIC_IDX_ACCESS] = 1
432 }
433 };
434 struct nir_intrinsic nir_deref_atomic_fadd = {
435 .name = "deref_atomic_fadd",
436 .srcs_n = 2,
437 .src_components_n = {
438 -1,1
439 },
440 .has_dest = true,
441 .dest_components_n = 1,
442 .idxs_n = 1,
443 .idxs_map = {
444 [NIR_INTRINSIC_IDX_ACCESS] = 1
445 }
446 };
447 struct nir_intrinsic nir_deref_atomic_fcomp_swap = {
448 .name = "deref_atomic_fcomp_swap",
449 .srcs_n = 3,
450 .src_components_n = {
451 -1,1,1
452 },
453 .has_dest = true,
454 .dest_components_n = 1,
455 .idxs_n = 1,
456 .idxs_map = {
457 [NIR_INTRINSIC_IDX_ACCESS] = 1
458 }
459 };
460 struct nir_intrinsic nir_deref_atomic_fmax = {
461 .name = "deref_atomic_fmax",
462 .srcs_n = 2,
463 .src_components_n = {
464 -1,1
465 },
466 .has_dest = true,
467 .dest_components_n = 1,
468 .idxs_n = 1,
469 .idxs_map = {
470 [NIR_INTRINSIC_IDX_ACCESS] = 1
471 }
472 };
473 struct nir_intrinsic nir_deref_atomic_fmin = {
474 .name = "deref_atomic_fmin",
475 .srcs_n = 2,
476 .src_components_n = {
477 -1,1
478 },
479 .has_dest = true,
480 .dest_components_n = 1,
481 .idxs_n = 1,
482 .idxs_map = {
483 [NIR_INTRINSIC_IDX_ACCESS] = 1
484 }
485 };
486 struct nir_intrinsic nir_deref_atomic_imax = {
487 .name = "deref_atomic_imax",
488 .srcs_n = 2,
489 .src_components_n = {
490 -1,1
491 },
492 .has_dest = true,
493 .dest_components_n = 1,
494 .idxs_n = 1,
495 .idxs_map = {
496 [NIR_INTRINSIC_IDX_ACCESS] = 1
497 }
498 };
499 struct nir_intrinsic nir_deref_atomic_imin = {
500 .name = "deref_atomic_imin",
501 .srcs_n = 2,
502 .src_components_n = {
503 -1,1
504 },
505 .has_dest = true,
506 .dest_components_n = 1,
507 .idxs_n = 1,
508 .idxs_map = {
509 [NIR_INTRINSIC_IDX_ACCESS] = 1
510 }
511 };
512 struct nir_intrinsic nir_deref_atomic_or = {
513 .name = "deref_atomic_or",
514 .srcs_n = 2,
515 .src_components_n = {
516 -1,1
517 },
518 .has_dest = true,
519 .dest_components_n = 1,
520 .idxs_n = 1,
521 .idxs_map = {
522 [NIR_INTRINSIC_IDX_ACCESS] = 1
523 }
524 };
525 struct nir_intrinsic nir_deref_atomic_umax = {
526 .name = "deref_atomic_umax",
527 .srcs_n = 2,
528 .src_components_n = {
529 -1,1
530 },
531 .has_dest = true,
532 .dest_components_n = 1,
533 .idxs_n = 1,
534 .idxs_map = {
535 [NIR_INTRINSIC_IDX_ACCESS] = 1
536 }
537 };
538 struct nir_intrinsic nir_deref_atomic_umin = {
539 .name = "deref_atomic_umin",
540 .srcs_n = 2,
541 .src_components_n = {
542 -1,1
543 },
544 .has_dest = true,
545 .dest_components_n = 1,
546 .idxs_n = 1,
547 .idxs_map = {
548 [NIR_INTRINSIC_IDX_ACCESS] = 1
549 }
550 };
551 struct nir_intrinsic nir_deref_atomic_xor = {
552 .name = "deref_atomic_xor",
553 .srcs_n = 2,
554 .src_components_n = {
555 -1,1
556 },
557 .has_dest = true,
558 .dest_components_n = 1,
559 .idxs_n = 1,
560 .idxs_map = {
561 [NIR_INTRINSIC_IDX_ACCESS] = 1
562 }
563 };
564 struct nir_intrinsic nir_discard = {
565 .name = "discard"
566 };
567
568 /******************************************************************************/
569 /* A conditional discard/demote, with a single boolean source. */
570 struct nir_intrinsic nir_discard_if = {
571 .name = "discard_if",
572 .srcs_n = 1,
573 .src_components_n = {
574 1
575 }
576 };
577 struct nir_intrinsic nir_demote_if = {
578 .name = "demote_if",
579 .srcs_n = 1,
580 .src_components_n = {
581 1
582 }
583 };
584 /******************************************************************************/
585 struct nir_intrinsic nir_elect = {
586 .name = "elect",
587 .has_dest = true,
588 .dest_components_n = 1,
589 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
590 };
591 struct nir_intrinsic nir_emit_vertex = {
592 .name = "emit_vertex",
593 .idxs_n = 1,
594 .idxs_map = {
595 [NIR_INTRINSIC_IDX_STREAM_ID] = 1
596 }
597 };
598 /*
599 * These contain two additional unsigned integer sources:
600 * 1. The total number of vertices emitted so far.
601 * 2. The number of vertices emitted for the current primitive
602 * so far if we're counting, otherwise undef.
603 */
604 struct nir_intrinsic nir_emit_vertex_with_counter = {
605 .name = "emit_vertex_with_counter",
606 .srcs_n = 2,
607 .src_components_n = {
608 1, 1
609 },
610 .idxs_n = 1,
611 .idxs_map = {
612 [NIR_INTRINSIC_IDX_STREAM_ID] = 1
613 }
614 };
615 struct nir_intrinsic nir_end_primitive_with_counter = {
616 .name = "end_primitive_with_counter",
617 .srcs_n = 2,
618 .src_components_n = {
619 1, 1
620 },
621 .idxs_n = 1,
622 .idxs_map = {
623 [NIR_INTRINSIC_IDX_STREAM_ID] = 1
624 }
625 };
626 /* Contains the final total vertex and primitive counts in the current GS thread. */
627 struct nir_intrinsic nir_set_vertex_and_primitive_count = {
628 .name = "set_vertex_and_primitive_count",
629 .srcs_n = 2,
630 .src_components_n = {
631 1, 1
632 },
633 .idxs_n = 1,
634 .idxs_map = {
635 [NIR_INTRINSIC_IDX_STREAM_ID] = 1
636 }
637 };
638 struct nir_intrinsic nir_end_invocation_interlock = {
639 .name = "end_invocation_interlock"
640 };
641 struct nir_intrinsic nir_end_primitive = {
642 .name = "end_primitive",
643 .idxs_n = 1,
644 .idxs_map = {
645 [NIR_INTRINSIC_IDX_STREAM_ID] = 1
646 }
647 };
648 struct nir_intrinsic nir_exclusive_scan = {
649 .name = "exclusive_scan",
650 .srcs_n = 1,
651 .src_components_n = {
652 0
653 },
654 .has_dest = true,
655 .idxs_n = 1,
656 .idxs_map = {
657 [NIR_INTRINSIC_IDX_REDUCTION_OP] = 1
658 },
659 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
660 };
661 struct nir_intrinsic nir_first_invocation = {
662 .name = "first_invocation",
663 .has_dest = true,
664 .dest_components_n = 1,
665 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
666 };
667 /*
668 * Ask the driver for the size of a given SSBO. It takes the buffer index
669 * as source.
670 */
671 struct nir_intrinsic nir_get_ssbo_size = {
672 .name = "get_ssbo_size",
673 .srcs_n = 1,
674 .src_components_n = {
675 1
676 },
677 .has_dest = true,
678 .dest_components_n = 1,
679 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
680 };
681 struct nir_intrinsic nir_global_atomic_add = {
682 .name = "global_atomic_add",
683 .srcs_n = 2,
684 .src_components_n = {
685 1,1
686 },
687 .has_dest = true,
688 .dest_components_n = 1,
689 .idxs_n = 1,
690 .idxs_map = {
691 [NIR_INTRINSIC_IDX_BASE] = 1
692 }
693 };
694 struct nir_intrinsic nir_global_atomic_and = {
695 .name = "global_atomic_and",
696 .srcs_n = 2,
697 .src_components_n = {
698 1,1
699 },
700 .has_dest = true,
701 .dest_components_n = 1,
702 .idxs_n = 1,
703 .idxs_map = {
704 [NIR_INTRINSIC_IDX_BASE] = 1
705 }
706 };
707 struct nir_intrinsic nir_global_atomic_comp_swap = {
708 .name = "global_atomic_comp_swap",
709 .srcs_n = 3,
710 .src_components_n = {
711 1,1,1
712 },
713 .has_dest = true,
714 .dest_components_n = 1,
715 .idxs_n = 1,
716 .idxs_map = {
717 [NIR_INTRINSIC_IDX_BASE] = 1
718 }
719 };
720 struct nir_intrinsic nir_global_atomic_exchange = {
721 .name = "global_atomic_exchange",
722 .srcs_n = 2,
723 .src_components_n = {
724 1,1
725 },
726 .has_dest = true,
727 .dest_components_n = 1,
728 .idxs_n = 1,
729 .idxs_map = {
730 [NIR_INTRINSIC_IDX_BASE] = 1
731 }
732 };
733 struct nir_intrinsic nir_global_atomic_fadd = {
734 .name = "global_atomic_fadd",
735 .srcs_n = 2,
736 .src_components_n = {
737 1,1
738 },
739 .has_dest = true,
740 .dest_components_n = 1,
741 .idxs_n = 1,
742 .idxs_map = {
743 [NIR_INTRINSIC_IDX_BASE] = 1
744 }
745 };
746 struct nir_intrinsic nir_global_atomic_fcomp_swap = {
747 .name = "global_atomic_fcomp_swap",
748 .srcs_n = 3,
749 .src_components_n = {
750 1,1,1
751 },
752 .has_dest = true,
753 .dest_components_n = 1,
754 .idxs_n = 1,
755 .idxs_map = {
756 [NIR_INTRINSIC_IDX_BASE] = 1
757 }
758 };
759 struct nir_intrinsic nir_global_atomic_fmax = {
760 .name = "global_atomic_fmax",
761 .srcs_n = 2,
762 .src_components_n = {
763 1,1
764 },
765 .has_dest = true,
766 .dest_components_n = 1,
767 .idxs_n = 1,
768 .idxs_map = {
769 [NIR_INTRINSIC_IDX_BASE] = 1
770 }
771 };
772 struct nir_intrinsic nir_global_atomic_fmin = {
773 .name = "global_atomic_fmin",
774 .srcs_n = 2,
775 .src_components_n = {
776 1,1
777 },
778 .has_dest = true,
779 .dest_components_n = 1,
780 .idxs_n = 1,
781 .idxs_map = {
782 [NIR_INTRINSIC_IDX_BASE] = 1
783 }
784 };
785 struct nir_intrinsic nir_global_atomic_imax = {
786 .name = "global_atomic_imax",
787 .srcs_n = 2,
788 .src_components_n = {
789 1,1
790 },
791 .has_dest = true,
792 .dest_components_n = 1,
793 .idxs_n = 1,
794 .idxs_map = {
795 [NIR_INTRINSIC_IDX_BASE] = 1
796 }
797 };
798 struct nir_intrinsic nir_global_atomic_imin = {
799 .name = "global_atomic_imin",
800 .srcs_n = 2,
801 .src_components_n = {
802 1,1
803 },
804 .has_dest = true,
805 .dest_components_n = 1,
806 .idxs_n = 1,
807 .idxs_map = {
808 [NIR_INTRINSIC_IDX_BASE] = 1
809 }
810 };
811 struct nir_intrinsic nir_global_atomic_or = {
812 .name = "global_atomic_or",
813 .srcs_n = 2,
814 .src_components_n = {
815 1,1
816 },
817 .has_dest = true,
818 .dest_components_n = 1,
819 .idxs_n = 1,
820 .idxs_map = {
821 [NIR_INTRINSIC_IDX_BASE] = 1
822 }
823 };
824 struct nir_intrinsic nir_global_atomic_umax = {
825 .name = "global_atomic_umax",
826 .srcs_n = 2,
827 .src_components_n = {
828 1,1
829 },
830 .has_dest = true,
831 .dest_components_n = 1,
832 .idxs_n = 1,
833 .idxs_map = {
834 [NIR_INTRINSIC_IDX_BASE] = 1
835 }
836 };
837 struct nir_intrinsic nir_global_atomic_umin = {
838 .name = "global_atomic_umin",
839 .srcs_n = 2,
840 .src_components_n = {
841 1,1
842 },
843 .has_dest = true,
844 .dest_components_n = 1,
845 .idxs_n = 1,
846 .idxs_map = {
847 [NIR_INTRINSIC_IDX_BASE] = 1
848 }
849 };
850 struct nir_intrinsic nir_global_atomic_xor = {
851 .name = "global_atomic_xor",
852 .srcs_n = 2,
853 .src_components_n = {
854 1,1
855 },
856 .has_dest = true,
857 .dest_components_n = 1,
858 .idxs_n = 1,
859 .idxs_map = {
860 [NIR_INTRINSIC_IDX_BASE] = 1
861 }
862 };
863 struct nir_intrinsic nir_group_memory_barrier = {
864 .name = "group_memory_barrier"
865 };
866 struct nir_intrinsic nir_inclusive_scan = {
867 .name = "inclusive_scan",
868 .srcs_n = 1,
869 .src_components_n = {
870 0
871 },
872 .has_dest = true,
873 .idxs_n = 1,
874 .idxs_map = {
875 [NIR_INTRINSIC_IDX_REDUCTION_OP] = 1
876 },
877 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
878 };
879 struct nir_intrinsic nir_load_deref = {
880 .name = "load_deref",
881 .srcs_n = 1,
882 .src_components_n = {
883 -1
884 },
885 .has_dest = true,
886 .idxs_n = 1,
887 .idxs_map = {
888 [NIR_INTRINSIC_IDX_ACCESS] = 1
889 },
890 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
891 };
892
893 /*
894 * Load sample position:
895 *
896 * Takes a sample # and returns a sample position. Used for lowering
897 * interpolateAtSample() to interpolateAtOffset()
898 */
899 struct nir_intrinsic nir_load_sample_pos_from_id = {
900 .name = "load_sample_pos_from_id",
901 .srcs_n = 1,
902 .src_components_n = {
903 1
904 },
905 .has_dest = true,
906 .dest_components_n = 2,
907 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
908 };
909
910 /* Loads what I believe is the primitive size, for scaling ij to pixel size: */
911 struct nir_intrinsic nir_load_size_ir3 = {
912 .name = "load_size_ir3",
913 .has_dest = true,
914 .dest_components_n = 1,
915 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
916 };
917
918 /*
919 * Fragment shader input interpolation delta intrinsic.
920 *
921 * For hw where fragment shader input interpolation is handled in shader, the
922 * load_fs_input_interp deltas intrinsics can be used to load the input deltas
923 * used for interpolation as follows:
924 *
925 * vec3 iid = load_fs_input_interp_deltas(varying_slot)
926 * vec2 bary = load_barycentric_*(...)
927 * float result = iid.x + iid.y * bary.y + iid.z * bary.x
928 */
929 struct nir_intrinsic nir_load_fs_input_interp_deltas = {
930 .name = "load_fs_input_interp_deltas",
931 .srcs_n = 1,
932 .src_components_n = {
933 1
934 },
935 .has_dest = true,
936 .dest_components_n = 3,
937 .idxs_n = 3,
938 .idxs_map = {
939 [NIR_INTRINSIC_IDX_BASE] = 1,
940 [NIR_INTRINSIC_IDX_COMPONENT] = 2,
941 [NIR_INTRINSIC_IDX_IO_SEMANTICS] = 3
942 },
943 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
944 };
945 struct nir_intrinsic nir_load_param = {
946 .name = "load_param",
947 .srcs_n = 0,
948 .has_dest = true,
949 .idxs_n = 1,
950 .idxs_map = {
951 [NIR_INTRINSIC_IDX_PARAM_IDX] = 1
952 },
953 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
954 };
955 struct nir_intrinsic nir_load_vulkan_descriptor = {
956 .name = "load_vulkan_descriptor",
957 .srcs_n = 1,
958 .src_components_n = {
959 1
960 },
961 .has_dest = true,
962 .idxs_n = 1,
963 .idxs_map = {
964 [NIR_INTRINSIC_IDX_DESC_TYPE] = 1
965 },
966 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
967 };
968 /*
969 * Memory barrier with semantics analogous to the memoryBarrier() GLSL
970 * intrinsic.
971 */
972 struct nir_intrinsic nir_memory_barrier = {
973 .name = "memory_barrier"
974 };
975 /*
976 * Control/Memory barrier with explicit scope. Follows the semantics of SPIR-V
977 * OpMemoryBarrier and OpControlBarrier, used to implement Vulkan Memory Model.
978 * Storage that the barrier applies is represented using NIR variable modes.
979 * For an OpMemoryBarrier, set EXECUTION_SCOPE to NIR_SCOPE_NONE.
980 */
981 struct nir_intrinsic nir_scoped_barrier = {
982 .name = "scoped_barrier",
983 .idxs_n = 4,
984 .idxs_map = {
985 [NIR_INTRINSIC_IDX_EXECUTION_SCOPE] = 1,
986 [NIR_INTRINSIC_IDX_MEMORY_SEMANTICS] = 2,
987 [NIR_INTRINSIC_IDX_MEMORY_MODES] = 3,
988 [NIR_INTRINSIC_IDX_MEMORY_SCOPE] = 4
989 }
990 };
991 struct nir_intrinsic nir_memory_barrier_atomic_counter = {
992 .name = "memory_barrier_atomic_counter"
993 };
994 struct nir_intrinsic nir_memory_barrier_buffer = {
995 .name = "memory_barrier_buffer"
996 };
997 struct nir_intrinsic nir_memory_barrier_image = {
998 .name = "memory_barrier_image"
999 };
1000 struct nir_intrinsic nir_memory_barrier_shared = {
1001 .name = "memory_barrier_shared"
1002 };
1003 struct nir_intrinsic nir_nop = {
1004 .name = "nop",
1005 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1006 };
1007 struct nir_intrinsic nir_quad_broadcast = {
1008 .name = "quad_broadcast",
1009 .srcs_n = 2,
1010 .src_components_n = {
1011 0,1
1012 },
1013 .has_dest = true,
1014 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1015 };
1016 struct nir_intrinsic nir_quad_swap_diagonal = {
1017 .name = "quad_swap_diagonal",
1018 .srcs_n = 1,
1019 .src_components_n = {
1020 0
1021 },
1022 .has_dest = true,
1023 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1024 };
1025 struct nir_intrinsic nir_quad_swap_horizontal = {
1026 .name = "quad_swap_horizontal",
1027 .srcs_n = 1,
1028 .src_components_n = {
1029 0
1030 },
1031 .has_dest = true,
1032 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1033 };
1034 struct nir_intrinsic nir_quad_swap_vertical = {
1035 .name = "quad_swap_vertical",
1036 .srcs_n = 1,
1037 .src_components_n = {
1038 0
1039 },
1040 .has_dest = true,
1041 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1042 };
1043 struct nir_intrinsic nir_read_first_invocation = {
1044 .name = "read_first_invocation",
1045 .srcs_n = 1,
1046 .src_components_n = {
1047 0
1048 },
1049 .has_dest = true,
1050 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1051 };
1052 struct nir_intrinsic nir_read_invocation = {
1053 .name = "read_invocation",
1054 .srcs_n = 2,
1055 .src_components_n = {
1056 0,1
1057 },
1058 .has_dest = true,
1059 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1060 };
1061 struct nir_intrinsic nir_reduce = {
1062 .name = "reduce",
1063 .srcs_n = 1,
1064 .src_components_n = {
1065 0
1066 },
1067 .has_dest = true,
1068 .idxs_n = 2,
1069 .idxs_map = {
1070 [NIR_INTRINSIC_IDX_REDUCTION_OP] = 1,
1071 [NIR_INTRINSIC_IDX_CLUSTER_SIZE] = 2
1072 },
1073 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1074 };
1075 struct nir_intrinsic nir_shader_clock = {
1076 .name = "shader_clock",
1077 .has_dest = true,
1078 .dest_components_n = 2,
1079 .idxs_n = 1,
1080 .idxs_map = {
1081 [NIR_INTRINSIC_IDX_MEMORY_SCOPE] = 1
1082 },
1083 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1084 };
1085 struct nir_intrinsic nir_shared_atomic_add = {
1086 .name = "shared_atomic_add",
1087 .srcs_n = 2,
1088 .src_components_n = {
1089 1,1
1090 },
1091 .has_dest = true,
1092 .dest_components_n = 1,
1093 .idxs_n = 1,
1094 .idxs_map = {
1095 [NIR_INTRINSIC_IDX_BASE] = 1
1096 }
1097 };
1098 struct nir_intrinsic nir_shared_atomic_and = {
1099 .name = "shared_atomic_and",
1100 .srcs_n = 2,
1101 .src_components_n = {
1102 1,1
1103 },
1104 .has_dest = true,
1105 .dest_components_n = 1,
1106 .idxs_n = 1,
1107 .idxs_map = {
1108 [NIR_INTRINSIC_IDX_BASE] = 1
1109 }
1110 };
1111 struct nir_intrinsic nir_shared_atomic_comp_swap = {
1112 .name = "shared_atomic_comp_swap",
1113 .srcs_n = 3,
1114 .src_components_n = {
1115 1,1,1
1116 },
1117 .has_dest = true,
1118 .dest_components_n = 1,
1119 .idxs_n = 1,
1120 .idxs_map = {
1121 [NIR_INTRINSIC_IDX_BASE] = 1
1122 }
1123 };
1124 struct nir_intrinsic nir_shared_atomic_exchange = {
1125 .name = "shared_atomic_exchange",
1126 .srcs_n = 2,
1127 .src_components_n = {
1128 1,1
1129 },
1130 .has_dest = true,
1131 .dest_components_n = 1,
1132 .idxs_n = 1,
1133 .idxs_map = {
1134 [NIR_INTRINSIC_IDX_BASE] = 1
1135 }
1136 };
1137 struct nir_intrinsic nir_shared_atomic_fadd = {
1138 .name = "shared_atomic_fadd",
1139 .srcs_n = 2,
1140 .src_components_n = {
1141 1,1
1142 },
1143 .has_dest = true,
1144 .dest_components_n = 1,
1145 .idxs_n = 1,
1146 .idxs_map = {
1147 [NIR_INTRINSIC_IDX_BASE] = 1
1148 }
1149 };
1150 struct nir_intrinsic nir_shared_atomic_fcomp_swap = {
1151 .name = "shared_atomic_fcomp_swap",
1152 .srcs_n = 3,
1153 .src_components_n = {
1154 1,1,1
1155 },
1156 .has_dest = true,
1157 .dest_components_n = 1,
1158 .idxs_n = 1,
1159 .idxs_map = {
1160 [NIR_INTRINSIC_IDX_BASE] = 1
1161 }
1162 };
1163 struct nir_intrinsic nir_shared_atomic_fmax = {
1164 .name = "shared_atomic_fmax",
1165 .srcs_n = 2,
1166 .src_components_n = {
1167 1,1
1168 },
1169 .has_dest = true,
1170 .dest_components_n = 1,
1171 .idxs_n = 1,
1172 .idxs_map = {
1173 [NIR_INTRINSIC_IDX_BASE] = 1
1174 }
1175 };
1176 struct nir_intrinsic nir_shared_atomic_fmin = {
1177 .name = "shared_atomic_fmin",
1178 .srcs_n = 2,
1179 .src_components_n = {
1180 1,1
1181 },
1182 .has_dest = true,
1183 .dest_components_n = 1,
1184 .idxs_n = 1,
1185 .idxs_map = {
1186 [NIR_INTRINSIC_IDX_BASE] = 1
1187 }
1188 };
1189 struct nir_intrinsic nir_shared_atomic_imax = {
1190 .name = "shared_atomic_imax",
1191 .srcs_n = 2,
1192 .src_components_n = {
1193 1,1
1194 },
1195 .has_dest = true,
1196 .dest_components_n = 1,
1197 .idxs_n = 1,
1198 .idxs_map = {
1199 [NIR_INTRINSIC_IDX_BASE] = 1
1200 }
1201 };
1202 struct nir_intrinsic nir_shared_atomic_imin = {
1203 .name = "shared_atomic_imin",
1204 .srcs_n = 2,
1205 .src_components_n = {
1206 1,1
1207 },
1208 .has_dest = true,
1209 .dest_components_n = 1,
1210 .idxs_n = 1,
1211 .idxs_map = {
1212 [NIR_INTRINSIC_IDX_BASE] = 1
1213 }
1214 };
1215 struct nir_intrinsic nir_shared_atomic_or = {
1216 .name = "shared_atomic_or",
1217 .srcs_n = 2,
1218 .src_components_n = {
1219 1,1
1220 },
1221 .has_dest = true,
1222 .dest_components_n = 1,
1223 .idxs_n = 1,
1224 .idxs_map = {
1225 [NIR_INTRINSIC_IDX_BASE] = 1
1226 }
1227 };
1228 struct nir_intrinsic nir_shared_atomic_umax = {
1229 .name = "shared_atomic_umax",
1230 .srcs_n = 2,
1231 .src_components_n = {
1232 1,1
1233 },
1234 .has_dest = true,
1235 .dest_components_n = 1,
1236 .idxs_n = 1,
1237 .idxs_map = {
1238 [NIR_INTRINSIC_IDX_BASE] = 1
1239 }
1240 };
1241 struct nir_intrinsic nir_shared_atomic_umin = {
1242 .name = "shared_atomic_umin",
1243 .srcs_n = 2,
1244 .src_components_n = {
1245 1,1
1246 },
1247 .has_dest = true,
1248 .dest_components_n = 1,
1249 .idxs_n = 1,
1250 .idxs_map = {
1251 [NIR_INTRINSIC_IDX_BASE] = 1
1252 }
1253 };
1254 struct nir_intrinsic nir_shared_atomic_xor = {
1255 .name = "shared_atomic_xor",
1256 .srcs_n = 2,
1257 .src_components_n = {
1258 1,1
1259 },
1260 .has_dest = true,
1261 .dest_components_n = 1,
1262 .idxs_n = 1,
1263 .idxs_map = {
1264 [NIR_INTRINSIC_IDX_BASE] = 1
1265 }
1266 };
1267 struct nir_intrinsic nir_shuffle = {
1268 .name = "shuffle",
1269 .srcs_n = 2,
1270 .src_components_n = {
1271 0,1
1272 },
1273 .has_dest = true,
1274 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1275 };
1276 struct nir_intrinsic nir_shuffle_down = {
1277 .name = "shuffle_down",
1278 .srcs_n = 2,
1279 .src_components_n = {
1280 0,1
1281 },
1282 .has_dest = true,
1283 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1284 };
1285 struct nir_intrinsic nir_shuffle_up = {
1286 .name = "shuffle_up",
1287 .srcs_n = 2,
1288 .src_components_n = {
1289 0,1
1290 },
1291 .has_dest = true,
1292 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1293 };
1294 struct nir_intrinsic nir_shuffle_xor = {
1295 .name = "shuffle_xor",
1296 .srcs_n = 2,
1297 .src_components_n = {
1298 0,1
1299 },
1300 .has_dest = true,
1301 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1302 };
1303 /******************************************************************************/
1304 /* ssbo atomic -- start */
1305 struct nir_intrinsic nir_ssbo_atomic_add = {
1306 .name = "ssbo_atomic_add",
1307 .srcs_n = 3,
1308 .src_components_n = {
1309 -1,1,1
1310 },
1311 .has_dest = true,
1312 .dest_components_n = 1,
1313 .idxs_n = 1,
1314 .idxs_map = {
1315 [NIR_INTRINSIC_IDX_ACCESS] = 1
1316 }
1317 };
1318 struct nir_intrinsic nir_ssbo_atomic_and = {
1319 .name = "ssbo_atomic_and",
1320 .srcs_n = 3,
1321 .src_components_n = {
1322 -1,1,1
1323 },
1324 .has_dest = true,
1325 .dest_components_n = 1,
1326 .idxs_n = 1,
1327 .idxs_map = {
1328 [NIR_INTRINSIC_IDX_ACCESS] = 1
1329 }
1330 };
1331 struct nir_intrinsic nir_ssbo_atomic_comp_swap = {
1332 .name = "ssbo_atomic_comp_swap",
1333 .srcs_n = 4,
1334 .src_components_n = {
1335 -1,1,1,1
1336 },
1337 .has_dest = true,
1338 .dest_components_n = 1,
1339 .idxs_n = 1,
1340 .idxs_map = {
1341 [NIR_INTRINSIC_IDX_ACCESS] = 1
1342 }
1343 };
1344 struct nir_intrinsic nir_ssbo_atomic_exchange = {
1345 .name = "ssbo_atomic_exchange",
1346 .srcs_n = 3,
1347 .src_components_n = {
1348 -1,1,1
1349 },
1350 .has_dest = true,
1351 .dest_components_n = 1,
1352 .idxs_n = 1,
1353 .idxs_map = {
1354 [NIR_INTRINSIC_IDX_ACCESS] = 1
1355 }
1356 };
1357 struct nir_intrinsic nir_ssbo_atomic_fadd = {
1358 .name = "ssbo_atomic_fadd",
1359 .srcs_n = 3,
1360 .src_components_n = {
1361 -1,1,1
1362 },
1363 .has_dest = true,
1364 .dest_components_n = 1,
1365 .idxs_n = 1,
1366 .idxs_map = {
1367 [NIR_INTRINSIC_IDX_ACCESS] = 1
1368 }
1369 };
1370 struct nir_intrinsic nir_ssbo_atomic_fcomp_swap = {
1371 .name = "ssbo_atomic_fcomp_swap",
1372 .srcs_n = 4,
1373 .src_components_n = {
1374 -1,1,1,1
1375 },
1376 .has_dest = true,
1377 .dest_components_n = 1,
1378 .idxs_n = 1,
1379 .idxs_map = {
1380 [NIR_INTRINSIC_IDX_ACCESS] = 1
1381 }
1382 };
1383 struct nir_intrinsic nir_ssbo_atomic_fmax = {
1384 .name = "ssbo_atomic_fmax",
1385 .srcs_n = 3,
1386 .src_components_n = {
1387 -1,1,1
1388 },
1389 .has_dest = true,
1390 .dest_components_n = 1,
1391 .idxs_n = 1,
1392 .idxs_map = {
1393 [NIR_INTRINSIC_IDX_ACCESS] = 1
1394 }
1395 };
1396 struct nir_intrinsic nir_ssbo_atomic_fmin = {
1397 .name = "ssbo_atomic_fmin",
1398 .srcs_n = 3,
1399 .src_components_n = {
1400 -1,1,1
1401 },
1402 .has_dest = true,
1403 .dest_components_n = 1,
1404 .idxs_n = 1,
1405 .idxs_map = {
1406 [NIR_INTRINSIC_IDX_ACCESS] = 1
1407 }
1408 };
1409 struct nir_intrinsic nir_ssbo_atomic_imax = {
1410 .name = "ssbo_atomic_imax",
1411 .srcs_n = 3,
1412 .src_components_n = {
1413 -1,1,1
1414 },
1415 .has_dest = true,
1416 .dest_components_n = 1,
1417 .idxs_n = 1,
1418 .idxs_map = {
1419 [NIR_INTRINSIC_IDX_ACCESS] = 1
1420 }
1421 };
1422 struct nir_intrinsic nir_ssbo_atomic_imin = {
1423 .name = "ssbo_atomic_imin",
1424 .srcs_n = 3,
1425 .src_components_n = {
1426 -1,1,1
1427 },
1428 .has_dest = true,
1429 .dest_components_n = 1,
1430 .idxs_n = 1,
1431 .idxs_map = {
1432 [NIR_INTRINSIC_IDX_ACCESS] = 1
1433 }
1434 };
1435 struct nir_intrinsic nir_ssbo_atomic_or = {
1436 .name = "ssbo_atomic_or",
1437 .srcs_n = 3,
1438 .src_components_n = {
1439 -1,1,1
1440 },
1441 .has_dest = true,
1442 .dest_components_n = 1,
1443 .idxs_n = 1,
1444 .idxs_map = {
1445 [NIR_INTRINSIC_IDX_ACCESS] = 1
1446 }
1447 };
1448 struct nir_intrinsic nir_ssbo_atomic_umax = {
1449 .name = "ssbo_atomic_umax",
1450 .srcs_n = 3,
1451 .src_components_n = {
1452 -1,1,1
1453 },
1454 .has_dest = true,
1455 .dest_components_n = 1,
1456 .idxs_n = 1,
1457 .idxs_map = {
1458 [NIR_INTRINSIC_IDX_ACCESS] = 1
1459 }
1460 };
1461 struct nir_intrinsic nir_ssbo_atomic_umin = {
1462 .name = "ssbo_atomic_umin",
1463 .srcs_n = 3,
1464 .src_components_n = {
1465 -1,1,1
1466 },
1467 .has_dest = true,
1468 .dest_components_n = 1,
1469 .idxs_n = 1,
1470 .idxs_map = {
1471 [NIR_INTRINSIC_IDX_ACCESS] = 1
1472 }
1473 };
1474 struct nir_intrinsic nir_ssbo_atomic_xor = {
1475 .name = "ssbo_atomic_xor",
1476 .srcs_n = 3,
1477 .src_components_n = {
1478 -1,1,1
1479 },
1480 .has_dest = true,
1481 .dest_components_n = 1,
1482 .idxs_n = 1,
1483 .idxs_map = {
1484 [NIR_INTRINSIC_IDX_ACCESS] = 1
1485 }
1486 };
1487 /* ssbo atomic -- end */
1488 /******************************************************************************/
1489 struct nir_intrinsic nir_store_deref = {
1490 .name = "store_deref",
1491 .srcs_n = 2,
1492 .src_components_n = {
1493 -1,0
1494 },
1495 .idxs_n = 2,
1496 .idxs_map = {
1497 [NIR_INTRINSIC_IDX_WRMASK] = 1,
1498 [NIR_INTRINSIC_IDX_ACCESS] = 2
1499 }
1500 };
1501 struct nir_intrinsic nir_vote_all = {
1502 .name = "vote_all",
1503 .srcs_n = 1,
1504 .src_components_n = {
1505 1
1506 },
1507 .has_dest = true,
1508 .dest_components_n = 1,
1509 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1510 };
1511 struct nir_intrinsic nir_vote_any = {
1512 .name = "vote_any",
1513 .srcs_n = 1,
1514 .src_components_n = {
1515 1
1516 },
1517 .has_dest = true,
1518 .dest_components_n = 1,
1519 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1520 };
1521 struct nir_intrinsic nir_vote_feq = {
1522 .name = "vote_feq",
1523 .srcs_n = 1,
1524 .src_components_n = {
1525 0
1526 },
1527 .has_dest = true,
1528 .dest_components_n = 1,
1529 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1530 };
1531 struct nir_intrinsic nir_vote_ieq = {
1532 .name = "vote_ieq",
1533 .srcs_n = 1,
1534 .src_components_n = {
1535 0
1536 },
1537 .has_dest = true,
1538 .dest_components_n = 1,
1539 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1540 };
1541 struct nir_intrinsic nir_vulkan_resource_index = {
1542 .name = "vulkan_resource_index",
1543 .srcs_n = 1,
1544 .src_components_n = {
1545 1
1546 },
1547 .has_dest = true,
1548 .dest_components_n = 1,
1549 .idxs_n = 3,
1550 .idxs_map = {
1551 [NIR_INTRINSIC_IDX_DESC_SET] = 1,
1552 [NIR_INTRINSIC_IDX_BINDING] = 2,
1553 [NIR_INTRINSIC_IDX_DESC_TYPE] = 3
1554 },
1555 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
1556 };
1557 struct nir_intrinsic nir_vulkan_resource_reindex = {
1558 .name = "vulkan_resource_reindex",
1559 .srcs_n = 2,
1560 .src_components_n = {
1561 1,1
1562 },
1563 .has_dest = true,
1564 .dest_components_n = 1,
1565 .idxs_n = 1,
1566 .idxs_map = {
1567 [NIR_INTRINSIC_IDX_DESC_TYPE] = 1
1568 },
1569 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
1570 };
1571
1572 /* Gets the length of an unsized array at the end of a buffer */
1573 struct nir_intrinsic nir_deref_buffer_array_length = {
1574 .name = "deref_buffer_array_length",
1575 .srcs_n = 1,
1576 .src_components_n = {
1577 -1
1578 },
1579 .has_dest = true,
1580 .dest_components_n = 1,
1581 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
1582 };
1583
1584 /******************************************************************************/
1585 /*
1586 * Demote fragment shader invocation to a helper invocation. Any stores to
1587 * memory after this instruction are suppressed and the fragment does not write
1588 * outputs to the framebuffer. Unlike discard, demote needs to ensure that
1589 * derivatives will still work for invocations that were not demoted.
1590 *
1591 * As specified by SPV_EXT_demote_to_helper_invocation.
1592 */
1593 struct nir_intrinsic nir_demote = {
1594 .name = "demote"
1595 };
1596 struct nir_intrinsic nir_is_helper_invocation= {
1597 .name = "is_helper_invocation",
1598 .has_dest = true,
1599 .dest_components_n = 1,
1600 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
1601 };
1602 /* Demote related */
1603 /******************************************************************************/
1604 /*
1605 * A workgroup-level control barrier. Any thread which hits this barrier will
1606 * pause until all threads within the current workgroup have also hit the
1607 * barrier. For compute shaders, the workgroup is defined as the local group.
1608 * For tessellation control shaders, the workgroup is defined as the current
1609 * patch. This intrinsic does not imply any sort of memory barrier.
1610 */
1611 struct nir_intrinsic nir_control_barrier = {
1612 .name = "control_barrier"
1613 };
1614 /* Memory barrier for synchronizing TCS patch outputs */
1615 struct nir_intrinsic nir_memory_barrier_tcs_patch = {
1616 .name = "memory_barrier_tcs_patch"
1617 };
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/generic/image.c deleted (index ab89f74..0000000)
1 /*
2 * Image load, store and atomic intrinsics.
3 *
4 * All image intrinsics come in three versions. One which take an image target
5 * passed as a deref chain as the first source, one which takes an index as the
6 * first source, and one which takes a bindless handle as the first source.
7 * In the first version, the image variable contains the memory and layout
8 * qualifiers that influence the semantics of the intrinsic. In the second and
9 * third, the image format and access qualifiers are provided as constant
10 * indices.
11 *
12 * All image intrinsics take a four-coordinate vector and a sample index as
13 * 2nd and 3rd sources, determining the location within the image that will be
14 * accessed by the intrinsic. Components not applicable to the image target
15 * in use are undefined. Image store takes an additional four-component
16 * argument with the value to be written, and image atomic operations take
17 * either one or two additional scalar arguments with the same meaning as in
18 * the ARB_shader_image_load_store specification.
19 */
20 /*----------------------------------------------------------------------------*/
21 /* deref version */
22 struct nir_intrinsic nir_image_deref_load = {
23 .name = "image_deref_load",
24 .srcs_n = 4,
25 .src_components_n = {
26 1,4,1,1
27 },
28 .has_dest = true,
29 .dest_components_n = 0,
30 .idxs_n = 2,
31 .idxs_map = {
32 [NIR_INTRINSIC_IDX_ACCESS] = 1,
33 [NIR_INTRINSIC_IDX_DEST_TYPE] = 2
34 },
35 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
36 };
37 struct nir_intrinsic nir_image_deref_store = {
38 .name = "image_deref_store",
39 .srcs_n = 5,
40 .src_components_n = {
41 1,4,1,0,1
42 },
43 .idxs_n = 2,
44 .idxs_map = {
45 [NIR_INTRINSIC_IDX_ACCESS] = 1,
46 [NIR_INTRINSIC_IDX_SRC_TYPE] = 2
47 }
48 };
49 struct nir_intrinsic nir_image_deref_atomic_add = {
50 .name = "image_deref_atomic_add",
51 .srcs_n = 4,
52 .src_components_n = {
53 1,4,1,1
54 },
55 .has_dest = true,
56 .dest_components_n = 1,
57 .idxs_n = 1,
58 .idxs_map = {
59 [NIR_INTRINSIC_IDX_ACCESS] = 1
60 }
61 };
62 struct nir_intrinsic nir_image_deref_atomic_imin = {
63 .name = "image_deref_atomic_imin",
64 .srcs_n = 4,
65 .src_components_n = {
66 1,4,1,1
67 },
68 .has_dest = true,
69 .dest_components_n = 1,
70 .idxs_n = 1,
71 .idxs_map = {
72 [NIR_INTRINSIC_IDX_ACCESS] = 1
73 }
74 };
75 struct nir_intrinsic nir_image_deref_atomic_imax = {
76 .name = "image_deref_atomic_imax",
77 .srcs_n = 4,
78 .src_components_n = {
79 1,4,1,1
80 },
81 .has_dest = true,
82 .dest_components_n = 1,
83 .idxs_n = 1,
84 .idxs_map = {
85 [NIR_INTRINSIC_IDX_ACCESS] = 1
86 }
87 };
88 struct nir_intrinsic nir_image_deref_atomic_umin = {
89 .name = "image_deref_atomic_umin",
90 .srcs_n = 4,
91 .src_components_n = {
92 1,4,1,1
93 },
94 .has_dest = true,
95 .dest_components_n = 1,
96 .idxs_n = 1,
97 .idxs_map = {
98 [NIR_INTRINSIC_IDX_ACCESS] = 1
99 }
100 };
101 struct nir_intrinsic nir_image_deref_atomic_umax = {
102 .name = "image_deref_atomic_umax",
103 .srcs_n = 4,
104 .src_components_n = {
105 1,4,1,1
106 },
107 .has_dest = true,
108 .dest_components_n = 1,
109 .idxs_n = 1,
110 .idxs_map = {
111 [NIR_INTRINSIC_IDX_ACCESS] = 1
112 }
113 };
114 struct nir_intrinsic nir_image_deref_atomic_and = {
115 .name = "image_deref_atomic_and",
116 .srcs_n = 4,
117 .src_components_n = {
118 1,4,1,1
119 },
120 .has_dest = true,
121 .dest_components_n = 1,
122 .idxs_n = 1,
123 .idxs_map = {
124 [NIR_INTRINSIC_IDX_ACCESS] = 1
125 }
126 };
127 struct nir_intrinsic nir_image_deref_atomic_or = {
128 .name = "image_deref_atomic_or",
129 .srcs_n = 4,
130 .src_components_n = {
131 1,4,1,1
132 },
133 .has_dest = true,
134 .dest_components_n = 1,
135 .idxs_n = 1,
136 .idxs_map = {
137 [NIR_INTRINSIC_IDX_ACCESS] = 1
138 }
139 };
140 struct nir_intrinsic nir_image_deref_atomic_xor = {
141 .name = "image_deref_atomic_xor",
142 .srcs_n = 4,
143 .src_components_n = {
144 1,4,1,1
145 },
146 .has_dest = true,
147 .dest_components_n = 1,
148 .idxs_n = 1,
149 .idxs_map = {
150 [NIR_INTRINSIC_IDX_ACCESS] = 1
151 }
152 };
153 struct nir_intrinsic nir_image_deref_atomic_exchange = {
154 .name = "image_deref_atomic_exchange",
155 .srcs_n = 4,
156 .src_components_n = {
157 1,4,1,1
158 },
159 .has_dest = true,
160 .dest_components_n = 1,
161 .idxs_n = 1,
162 .idxs_map = {
163 [NIR_INTRINSIC_IDX_ACCESS] = 1
164 }
165 };
166 struct nir_intrinsic nir_image_deref_atomic_comp_swap = {
167 .name = "image_deref_atomic_comp_swap",
168 .srcs_n = 5,
169 .src_components_n = {
170 1,4,1,1,1
171 },
172 .has_dest = true,
173 .dest_components_n = 1,
174 .idxs_n = 1,
175 .idxs_map = {
176 [NIR_INTRINSIC_IDX_ACCESS] = 1
177 }
178 };
179 struct nir_intrinsic nir_image_deref_atomic_fadd = {
180 .name = "image_deref_atomic_fadd",
181 .srcs_n = 4,
182 .src_components_n = {
183 1,4,1,1
184 },
185 .has_dest = true,
186 .dest_components_n = 1,
187 .idxs_n = 1,
188 .idxs_map = {
189 [NIR_INTRINSIC_IDX_ACCESS] = 1
190 }
191 };
192 struct nir_intrinsic nir_image_deref_size = {
193 .name = "image_deref_size",
194 .srcs_n = 2,
195 .src_components_n = {
196 1,1
197 },
198 .has_dest = true,
199 .idxs_n = 1,
200 .idxs_map = {
201 [NIR_INTRINSIC_IDX_ACCESS] = 1
202 },
203 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
204 };
205 struct nir_intrinsic nir_image_deref_samples = {
206 .name = "image_deref_samples",
207 .srcs_n = 1,
208 .src_components_n = {
209 1
210 },
211 .has_dest = true,
212 .dest_components_n = 1,
213 .idxs_n = 1,
214 .idxs_map = {
215 [NIR_INTRINSIC_IDX_ACCESS] = 1
216 },
217 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
218 };
219 struct nir_intrinsic nir_image_deref_atomic_inc_wrap = {
220 .name = "image_deref_atomic_inc_wrap",
221 .srcs_n = 4,
222 .src_components_n = {
223 1,4,1,1
224 },
225 .has_dest = true,
226 .dest_components_n = 1,
227 .idxs_n = 1,
228 .idxs_map = {
229 [NIR_INTRINSIC_IDX_ACCESS] = 1
230 }
231 };
232 struct nir_intrinsic nir_image_deref_atomic_dec_wrap = {
233 .name = "image_deref_atomic_dec_wrap",
234 .srcs_n = 4,
235 .src_components_n = {
236 1,4,1,1
237 },
238 .has_dest = true,
239 .dest_components_n = 1,
240 .idxs_n = 1,
241 .idxs_map = {
242 [NIR_INTRINSIC_IDX_ACCESS] = 1
243 }
244 };
245 /* CL-specific format queries */
246 struct nir_intrinsic nir_image_deref_format = {
247 .name = "image_deref_format",
248 .srcs_n = 1,
249 .src_components_n = {
250 1
251 },
252 .has_dest = true,
253 .dest_components_n = 1,
254 .idxs_n = 1,
255 .idxs_map = {
256 [NIR_INTRINSIC_IDX_ACCESS] = 1
257 },
258 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
259 };
260 /* CL-specific format queries */
261 struct nir_intrinsic nir_image_deref_order = {
262 .name = "image_deref_order",
263 .srcs_n = 1,
264 .src_components_n = {
265 1
266 },
267 .has_dest = true,
268 .dest_components_n = 1,
269 .idxs_n = 1,
270 .idxs_map = {
271 [NIR_INTRINSIC_IDX_ACCESS] = 1
272 },
273 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
274 };
275 /* deref version */
276 /*----------------------------------------------------------------------------*/
277 /* plain version */
278 struct nir_intrinsic nir_image_load = {
279 .name = "image_load",
280 .srcs_n = 4,
281 .src_components_n = {
282 1,4,1,1
283 },
284 .has_dest = true,
285 .idxs_n = 5,
286 .idxs_map = {
287 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
288 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
289 [NIR_INTRINSIC_IDX_FORMAT] = 3,
290 [NIR_INTRINSIC_IDX_ACCESS] = 4,
291 [NIR_INTRINSIC_IDX_DEST_TYPE] = 5
292 },
293 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
294 };
295 struct nir_intrinsic nir_image_store = {
296 .name = "image_store",
297 .srcs_n = 5,
298 .src_components_n = {
299 1,4,1,0,1
300 },
301 .idxs_n = 5,
302 .idxs_map = {
303 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
304 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
305 [NIR_INTRINSIC_IDX_FORMAT] = 3,
306 [NIR_INTRINSIC_IDX_ACCESS] = 4,
307 [NIR_INTRINSIC_IDX_SRC_TYPE] = 5
308 }
309 };
310 struct nir_intrinsic nir_image_atomic_add = {
311 .name = "image_atomic_add",
312 .srcs_n = 4,
313 .src_components_n = {
314 1,4,1,1
315 },
316 .has_dest = true,
317 .dest_components_n = 1,
318 .idxs_n = 4,
319 .idxs_map = {
320 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
321 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
322 [NIR_INTRINSIC_IDX_FORMAT] = 3,
323 [NIR_INTRINSIC_IDX_ACCESS] = 4
324 }
325 };
326 struct nir_intrinsic nir_image_atomic_umin = {
327 .name = "image_atomic_umin",
328 .srcs_n = 4,
329 .src_components_n = {
330 1,4,1,1
331 },
332 .has_dest = true,
333 .dest_components_n = 1,
334 .idxs_n = 4,
335 .idxs_map = {
336 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
337 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
338 [NIR_INTRINSIC_IDX_FORMAT] = 3,
339 [NIR_INTRINSIC_IDX_ACCESS] = 4
340 }
341 };
342 struct nir_intrinsic nir_image_atomic_umax = {
343 .name = "image_atomic_umax",
344 .srcs_n = 4,
345 .src_components_n = {
346 1,4,1,1
347 },
348 .has_dest = true,
349 .dest_components_n = 1,
350 .idxs_n = 4,
351 .idxs_map = {
352 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
353 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
354 [NIR_INTRINSIC_IDX_FORMAT] = 3,
355 [NIR_INTRINSIC_IDX_ACCESS] = 4
356 }
357 };
358 struct nir_intrinsic nir_image_atomic_imin = {
359 .name = "image_atomic_imin",
360 .srcs_n = 4,
361 .src_components_n = {
362 1,4,1,1
363 },
364 .has_dest = true,
365 .dest_components_n = 1,
366 .idxs_n = 4,
367 .idxs_map = {
368 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
369 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
370 [NIR_INTRINSIC_IDX_FORMAT] = 3,
371 [NIR_INTRINSIC_IDX_ACCESS] = 4
372 }
373 };
374 struct nir_intrinsic nir_image_atomic_imax = {
375 .name = "image_atomic_imax",
376 .srcs_n = 4,
377 .src_components_n = {
378 1,4,1,1
379 },
380 .has_dest = true,
381 .dest_components_n = 1,
382 .idxs_n = 4,
383 .idxs_map = {
384 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
385 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
386 [NIR_INTRINSIC_IDX_FORMAT] = 3,
387 [NIR_INTRINSIC_IDX_ACCESS] = 4
388 }
389 };
390 struct nir_intrinsic nir_image_atomic_and = {
391 .name = "image_atomic_and",
392 .srcs_n = 4,
393 .src_components_n = {
394 1,4,1,1
395 },
396 .has_dest = true,
397 .dest_components_n = 1,
398 .idxs_n = 4,
399 .idxs_map = {
400 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
401 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
402 [NIR_INTRINSIC_IDX_FORMAT] = 3,
403 [NIR_INTRINSIC_IDX_ACCESS] = 4
404 }
405 };
406 struct nir_intrinsic nir_image_atomic_or = {
407 .name = "image_atomic_or",
408 .srcs_n = 4,
409 .src_components_n = {
410 1,4,1,1
411 },
412 .has_dest = true,
413 .dest_components_n = 1,
414 .idxs_n = 4,
415 .idxs_map = {
416 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
417 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
418 [NIR_INTRINSIC_IDX_FORMAT] = 3,
419 [NIR_INTRINSIC_IDX_ACCESS] = 4
420 }
421 };
422 struct nir_intrinsic nir_image_atomic_xor = {
423 .name = "image_atomic_xor",
424 .srcs_n = 4,
425 .src_components_n = {
426 1,4,1,1
427 },
428 .has_dest = true,
429 .dest_components_n = 1,
430 .idxs_n = 4,
431 .idxs_map = {
432 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
433 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
434 [NIR_INTRINSIC_IDX_FORMAT] = 3,
435 [NIR_INTRINSIC_IDX_ACCESS] = 4
436 }
437 };
438 struct nir_intrinsic nir_image_atomic_exchange = {
439 .name = "image_atomic_exchange",
440 .srcs_n = 4,
441 .src_components_n = {
442 1,4,1,1
443 },
444 .has_dest = true,
445 .dest_components_n = 1,
446 .idxs_n = 4,
447 .idxs_map = {
448 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
449 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
450 [NIR_INTRINSIC_IDX_FORMAT] = 3,
451 [NIR_INTRINSIC_IDX_ACCESS] = 4
452 }
453 };
454 struct nir_intrinsic nir_image_atomic_comp_swap = {
455 .name = "image_atomic_comp_swap",
456 .srcs_n = 5,
457 .src_components_n = {
458 1,4,1,1,1
459 },
460 .has_dest = true,
461 .dest_components_n = 1,
462 .idxs_n = 4,
463 .idxs_map = {
464 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
465 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
466 [NIR_INTRINSIC_IDX_FORMAT] = 3,
467 [NIR_INTRINSIC_IDX_ACCESS] = 4
468 }
469 };
470 struct nir_intrinsic nir_image_atomic_fadd = {
471 .name = "image_atomic_fadd",
472 .srcs_n = 4,
473 .src_components_n = {
474 1,4,1,1
475 },
476 .has_dest = true,
477 .dest_components_n = 1,
478 .idxs_n = 4,
479 .idxs_map = {
480 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
481 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
482 [NIR_INTRINSIC_IDX_FORMAT] = 3,
483 [NIR_INTRINSIC_IDX_ACCESS] = 4
484 }
485 };
486 struct nir_intrinsic nir_image_size = {
487 .name = "image_size",
488 .srcs_n = 2,
489 .src_components_n = {
490 1,1
491 },
492 .has_dest = true,
493 .idxs_n = 4,
494 .idxs_map = {
495 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
496 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
497 [NIR_INTRINSIC_IDX_FORMAT] = 3,
498 [NIR_INTRINSIC_IDX_ACCESS] = 4
499 },
500 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
501 };
502 struct nir_intrinsic nir_image_samples = {
503 .name = "image_samples",
504 .srcs_n = 1,
505 .src_components_n = {
506 1
507 },
508 .has_dest = true,
509 .dest_components_n = 1,
510 .idxs_n = 4,
511 .idxs_map = {
512 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
513 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
514 [NIR_INTRINSIC_IDX_FORMAT] = 3,
515 [NIR_INTRINSIC_IDX_ACCESS] = 4
516 },
517 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
518 };
519 struct nir_intrinsic nir_image_atomic_inc_wrap = {
520 .name = "image_atomic_inc_wrap",
521 .srcs_n = 4,
522 .src_components_n = {
523 1,4,1,1
524 },
525 .has_dest = true,
526 .dest_components_n = 1,
527 .idxs_n = 4,
528 .idxs_map = {
529 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
530 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
531 [NIR_INTRINSIC_IDX_FORMAT] = 3,
532 [NIR_INTRINSIC_IDX_ACCESS] = 4
533 }
534 };
535 struct nir_intrinsic nir_image_atomic_dec_wrap = {
536 .name = "image_atomic_dec_wrap",
537 .srcs_n = 4,
538 .src_components_n = {
539 1,4,1,1
540 },
541 .has_dest = true,
542 .dest_components_n = 1,
543 .idxs_n = 4,
544 .idxs_map = {
545 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
546 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
547 [NIR_INTRINSIC_IDX_FORMAT] = 3,
548 [NIR_INTRINSIC_IDX_ACCESS] = 4
549 }
550 };
551 /* CL-specific format queries */
552 struct nir_intrinsic nir_image_format = {
553 .name = "image_format",
554 .srcs_n = 1,
555 .src_components_n = {
556 1
557 },
558 .has_dest = true,
559 .dest_components_n = 1,
560 .idxs_n = 4,
561 .idxs_map = {
562 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
563 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
564 [NIR_INTRINSIC_IDX_FORMAT] = 3,
565 [NIR_INTRINSIC_IDX_ACCESS] = 4
566 },
567 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
568 };
569 /* CL-specific format queries */
570 struct nir_intrinsic nir_image_order = {
571 .name = "image_order",
572 .srcs_n = 1,
573 .src_components_n = {
574 1
575 },
576 .has_dest = true,
577 .dest_components_n = 1,
578 .idxs_n = 4,
579 .idxs_map = {
580 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
581 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
582 [NIR_INTRINSIC_IDX_FORMAT] = 3,
583 [NIR_INTRINSIC_IDX_ACCESS] = 4
584 },
585 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
586 };
587 /* plain version */
588 /*----------------------------------------------------------------------------*/
589 /* bindless version */
590 struct nir_intrinsic nir_bindless_image_load = {
591 .name = "bindless_image_load",
592 .srcs_n = 4,
593 .src_components_n = {
594 1,4,1,1
595 },
596 .has_dest = true,
597 .idxs_n = 5,
598 .idxs_map = {
599 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
600 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
601 [NIR_INTRINSIC_IDX_FORMAT] = 3,
602 [NIR_INTRINSIC_IDX_ACCESS] = 4,
603 [NIR_INTRINSIC_IDX_DEST_TYPE] = 5
604 },
605 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
606 };
607 struct nir_intrinsic nir_bindless_image_store = {
608 .name = "bindless_image_store",
609 .srcs_n = 5,
610 .src_components_n = {
611 1,4,1,0,1
612 },
613 .idxs_n = 5,
614 .idxs_map = {
615 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
616 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
617 [NIR_INTRINSIC_IDX_FORMAT] = 3,
618 [NIR_INTRINSIC_IDX_ACCESS] = 4,
619 [NIR_INTRINSIC_IDX_SRC_TYPE] = 5
620 }
621 };
622 struct nir_intrinsic nir_bindless_image_atomic_add = {
623 .name = "bindless_image_atomic_add",
624 .srcs_n = 4,
625 .src_components_n = {
626 1,4,1,1
627 },
628 .has_dest = true,
629 .dest_components_n = 1,
630 .idxs_n = 4,
631 .idxs_map = {
632 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
633 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
634 [NIR_INTRINSIC_IDX_FORMAT] = 3,
635 [NIR_INTRINSIC_IDX_ACCESS] = 4
636 }
637 };
638 struct nir_intrinsic nir_bindless_image_atomic_imin = {
639 .name = "bindless_image_atomic_imin",
640 .srcs_n = 4,
641 .src_components_n = {
642 1,4,1,1
643 },
644 .has_dest = true,
645 .dest_components_n = 1,
646 .idxs_n = 4,
647 .idxs_map = {
648 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
649 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
650 [NIR_INTRINSIC_IDX_FORMAT] = 3,
651 [NIR_INTRINSIC_IDX_ACCESS] = 4
652 }
653 };
654 struct nir_intrinsic nir_bindless_image_atomic_imax = {
655 .name = "bindless_image_atomic_imax",
656 .srcs_n = 4,
657 .src_components_n = {
658 1,4,1,1
659 },
660 .has_dest = true,
661 .dest_components_n = 1,
662 .idxs_n = 4,
663 .idxs_map = {
664 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
665 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
666 [NIR_INTRINSIC_IDX_FORMAT] = 3,
667 [NIR_INTRINSIC_IDX_ACCESS] = 4
668 }
669 };
670 struct nir_intrinsic nir_bindless_image_atomic_umin = {
671 .name = "bindless_image_atomic_umin",
672 .srcs_n = 4,
673 .src_components_n = {
674 1,4,1,1
675 },
676 .has_dest = true,
677 .dest_components_n = 1,
678 .idxs_n = 4,
679 .idxs_map = {
680 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
681 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
682 [NIR_INTRINSIC_IDX_FORMAT] = 3,
683 [NIR_INTRINSIC_IDX_ACCESS] = 4
684 }
685 };
686 struct nir_intrinsic nir_bindless_image_atomic_umax = {
687 .name = "bindless_image_atomic_umax",
688 .srcs_n = 4,
689 .src_components_n = {
690 1,4,1,1
691 },
692 .has_dest = true,
693 .dest_components_n = 1,
694 .idxs_n = 4,
695 .idxs_map = {
696 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
697 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
698 [NIR_INTRINSIC_IDX_FORMAT] = 3,
699 [NIR_INTRINSIC_IDX_ACCESS] = 4
700 }
701 };
702 struct nir_intrinsic nir_bindless_image_atomic_and = {
703 .name = "bindless_image_atomic_and",
704 .srcs_n = 4,
705 .src_components_n = {
706 1,4,1,1
707 },
708 .has_dest = true,
709 .dest_components_n = 1,
710 .idxs_n = 4,
711 .idxs_map = {
712 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
713 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
714 [NIR_INTRINSIC_IDX_FORMAT] = 3,
715 [NIR_INTRINSIC_IDX_ACCESS] = 4
716 }
717 };
718 struct nir_intrinsic nir_bindless_image_atomic_or = {
719 .name = "bindless_image_atomic_or",
720 .srcs_n = 4,
721 .src_components_n = {
722 1,4,1,1
723 },
724 .has_dest = true,
725 .dest_components_n = 1,
726 .idxs_n = 4,
727 .idxs_map = {
728 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
729 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
730 [NIR_INTRINSIC_IDX_FORMAT] = 3,
731 [NIR_INTRINSIC_IDX_ACCESS] = 4
732 }
733 };
734 struct nir_intrinsic nir_bindless_image_atomic_xor = {
735 .name = "bindless_image_atomic_xor",
736 .srcs_n = 4,
737 .src_components_n = {
738 1,4,1,1
739 },
740 .has_dest = true,
741 .dest_components_n = 1,
742 .idxs_n = 4,
743 .idxs_map = {
744 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
745 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
746 [NIR_INTRINSIC_IDX_FORMAT] = 3,
747 [NIR_INTRINSIC_IDX_ACCESS] = 4
748 }
749 };
750 struct nir_intrinsic nir_bindless_image_atomic_exchange = {
751 .name = "bindless_image_atomic_exchange",
752 .srcs_n = 4,
753 .src_components_n = {
754 1,4,1,1
755 },
756 .has_dest = true,
757 .dest_components_n = 1,
758 .idxs_n = 4,
759 .idxs_map = {
760 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
761 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
762 [NIR_INTRINSIC_IDX_FORMAT] = 3,
763 [NIR_INTRINSIC_IDX_ACCESS] = 4
764 }
765 };
766 struct nir_intrinsic nir_bindless_image_atomic_comp_swap = {
767 .name = "bindless_image_atomic_comp_swap",
768 .srcs_n = 5,
769 .src_components_n = {
770 1,4,1,1,1
771 },
772 .has_dest = true,
773 .dest_components_n = 1,
774 .idxs_n = 4,
775 .idxs_map = {
776 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
777 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
778 [NIR_INTRINSIC_IDX_FORMAT] = 3,
779 [NIR_INTRINSIC_IDX_ACCESS] = 4
780 }
781 };
782 struct nir_intrinsic nir_bindless_image_atomic_fadd = {
783 .name = "bindless_image_atomic_fadd",
784 .srcs_n = 4,
785 .src_components_n = {
786 1,4,1,1
787 },
788 .has_dest = true,
789 .dest_components_n = 1,
790 .idxs_n = 4,
791 .idxs_map = {
792 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
793 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
794 [NIR_INTRINSIC_IDX_FORMAT] = 3,
795 [NIR_INTRINSIC_IDX_ACCESS] = 4
796 }
797 };
798 struct nir_intrinsic nir_bindless_image_size = {
799 .name = "bindless_image_size",
800 .srcs_n = 2,
801 .src_components_n = {
802 1,1
803 },
804 .has_dest = true,
805 .idxs_n = 4,
806 .idxs_map = {
807 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
808 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
809 [NIR_INTRINSIC_IDX_FORMAT] = 3,
810 [NIR_INTRINSIC_IDX_ACCESS] = 4
811 },
812 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
813 };
814 struct nir_intrinsic nir_bindless_image_samples = {
815 .name = "bindless_image_samples",
816 .srcs_n = 1,
817 .src_components_n = {
818 1
819 },
820 .has_dest = true,
821 .dest_components_n = 1,
822 .idxs_n = 4,
823 .idxs_map = {
824 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
825 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
826 [NIR_INTRINSIC_IDX_FORMAT] = 3,
827 [NIR_INTRINSIC_IDX_ACCESS] = 4
828 },
829 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
830 };
831 struct nir_intrinsic nir_bindless_image_atomic_inc_wrap = {
832 .name = "bindless_image_atomic_inc_wrap",
833 .srcs_n = 4,
834 .src_components_n = {
835 1,4,1,1
836 },
837 .has_dest = true,
838 .dest_components_n = 1,
839 .idxs_n = 4,
840 .idxs_map = {
841 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
842 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
843 [NIR_INTRINSIC_IDX_FORMAT] = 3,
844 [NIR_INTRINSIC_IDX_ACCESS] = 4
845 }
846 };
847 struct nir_intrinsic nir_bindless_image_atomic_dec_wrap = {
848 .name = "bindless_image_atomic_dec_wrap",
849 .srcs_n = 4,
850 .src_components_n = {
851 1,4,1,1
852 },
853 .has_dest = true,
854 .dest_components_n = 1,
855 .idxs_n = 4,
856 .idxs_map = {
857 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
858 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
859 [NIR_INTRINSIC_IDX_FORMAT] = 3,
860 [NIR_INTRINSIC_IDX_ACCESS] = 4
861 }
862 };
863 /* CL-specific format queries */
864 struct nir_intrinsic nir_bindless_image_format = {
865 .name = "bindless_image_format",
866 .srcs_n = 1,
867 .src_components_n = {
868 1
869 },
870 .has_dest = true,
871 .dest_components_n = 1,
872 .idxs_n = 4,
873 .idxs_map = {
874 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
875 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
876 [NIR_INTRINSIC_IDX_FORMAT] = 3,
877 [NIR_INTRINSIC_IDX_ACCESS] = 4
878 },
879 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
880 };
881 /* CL-specific format queries */
882 struct nir_intrinsic nir_bindless_image_order = {
883 .name = "bindless_image_order",
884 .srcs_n = 1,
885 .src_components_n = {
886 1
887 },
888 .has_dest = true,
889 .dest_components_n = 1,
890 .idxs_n = 4,
891 .idxs_map = {
892 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
893 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
894 [NIR_INTRINSIC_IDX_FORMAT] = 3,
895 [NIR_INTRINSIC_IDX_ACCESS] = 4
896 },
897 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
898 };
899 /* bindless version */
900 /*----------------------------------------------------------------------------*/
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/generic/input_interp.c deleted (index 7948d74..0000000)
1 /*
2 * Interpolation of input. The interp_deref_at* intrinsics are similar to the
3 * load_var intrinsic acting on a shader input except that they interpolate the
4 * input differently. The at_sample, at_offset and at_vertex intrinsics take an
5 * additional source that is an integer sample id, a vec2 position offset, or a
6 * vertex ID respectively.
7 */
8 struct nir_intrinsic nir_interp_deref_at_centroid = {
9 .name = "interp_deref_at_centroid",
10 .srcs_n = 1,
11 .src_components_n = {
12 1
13 },
14 .has_dest = true,
15 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
16 };
17 struct nir_intrinsic nir_interp_deref_at_offset = {
18 .name = "interp_deref_at_offset",
19 .srcs_n = 2,
20 .src_components_n = {
21 1,2
22 },
23 .has_dest = true,
24 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
25 };
26 struct nir_intrinsic nir_interp_deref_at_sample = {
27 .name = "interp_deref_at_sample",
28 .srcs_n = 2,
29 .src_components_n = {
30 1,1
31 },
32 .has_dest = true,
33 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
34 };
35 struct nir_intrinsic nir_interp_deref_at_vertex = {
36 .name = "interp_deref_at_vertex",
37 .srcs_n = 2,
38 .src_components_n = {
39 1,1
40 },
41 .has_dest = true,
42 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
43 };
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/generic/load.c deleted (index 6af7759..0000000)
1 /*
2 * Load operations pull data from some piece of GPU memory. All load
3 * operations operate in terms of offsets into some piece of theoretical
4 * memory. Loads from externally visible memory (UBO and SSBO) simply take a
5 * byte offset as a source. Loads from opaque memory (uniforms, inputs, etc.)
6 * take a base+offset pair where the nir_intrinsic_base() gives the location
7 * of the start of the variable being loaded and and the offset source is a
8 * offset into that variable.
9 *
10 * Uniform load operations have a nir_intrinsic_range() index that specifies the
11 * range (starting at base) of the data from which we are loading. If
12 * range == 0, then the range is unknown.
13 *
14 * UBO load operations have a nir_intrinsic_range_base() and
15 * nir_intrinsic_range() that specify the byte range [range_base,
16 * range_base+range] of the UBO that the src offset access must lie within.
17 *
18 * Some load operations such as UBO/SSBO load and per_vertex loads take an
19 * additional source to specify which UBO/SSBO/vertex to load from.
20 *
21 * The exact address type depends on the lowering pass that generates the
22 * load/store intrinsics. Typically, this is vec4 units for things such as
23 * varying slots and float units for fragment shader inputs. UBO and SSBO
24 * offsets are always in bytes.
25 */
26 /* src[] = { offset } */
27 struct nir_intrinsic nir_load_uniform = {
28 .name = "load_uniform",
29 .srcs_n = 1,
30 .src_components_n = {
31 1
32 },
33 .has_dest = true,
34 .idxs_n = 3,
35 .idxs_map = {
36 [NIR_INTRINSIC_IDX_BASE] = 1,
37 [NIR_INTRINSIC_IDX_RANGE] = 2,
38 [NIR_INTRINSIC_IDX_DEST_TYPE] = 3
39 },
40 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
41 };
42 /* src[] = { buffer_index, offset } */
43 struct nir_intrinsic nir_load_ubo = {
44 .name = "load_ubo",
45 .srcs_n = 2,
46 .src_components_n = {
47 -1,1
48 },
49 .has_dest = true,
50 .idxs_n = 5,
51 .idxs_map = {
52 [NIR_INTRINSIC_IDX_ACCESS] = 1,
53 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 2,
54 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 3,
55 [NIR_INTRINSIC_IDX_RANGE_BASE] = 4,
56 [NIR_INTRINSIC_IDX_RANGE] = 5
57 },
58 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
59 };
60 /* src[] = { buffer_index, offset in vec4 units } */
61 struct nir_intrinsic nir_load_ubo_vec4 = {
62 .name = "load_ubo_vec4",
63 .srcs_n = 2,
64 .src_components_n = {
65 -1,1
66 },
67 .has_dest = true,
68 .idxs_n = 2,
69 .idxs_map = {
70 [NIR_INTRINSIC_IDX_ACCESS] = 1,
71 [NIR_INTRINSIC_IDX_COMPONENT] = 2
72 },
73 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
74 };
75 /* src[] = { offset } */
76 struct nir_intrinsic nir_load_input = {
77 .name = "load_input",
78 .srcs_n = 1,
79 .src_components_n = {
80 1
81 },
82 .has_dest = true,
83 .idxs_n = 4,
84 .idxs_map = {
85 [NIR_INTRINSIC_IDX_BASE] = 1,
86 [NIR_INTRINSIC_IDX_COMPONENT] = 2,
87 [NIR_INTRINSIC_IDX_DEST_TYPE] = 3,
88 [NIR_INTRINSIC_IDX_IO_SEMANTICS] = 4
89 },
90 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
91 };
92 /* src[] = { vertex_id, offset } */
93 struct nir_intrinsic nir_load_input_vertex = {
94 .name = "load_input_vertex",
95 .srcs_n = 2,
96 .src_components_n = {
97 1,1
98 },
99 .has_dest = true,
100 .idxs_n = 4,
101 .idxs_map = {
102 [NIR_INTRINSIC_IDX_BASE] = 1,
103 [NIR_INTRINSIC_IDX_COMPONENT] = 2,
104 [NIR_INTRINSIC_IDX_DEST_TYPE] = 3,
105 [NIR_INTRINSIC_IDX_IO_SEMANTICS] = 4
106 },
107 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
108 };
109 /* src[] = { vertex, offset } */
110 struct nir_intrinsic nir_load_per_vertex_input = {
111 .name = "load_per_vertex_input",
112 .srcs_n = 2,
113 .src_components_n = {
114 1,1
115 },
116 .has_dest = true,
117 .idxs_n = 3,
118 .idxs_map = {
119 [NIR_INTRINSIC_IDX_BASE] = 1,
120 [NIR_INTRINSIC_IDX_COMPONENT] = 2,
121 [NIR_INTRINSIC_IDX_IO_SEMANTICS] = 3
122 },
123 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
124 };
125 /* src[] = { barycoord, offset } */
126 struct nir_intrinsic nir_load_interpolated_input = {
127 .name = "load_interpolated_input",
128 .srcs_n = 2,
129 .src_components_n = {
130 2,1
131 },
132 .has_dest = true,
133 .idxs_n = 3,
134 .idxs_map = {
135 [NIR_INTRINSIC_IDX_BASE] = 1,
136 [NIR_INTRINSIC_IDX_COMPONENT] = 2,
137 [NIR_INTRINSIC_IDX_IO_SEMANTICS] = 3
138 },
139 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
140 };
141 /* src[] = { buffer_index, offset } */
142 struct nir_intrinsic nir_load_ssbo = {
143 .name = "load_ssbo",
144 .srcs_n = 2,
145 .src_components_n = {
146 -1,1
147 },
148 .has_dest = true,
149 .idxs_n = 3,
150 .idxs_map = {
151 [NIR_INTRINSIC_IDX_ACCESS] = 1,
152 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 2,
153 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 3
154 },
155 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
156 };
157 /* src[] = { buffer_index } */
158 struct nir_intrinsic nir_load_ssbo_address = {
159 .name = "load_ssbo_address",
160 .srcs_n = 1,
161 .src_components_n = {
162 1
163 },
164 .has_dest = true,
165 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
166 };
167 /* src[] = { offset } */
168 struct nir_intrinsic nir_load_output = {
169 .name = "load_output",
170 .srcs_n = 1,
171 .src_components_n = {
172 1
173 },
174 .has_dest = true,
175 .idxs_n = 3,
176 .idxs_map = {
177 [NIR_INTRINSIC_IDX_BASE] = 1,
178 [NIR_INTRINSIC_IDX_COMPONENT] = 2,
179 [NIR_INTRINSIC_IDX_IO_SEMANTICS] = 3
180 },
181 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
182 };
183 /* src[] = { vertex, offset } */
184 struct nir_intrinsic nir_load_per_vertex_output = {
185 .name = "load_per_vertex_output",
186 .srcs_n = 2,
187 .src_components_n = {
188 1,1
189 },
190 .has_dest = true,
191 .idxs_n = 3,
192 .idxs_map = {
193 [NIR_INTRINSIC_IDX_BASE] = 1,
194 [NIR_INTRINSIC_IDX_COMPONENT] = 2,
195 [NIR_INTRINSIC_IDX_IO_SEMANTICS] = 3
196 },
197 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
198 };
199 /* src[] = { offset } */
200 struct nir_intrinsic nir_load_shared = {
201 .name = "load_shared",
202 .srcs_n = 1,
203 .src_components_n = {
204 1
205 },
206 .has_dest = true,
207 .idxs_n = 3,
208 .idxs_map = {
209 [NIR_INTRINSIC_IDX_BASE] = 1,
210 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 2,
211 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 3
212 },
213 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
214 };
215 /* src[] = { offset } */
216 struct nir_intrinsic nir_load_push_constant = {
217 .name = "load_push_constant",
218 .srcs_n = 1,
219 .src_components_n = {
220 1
221 },
222 .has_dest = true,
223 .idxs_n = 2,
224 .idxs_map = {
225 [NIR_INTRINSIC_IDX_BASE] = 1,
226 [NIR_INTRINSIC_IDX_RANGE] = 2
227 },
228 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
229 };
230 /* src[] = { offset } */
231 struct nir_intrinsic nir_load_constant = {
232 .name = "load_constant",
233 .srcs_n = 1,
234 .src_components_n = {
235 1
236 },
237 .has_dest = true,
238 .idxs_n = 4,
239 .idxs_map = {
240 [NIR_INTRINSIC_IDX_BASE] = 1,
241 [NIR_INTRINSIC_IDX_RANGE] = 2,
242 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 3,
243 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 4
244 },
245 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
246 };
247 /* src[] = { address } */
248 struct nir_intrinsic nir_load_global = {
249 .name = "load_global",
250 .srcs_n = 1,
251 .src_components_n = {
252 1
253 },
254 .has_dest = true,
255 .idxs_n = 3,
256 .idxs_map = {
257 [NIR_INTRINSIC_IDX_ACCESS] = 1,
258 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 2,
259 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 3
260 },
261 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
262 };
263 /* src[] = { address } */
264 struct nir_intrinsic nir_load_global_constant = {
265 .name = "load_global_constant",
266 .srcs_n = 1,
267 .src_components_n = {
268 1
269 },
270 .has_dest = true,
271 .idxs_n = 3,
272 .idxs_map = {
273 [NIR_INTRINSIC_IDX_ACCESS] = 1,
274 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 2,
275 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 3
276 },
277 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
278 };
279 /* src[] = { address } */
280 struct nir_intrinsic nir_load_kernel_input = {
281 .name = "load_kernel_input",
282 .srcs_n = 1,
283 .src_components_n = {
284 1
285 },
286 .has_dest = true,
287 .idxs_n = 4,
288 .idxs_map = {
289 [NIR_INTRINSIC_IDX_BASE] = 1,
290 [NIR_INTRINSIC_IDX_RANGE] = 2,
291 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 3,
292 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 4,
293 },
294 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
295 };
296 /* src[] = { offset } */
297 struct nir_intrinsic nir_load_scratch = {
298 .name = "load_scratch",
299 .srcs_n = 1,
300 .src_components_n = {
301 1
302 },
303 .has_dest = true,
304 .idxs_n = 2,
305 .idxs_map = {
306 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 1,
307 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 2,
308 },
309 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
310 };
311 /******************************************************************************/
312 /*
313 * Intrinsics used by the Midgard/Bifrost blend pipeline. These are defined
314 * within a blend shader to read/write the raw value from the tile buffer,
315 * without applying any format conversion in the process. If the shader needs
316 * usable pixel values, it must apply format conversions itself.
317 *
318 * These definitions are generic, but they are explicitly vendored to prevent
319 * other drivers from using them, as their semantics is defined in terms of the
320 * Midgard/Bifrost hardware tile buffer and may not line up with anything sane.
321 * One notable divergence is sRGB, which is asymmetric: raw_input_pan requires
322 * an sRGB->linear conversion, but linear values should be written to
323 * raw_output_pan and the hardware handles linear->sRGB.
324 *
325 * We also have format-specific Midgard intrinsics. There are rather
326 * here-be-dragons. load_output_u8_as_fp16_pan does the equivalent of
327 * load_raw_out_pan on an RGBA8 UNORM framebuffer followed by u2u16 -> fp16 ->
328 * division by 255.
329 */
330 /* src[] = { value } */
331 struct nir_intrinsic nir_load_raw_output_pan = {
332 .name = "load_raw_output_pan",
333 .has_dest = true,
334 .idxs_n = 1,
335 .idxs_map = {
336 [NIR_INTRINSIC_IDX_BASE] = 1
337 },
338 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
339 };
340 struct nir_intrinsic nir_load_output_u8_as_fd16_pan = {
341 .name = "load_output_u8_as_fd16_pan",
342 .has_dest = true,
343 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
344 };
345 /*
346 * hardware specific ??
347 * Loads the sampler paramaters <min_lod, max_lod, lod_bias>
348 * src[] = { sampler_index }
349 */
350 struct nir_intrinsic nir_load_sampler_lod_parameters_pan = {
351 .name = "load_sampler_lod_paramenters_pan",
352 .srcs_n = 1,
353 .src_components_n = {
354 1
355 },
356 .has_dest = true,
357 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
358 };
359 /******************************************************************************/
360
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/generic/store.c deleted (index 9bc36dc..0000000)
1 /*
2 * Stores work the same way as loads, except now the first source is the value
3 * to store and the second (and possibly third) source specify where to store
4 * the value. SSBO and shared memory stores also have a
5 * nir_intrinsic_write_mask()
6 */
7 /* src[] = { value, offset } */
8 struct nir_intrinsic nir_store_output = {
9 .name = "store_output",
10 .srcs_n = 2,
11 .src_components_n = {
12 0,1
13 },
14 .idxs_n = 5,
15 .idxs_map = {
16 [NIR_INTRINSIC_IDX_BASE] = 1,
17 [NIR_INTRINSIC_IDX_WRMASK] = 2,
18 [NIR_INTRINSIC_IDX_COMPONENT] = 3,
19 [NIR_INTRINSIC_IDX_SRC_TYPE] = 4,
20 [NIR_INTRINSIC_IDX_IO_SEMANTICS] = 5
21 }
22 };
23 /* src[] = { value, vertex, offset } */
24 struct nir_intrinsic nir_store_per_vertex_output = {
25 .name = "store_per_vertex_output",
26 .srcs_n = 3,
27 .src_components_n = {
28 0,1,1
29 },
30 .idxs_n = 4,
31 .idxs_map = {
32 [NIR_INTRINSIC_IDX_BASE] = 1,
33 [NIR_INTRINSIC_IDX_WRMASK] = 2,
34 [NIR_INTRINSIC_IDX_COMPONENT] = 3,
35 [NIR_INTRINSIC_IDX_IO_SEMANTICS] = 4
36 }
37 };
38 /* src[] = { value, block_index, offset } */
39 struct nir_intrinsic nir_store_ssbo = {
40 .name = "store_ssbo",
41 .srcs_n = 3,
42 .src_components_n = {
43 0,-1,1
44 },
45 .idxs_n = 4,
46 .idxs_map = {
47 [NIR_INTRINSIC_IDX_WRMASK] = 1,
48 [NIR_INTRINSIC_IDX_ACCESS] = 2,
49 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 3,
50 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 4
51 }
52 };
53 /* src[] = { value, offset } */
54 struct nir_intrinsic nir_store_shared = {
55 .name = "store_shared",
56 .srcs_n = 2,
57 .src_components_n = {
58 0,1
59 },
60 .idxs_n = 4,
61 .idxs_map = {
62 [NIR_INTRINSIC_IDX_BASE] = 1,
63 [NIR_INTRINSIC_IDX_WRMASK] = 2,
64 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 3,
65 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 4
66 }
67 };
68 /* src[] = { value, address } */
69 struct nir_intrinsic nir_store_global = {
70 .name = "store_global",
71 .srcs_n = 2,
72 .src_components_n = {
73 0,1
74 },
75 .idxs_n = 4,
76 .idxs_map = {
77 [NIR_INTRINSIC_IDX_WRMASK] = 1,
78 [NIR_INTRINSIC_IDX_ACCESS] = 2,
79 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 3,
80 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 4
81 }
82 };
83 /* src[] = { value, offset } */
84 struct nir_intrinsic nir_store_scratch = {
85 .name = "store_scratch",
86 .srcs_n = 2,
87 .src_components_n = {
88 0,1
89 },
90 .idxs_n = 3,
91 .idxs_map = {
92 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 1,
93 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 2,
94 [NIR_INTRINSIC_IDX_WRMASK] = 3
95 }
96 };
97 /******************************************************************************/
98 /*
99 * Intrinsics used by the Midgard/Bifrost blend pipeline. These are defined
100 * within a blend shader to read/write the raw value from the tile buffer,
101 * without applying any format conversion in the process. If the shader needs
102 * usable pixel values, it must apply format conversions itself.
103 *
104 * These definitions are generic, but they are explicitly vendored to prevent
105 * other drivers from using them, as their semantics is defined in terms of the
106 * Midgard/Bifrost hardware tile buffer and may not line up with anything sane.
107 * One notable divergence is sRGB, which is asymmetric: raw_input_pan requires
108 * an sRGB->linear conversion, but linear values should be written to
109 * raw_output_pan and the hardware handles linear->sRGB.
110 *
111 * We also have format-specific Midgard intrinsics. There are rather
112 * here-be-dragons. load_output_u8_as_fp16_pan does the equivalent of
113 * load_raw_out_pan on an RGBA8 UNORM framebuffer followed by u2u16 -> fp16 ->
114 * division by 255.
115 */
116 /* src[] = { value } */
117 struct nir_intrinsic nir_store_raw_output_pan = {
118 .name = "store_raw_output_pan",
119 .srcs_n = 1,
120 .src_components_n = {
121 0
122 }
123 };
124 struct nir_intrinsic nir_store_combined_output_pan = {
125 .name = "store_combined_output_pan",
126 .srcs_n = 4,
127 .src_components_n = {
128 0,1,1,1
129 },
130 .idxs_n = 2,
131 .idxs_map = {
132 [NIR_INTRINSIC_IDX_BASE] = 1,
133 [NIR_INTRINSIC_IDX_COMPONENT] = 2
134 }
135 };
136 struct nir_intrinsic nir_store_zs_output_pan = {
137 .name = "store_zs_output_pan",
138 .srcs_n = 1,
139 .src_components_n = {
140 0
141 },
142 .idxs_n = 1,
143 .idxs_map = {
144 [NIR_INTRINSIC_IDX_COMPONENT] = 1
145 }
146 };
147 /******************************************************************************/
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/generic/system_values.c deleted (index 89b8a3d..0000000)
1 static struct nir_intrinsic nir_load_frag_coord = {
2 .name = "load_frag_coord",
3 .has_dest = true,
4 .dest_components_n = 4,
5 .bit_szs = 0x20,
6 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
7 .system_value = true
8 };
9 static struct nir_intrinsic nir_load_point_coord = {
10 .name = "load_point_coord",
11 .has_dest = true,
12 .dest_components_n = 2,
13 .bit_szs = 0x20,
14 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
15 .system_value = true
16 };
17 static struct nir_intrinsic nir_load_front_face = {
18 .name = "load_front_face",
19 .has_dest = true,
20 .dest_components_n = 1,
21 .bit_szs = 0x21,
22 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
23 .system_value = true
24 };
25 static struct nir_intrinsic nir_load_vertex_id = {
26 .name = "load_vertex_id",
27 .has_dest = true,
28 .dest_components_n = 1,
29 .bit_szs = 0x20,
30 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
31 .system_value = true
32 };
33 static struct nir_intrinsic nir_load_vertex_id_zero_base = {
34 .name = "load_vertex_id_zero_base",
35 .has_dest = true,
36 .dest_components_n = 1,
37 .bit_szs = 0x20,
38 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
39 .system_value = true
40 };
41 static struct nir_intrinsic nir_load_first_vertex = {
42 .name = "load_first_vertex",
43 .has_dest = true,
44 .dest_components_n = 1,
45 .bit_szs = 0x20,
46 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
47 .system_value = true
48 };
49 static struct nir_intrinsic nir_load_is_indexed_draw = {
50 .name = "load_is_indexed_draw",
51 .has_dest = true,
52 .dest_components_n = 1,
53 .bit_szs = 0x20,
54 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
55 .system_value = true
56 };
57 static struct nir_intrinsic nir_load_base_vertex = {
58 .name = "load_base_vertex",
59 .has_dest = true,
60 .dest_components_n = 1,
61 .bit_szs = 0x20,
62 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
63 .system_value = true
64 };
65 static struct nir_intrinsic nir_load_instance_id = {
66 .name = "load_instance_id",
67 .has_dest = true,
68 .dest_components_n = 1,
69 .bit_szs = 0x20,
70 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
71 .system_value = true
72 };
73 static struct nir_intrinsic nir_load_base_instance = {
74 .name = "load_base_instance",
75 .has_dest = true,
76 .dest_components_n = 1,
77 .bit_szs = 0x20,
78 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
79 .system_value = true
80 };
81 static struct nir_intrinsic nir_load_draw_id = {
82 .name = "load_draw_id",
83 .has_dest = true,
84 .dest_components_n = 1,
85 .bit_szs = 0x20,
86 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
87 .system_value = true
88 };
89 static struct nir_intrinsic nir_load_sample_id = {
90 .name = "load_sample_id",
91 .has_dest = true,
92 .dest_components_n = 1,
93 .bit_szs = 0x20,
94 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
95 .system_value = true
96 };
97 /*
98 * sample_id_no_per_sample is like sample_id but does not imply per-
99 * sample shading. See the lower_helper_invocation option.
100 */
101 static struct nir_intrinsic nir_load_sample_id_no_per_sample = {
102 .name = "load_sample_id_no_per_sample",
103 .has_dest = true,
104 .dest_components_n = 1,
105 .bit_szs = 0x20,
106 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
107 .system_value = true
108 };
109 static struct nir_intrinsic nir_load_sample_pos = {
110 .name = "load_sample_pos",
111 .has_dest = true,
112 .dest_components_n = 2,
113 .bit_szs = 0x20,
114 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
115 .system_value = true
116 };
117 static struct nir_intrinsic nir_load_sample_mask_in = {
118 .name = "load_sample_mask_in",
119 .has_dest = true,
120 .dest_components_n = 1,
121 .bit_szs = 0x20,
122 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
123 .system_value = true
124 };
125 static struct nir_intrinsic nir_load_primitive_id = {
126 .name = "load_primitive_id",
127 .has_dest = true,
128 .dest_components_n = 1,
129 .bit_szs = 0x20,
130 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
131 .system_value = true
132 };
133 static struct nir_intrinsic nir_load_invocation_id = {
134 .name = "load_invocation_id",
135 .has_dest = true,
136 .dest_components_n = 1,
137 .bit_szs = 0x20,
138 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
139 .system_value = true
140 };
141 static struct nir_intrinsic nir_load_tess_coord = {
142 .name = "load_tess_coord",
143 .has_dest = true,
144 .dest_components_n = 3,
145 .bit_szs = 0x20,
146 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
147 .system_value = true
148 };
149 static struct nir_intrinsic nir_load_tess_level_outer = {
150 .name = "load_tess_level_outer",
151 .has_dest = true,
152 .dest_components_n = 4,
153 .bit_szs = 0x20,
154 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
155 .system_value = true
156 };
157 static struct nir_intrinsic nir_load_tess_level_inner = {
158 .name = "load_tess_level_inner",
159 .has_dest = true,
160 .dest_components_n = 2,
161 .bit_szs = 0x20,
162 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
163 .system_value = true
164 };
165 static struct nir_intrinsic nir_load_tess_level_outer_default = {
166 .name = "load_tess_level_outer_default",
167 .has_dest = true,
168 .dest_components_n = 4,
169 .bit_szs = 0x20,
170 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
171 .system_value = true
172 };
173 static struct nir_intrinsic nir_load_tess_level_inner_default = {
174 .name = "load_tess_level_inner_default",
175 .has_dest = true,
176 .dest_components_n = 2,
177 .bit_szs = 0x20,
178 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
179 .system_value = true
180 };
181 static struct nir_intrinsic nir_load_patch_vertices_in = {
182 .name = "load_patch_vertices_in",
183 .has_dest = true,
184 .dest_components_n = 1,
185 .bit_szs = 0x20,
186 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
187 .system_value = true
188 };
189 static struct nir_intrinsic nir_load_local_invocation_id = {
190 .name = "load_local_invocation_id",
191 .has_dest = true,
192 .dest_components_n = 3,
193 .bit_szs = 0x20,
194 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
195 .system_value = true
196 };
197 static struct nir_intrinsic nir_load_local_invocation_index = {
198 .name = "load_local_invocation_index",
199 .has_dest = true,
200 .dest_components_n = 1,
201 .bit_szs = 0x20,
202 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
203 .system_value = true
204 };
205 /*----------------------------------------------------------------------------*/
206 /*
207 * zero_base indicates it starts from 0 for the current dispatch non-zero_base
208 * indicates the base is included
209 */
210 static struct nir_intrinsic nir_load_work_group_id = {
211 .name = "load_work_group_id",
212 .has_dest = true,
213 .dest_components_n = 3,
214 .bit_szs = 0x60,
215 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
216 .system_value = true
217 };
218 static struct nir_intrinsic nir_load_work_group_id_zero_base = {
219 .name = "load_work_group_id_zero_base",
220 .has_dest = true,
221 .dest_components_n = 3,
222 .bit_szs = 0x20,
223 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
224 .system_value = true
225 };
226 static struct nir_intrinsic nir_load_base_work_group_id = {
227 .name = "load_base_work_group_id",
228 .has_dest = true,
229 .dest_components_n = 3,
230 .bit_szs = 0x60,
231 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
232 .system_value = true
233 };
234 /*----------------------------------------------------------------------------*/
235 static struct nir_intrinsic nir_load_user_clip_plane = {
236 .name = "load_user_clip_plane",
237 .has_dest = true,
238 .dest_components_n = 4,
239 .idxs_n = 1,
240 .idxs_map = {
241 [NIR_INTRINSIC_IDX_UCP_ID] = 1,
242 },
243 .bit_szs = 0x20,
244 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
245 .system_value = true
246 };
247 static struct nir_intrinsic nir_load_num_work_groups = {
248 .name = "load_num_work_groups",
249 .has_dest = true,
250 .dest_components_n = 3,
251 .bit_szs = 0x60,
252 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
253 .system_value = true
254 };
255 static struct nir_intrinsic nir_load_helper_invocation = {
256 .name = "load_helper_invocation",
257 .has_dest = true,
258 .dest_components_n = 1,
259 .bit_szs = 0x21,
260 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
261 .system_value = true
262 };
263 static struct nir_intrinsic nir_load_alpha_ref_float = {
264 .name = "load_alpha_ref_float",
265 .has_dest = true,
266 .dest_components_n = 1,
267 .bit_szs = 0x20,
268 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
269 .system_value = true
270 };
271 static struct nir_intrinsic nir_load_layer_id = {
272 .name = "load_layer_id",
273 .has_dest = true,
274 .dest_components_n = 1,
275 .bit_szs = 0x20,
276 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
277 .system_value = true
278 };
279 static struct nir_intrinsic nir_load_view_index = {
280 .name = "load_view_index",
281 .has_dest = true,
282 .dest_components_n = 1,
283 .bit_szs = 0x20,
284 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
285 .system_value = true
286 };
287 static struct nir_intrinsic nir_load_subgroup_size = {
288 .name = "load_subgroup_size",
289 .has_dest = true,
290 .dest_components_n = 1,
291 .bit_szs = 0x20,
292 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
293 .system_value = true
294 };
295 static struct nir_intrinsic nir_load_subgroup_invocation = {
296 .name = "load_subgroup_invocation",
297 .has_dest = true,
298 .dest_components_n = 1,
299 .bit_szs = 0x20,
300 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
301 .system_value = true
302 };
303 static struct nir_intrinsic nir_load_subgroup_eq_mask = {
304 .name = "load_subgroup_eq_mask",
305 .has_dest = true,
306 .dest_components_n = 0,
307 .bit_szs = 0x60,
308 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
309 .system_value = true
310 };
311 static struct nir_intrinsic nir_load_subgroup_ge_mask = {
312 .name = "load_subgroup_ge_mask",
313 .has_dest = true,
314 .dest_components_n = 0,
315 .bit_szs = 0x60,
316 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
317 .system_value = true
318 };
319 static struct nir_intrinsic nir_load_subgroup_gt_mask = {
320 .name = "load_subgroup_gt_mask",
321 .has_dest = true,
322 .dest_components_n = 0,
323 .bit_szs = 0x60,
324 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
325 .system_value = true
326 };
327 static struct nir_intrinsic nir_load_subgroup_le_mask = {
328 .name = "load_subgroup_le_mask",
329 .has_dest = true,
330 .dest_components_n = 0,
331 .bit_szs = 0x60,
332 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
333 .system_value = true
334 };
335 static struct nir_intrinsic nir_load_subgroup_lt_mask = {
336 .name = "load_subgroup_lt_mask",
337 .has_dest = true,
338 .dest_components_n = 0,
339 .bit_szs = 0x60,
340 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
341 .system_value = true
342 };
343 static struct nir_intrinsic nir_load_num_subgroups = {
344 .name = "load_num_subgroups",
345 .has_dest = true,
346 .dest_components_n = 1,
347 .bit_szs = 0x20,
348 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
349 .system_value = true
350 };
351 static struct nir_intrinsic nir_load_subgroup_id = {
352 .name = "load_subgroup_id",
353 .has_dest = true,
354 .dest_components_n = 1,
355 .bit_szs = 0x20,
356 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
357 .system_value = true
358 };
359 static struct nir_intrinsic nir_load_local_group_size = {
360 .name = "load_local_group_size",
361 .has_dest = true,
362 .dest_components_n = 3,
363 .bit_szs = 0x20,
364 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
365 .system_value = true
366 };
367 /*----------------------------------------------------------------------------*/
368 /*
369 * note: the definition of global_invocation_id_zero_base is based on
370 * (work_group_id * local_group_size) + local_invocation_id.
371 * it is *not* based on work_group_id_zero_base, meaning the work group
372 * base is already accounted for, and the global base is additive on top of that
373 */
374 static struct nir_intrinsic nir_load_global_invocation_id = {
375 .name = "load_global_invocation_id",
376 .has_dest = true,
377 .dest_components_n = 3,
378 .bit_szs = 0x60,
379 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
380 .system_value = true
381 };
382 static struct nir_intrinsic nir_load_global_invocation_id_zero_base = {
383 .name = "load_global_invocation_id_zero_base",
384 .has_dest = true,
385 .dest_components_n = 3,
386 .bit_szs = 0x60,
387 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
388 .system_value = true
389 };
390 static struct nir_intrinsic nir_load_base_global_invocation_id = {
391 .name = "load_base_global_invocation_id",
392 .has_dest = true,
393 .dest_components_n = 3,
394 .bit_szs = 0x60,
395 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
396 .system_value = true
397 };
398 /*----------------------------------------------------------------------------*/
399 static struct nir_intrinsic nir_load_global_invocation_index = {
400 .name = "load_global_invocation_index",
401 .has_dest = true,
402 .dest_components_n = 1,
403 .bit_szs = 0x60,
404 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
405 .system_value = true
406 };
407 static struct nir_intrinsic nir_load_work_dim = {
408 .name = "load_work_dim",
409 .has_dest = true,
410 .dest_components_n = 1,
411 .bit_szs = 0x20,
412 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
413 .system_value = true
414 };
415 static struct nir_intrinsic nir_load_line_coord = {
416 .name = "load_line_coord",
417 .has_dest = true,
418 .dest_components_n = 1,
419 .bit_szs = 0x20,
420 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
421 .system_value = true
422 };
423 static struct nir_intrinsic nir_load_line_width = {
424 .name = "load_line_width",
425 .has_dest = true,
426 .dest_components_n = 1,
427 .bit_szs = 0x20,
428 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
429 .system_value = true
430 };
431 static struct nir_intrinsic nir_load_aa_line_width = {
432 .name = "load_aa_line_width",
433 .has_dest = true,
434 .dest_components_n = 1,
435 .bit_szs = 0x20,
436 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
437 .system_value = true
438 };
439 /* BASE=0 for global/shader, BASE=1 for local/function */
440 static struct nir_intrinsic nir_load_scratch_base_ptr = {
441 .name = "load_scratch_base_ptr",
442 .has_dest = true,
443 .dest_components_n = 0,
444 .idxs_n = 1,
445 .idxs_map = {
446 [NIR_INTRINSIC_IDX_BASE] = 1
447 },
448 .bit_szs = 0x60,
449 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
450 .system_value = true
451 };
452 static struct nir_intrinsic nir_load_constant_base_ptr = {
453 .name = "load_constant_base_ptr",
454 .has_dest = true,
455 .dest_components_n = 0,
456 .bit_szs = 0x60,
457 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
458 .system_value = true
459 };
460 /*----------------------------------------------------------------------------*/
461 /*
462 * Driver-specific viewport scale/offset parameters.
463 *
464 * VC4 and V3D need to emit a scaled version of the position in the vertex
465 * shaders for binning, and having system values lets us move the math for that
466 * into NIR.
467 *
468 * Panfrost needs to implement all coordinate transformation in the
469 * vertex shader; system values allow us to share this routine in NIR.
470 */
471 static struct nir_intrinsic nir_load_viewport_x_scale = {
472 .name = "load_viewport_x_scale",
473 .has_dest = true,
474 .dest_components_n = 1,
475 .bit_szs = 0x20,
476 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
477 .system_value = true
478 };
479 static struct nir_intrinsic nir_load_viewport_y_scale = {
480 .name = "load_viewport_y_scale",
481 .has_dest = true,
482 .dest_components_n = 1,
483 .bit_szs = 0x20,
484 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
485 .system_value = true
486 };
487 static struct nir_intrinsic nir_load_viewport_z_scale = {
488 .name = "load_viewport_z_scale",
489 .has_dest = true,
490 .dest_components_n = 1,
491 .bit_szs = 0x20,
492 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
493 .system_value = true
494 };
495 static struct nir_intrinsic nir_load_viewport_z_offset = {
496 .name = "load_viewport_z_offset",
497 .has_dest = true,
498 .dest_components_n = 1,
499 .bit_szs = 0x20,
500 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
501 .system_value = true
502 };
503 static struct nir_intrinsic nir_load_viewport_scale = {
504 .name = "load_viewport_scale",
505 .has_dest = true,
506 .dest_components_n = 3,
507 .bit_szs = 0x20,
508 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
509 .system_value = true
510 };
511 static struct nir_intrinsic nir_load_viewport_offset = {
512 .name = "load_viewport_offset",
513 .has_dest = true,
514 .dest_components_n = 3,
515 .bit_szs = 0x20,
516 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
517 .system_value = true
518 };
519 /*----------------------------------------------------------------------------*/
520 /*
521 * Blend constant color values. Float values are clamped. Vectored versions are
522 * provided as well for driver convenience
523 */
524 static struct nir_intrinsic nir_load_blend_const_color_r_float = {
525 .name = "load_blend_const_color_r_float",
526 .has_dest = true,
527 .dest_components_n = 1,
528 .bit_szs = 0x20,
529 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
530 .system_value = true
531 };
532 static struct nir_intrinsic nir_load_blend_const_color_g_float = {
533 .name = "load_blend_const_color_g_float",
534 .has_dest = true,
535 .dest_components_n = 1,
536 .bit_szs = 0x20,
537 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
538 .system_value = true
539 };
540 static struct nir_intrinsic nir_load_blend_const_color_b_float = {
541 .name = "load_blend_const_color_b_float",
542 .has_dest = true,
543 .dest_components_n = 1,
544 .bit_szs = 0x20,
545 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
546 .system_value = true
547 };
548 static struct nir_intrinsic nir_load_blend_const_color_a_float = {
549 .name = "load_blend_const_color_a_float",
550 .has_dest = true,
551 .dest_components_n = 1,
552 .bit_szs = 0x20,
553 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
554 .system_value = true
555 };
556 static struct nir_intrinsic nir_load_blend_const_color_rgb = {
557 .name = "load_blend_const_color_rgba",
558 .has_dest = true,
559 .dest_components_n = 4,
560 .bit_szs = 0x20,
561 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
562 .system_value = true
563 };
564 static struct nir_intrinsic nir_load_blend_const_color_rgba8888_unorm = {
565 .name = "load_blend_const_color_rgba8888_unorm",
566 .has_dest = true,
567 .dest_components_n = 1,
568 .bit_szs = 0x20,
569 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
570 .system_value = true
571 };
572 static struct nir_intrinsic nir_load_blend_const_color_aaaa8888_unorm = {
573 .name = "load_blend_const_color_aaaa8888_unorm",
574 .has_dest = true,
575 .dest_components_n = 1,
576 .bit_szs = 0x20,
577 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
578 .system_value = true
579 };
580 /*----------------------------------------------------------------------------*/
581 /*
582 * System values for gl_Color, for radeonsi which interpolates these in the
583 * shader prolog to handle two-sided color without recompiles and therefore
584 * doesn't handle these in the main shader part like normal varyings.
585 */
586 static struct nir_intrinsic nir_load_color0 = {
587 .name = "load_color0",
588 .has_dest = true,
589 .dest_components_n = 4,
590 .bit_szs = 0x20,
591 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
592 .system_value = true
593 };
594 static struct nir_intrinsic nir_load_color1 = {
595 .name = "load_color1",
596 .has_dest = true,
597 .dest_components_n = 4,
598 .bit_szs = 0x20,
599 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
600 .system_value = true
601 };
602 /*----------------------------------------------------------------------------*/
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/intel/image.c deleted (index 071fd65..0000000)
1 struct nir_intrinsic nir_image_deref_load_param_intel = {
2 .name = "image_deref_load_param_intel",
3 .srcs_n = 1,
4 .src_components_n = {
5 1
6 },
7 .has_dest = true,
8 .dest_components_n = 0,
9 .idxs_n = 1,
10 .idxs_map = {
11 [NIR_INTRINSIC_IDX_BASE] = 1
12 },
13 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
14 };
15 /*----------------------------------------------------------------------------*/
16 /* deref version */
17 struct nir_intrinsic nir_image_deref_load_raw_intel = {
18 .name = "image_deref_load_raw_intel",
19 .srcs_n = 2,
20 .src_components_n = {
21 1,1
22 },
23 .has_dest = true,
24 .idxs_n = 1,
25 .idxs_map = {
26 [NIR_INTRINSIC_IDX_ACCESS] = 1
27 },
28 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
29 };
30 struct nir_intrinsic nir_image_deref_store_raw_intel = {
31 .name = "image_deref_store_raw_intel",
32 .srcs_n = 3,
33 .src_components_n = {
34 1,1,0
35 },
36 .idxs_n = 1,
37 .idxs_map = {
38 [NIR_INTRINSIC_IDX_ACCESS] = 1
39 }
40 };
41 /* deref version */
42 /*----------------------------------------------------------------------------*/
43 /* plain version */
44 struct nir_intrinsic nir_image_load_raw_intel = {
45 .name = "image_load_raw_intel",
46 .srcs_n = 2,
47 .src_components_n = {
48 1,1
49 },
50 .has_dest = true,
51 .idxs_n = 4,
52 .idxs_map = {
53 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
54 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
55 [NIR_INTRINSIC_IDX_FORMAT] = 3,
56 [NIR_INTRINSIC_IDX_ACCESS] = 4
57 },
58 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
59 };
60 struct nir_intrinsic nir_image_store_raw_intel = {
61 .name = "image_store_raw_intel",
62 .srcs_n = 3,
63 .src_components_n = {
64 1,1,0
65 },
66 .idxs_n = 4,
67 .idxs_map = {
68 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
69 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
70 [NIR_INTRINSIC_IDX_FORMAT] = 3,
71 [NIR_INTRINSIC_IDX_ACCESS] = 4
72 }
73 };
74 /* plain version */
75 /*----------------------------------------------------------------------------*/
76 /* bindless version */
77 struct nir_intrinsic nir_bindless_image_load_raw_intel = {
78 .name = "bindless_image_load_raw_intel",
79 .srcs_n = 2,
80 .src_components_n = {
81 1,1
82 },
83 .has_dest = true,
84 .idxs_n = 4,
85 .idxs_map = {
86 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
87 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
88 [NIR_INTRINSIC_IDX_FORMAT] = 3,
89 [NIR_INTRINSIC_IDX_ACCESS] = 4
90 },
91 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
92 };
93 struct nir_intrinsic nir_bindless_image_store_raw_intel = {
94 .name = "bindless_image_store_raw_intel",
95 .srcs_n = 3,
96 .src_components_n = {
97 1,1,0
98 },
99 .idxs_n = 4,
100 .idxs_map = {
101 [NIR_INTRINSIC_IDX_IMAGE_DIM] = 1,
102 [NIR_INTRINSIC_IDX_IMAGE_ARRAY] = 2,
103 [NIR_INTRINSIC_IDX_FORMAT] = 3,
104 [NIR_INTRINSIC_IDX_ACCESS] = 4
105 }
106 };
107 /* bindless version */
108 /*----------------------------------------------------------------------------*/
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/intel/intel.c deleted (index 799d8a4..0000000)
1 /* Load a relocatable 32-bit value */
2 static struct nir_intrinsic nir_load_reloc_const_intel = {
3 .name = "load_reloc_const_intel",
4 .has_dest = true,
5 .dest_components_n = 1,
6 .bit_szs = 0x20,
7 .idxs_n = 1,
8 .idxs_map = {
9 [NIR_INTRINSIC_IDX_PARAM_IDX] = 1
10 },
11 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
12 };
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/intel/system_values.c deleted (index 18643be..0000000)
1 /* Number of data items being operated on for a SIMD program. */
2 static struct nir_intrinsic nir_load_simd_width_intel = {
3 .name = "load_simd_width_intel",
4 .has_dest = true,
5 .dest_components_n = 1,
6 .bit_szs = 0x20,
7 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
8 .system_value = true
9 };
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/ir3/ir3.c deleted (index a8cd7b8..0000000)
1 /*
2 * IR3-specific version of most SSBO intrinsics. The only different
3 * compare to the originals is that they add an extra source to hold
4 * the dword-offset, which is needed by the backend code apart from
5 * the byte-offset already provided by NIR in one of the sources.
6 *
7 * NIR lowering pass 'ir3_nir_lower_io_offset' will replace the
8 * original SSBO intrinsics by these, placing the computed
9 * dword-offset always in the last source.
10 *
11 * The float versions are not handled because those are not supported
12 * by the backend.
13 */
14 struct nir_intrinsic nir_ssbo_atomic_add_ir3 = {
15 .name = "ssbo_atomic_add_ir3",
16 .srcs_n = 4,
17 .src_components_n = {
18 1,1,1,1
19 },
20 .has_dest = true,
21 .idxs_n = 1,
22 .idxs_map = {
23 [NIR_INTRINSIC_IDX_ACCESS] = 1
24 },
25 .dest_components_n = 1
26 };
27 struct nir_intrinsic nir_ssbo_atomic_imin_ir3 = {
28 .name = "ssbo_atomic_imin_ir3",
29 .srcs_n = 4,
30 .src_components_n = {
31 1,1,1,1
32 },
33 .has_dest = true,
34 .idxs_n = 1,
35 .idxs_map = {
36 [NIR_INTRINSIC_IDX_ACCESS] = 1
37 },
38 .dest_components_n = 1
39 };
40 struct nir_intrinsic nir_ssbo_atomic_umin_ir3 = {
41 .name = "ssbo_atomic_umin_ir3",
42 .srcs_n = 4,
43 .src_components_n = {
44 1,1,1,1
45 },
46 .idxs_n = 1,
47 .idxs_map = {
48 [NIR_INTRINSIC_IDX_ACCESS] = 1
49 },
50 .has_dest = true,
51 .dest_components_n = 1
52 };
53 struct nir_intrinsic nir_ssbo_atomic_imax_ir3 = {
54 .name = "ssbo_atomic_imax_ir3",
55 .srcs_n = 4,
56 .src_components_n = {
57 1,1,1,1
58 },
59 .has_dest = true,
60 .idxs_n = 1,
61 .idxs_map = {
62 [NIR_INTRINSIC_IDX_ACCESS] = 1
63 },
64 .dest_components_n = 1
65 };
66 struct nir_intrinsic nir_ssbo_atomic_umax_ir3 = {
67 .name = "ssbo_atomic_umax_ir3",
68 .srcs_n = 4,
69 .src_components_n = {
70 1,1,1,1
71 },
72 .idxs_n = 1,
73 .idxs_map = {
74 [NIR_INTRINSIC_IDX_ACCESS] = 1
75 },
76 .has_dest = true,
77 .dest_components_n = 1
78 };
79 struct nir_intrinsic nir_ssbo_atomic_and_ir3 = {
80 .name = "ssbo_atomic_and_ir3",
81 .srcs_n = 4,
82 .src_components_n = {
83 1,1,1,1
84 },
85 .idxs_n = 1,
86 .idxs_map = {
87 [NIR_INTRINSIC_IDX_ACCESS] = 1
88 },
89 .has_dest = true,
90 .dest_components_n = 1
91 };
92 struct nir_intrinsic nir_ssbo_atomic_or_ir3 = {
93 .name = "ssbo_atomic_or_ir3",
94 .srcs_n = 4,
95 .src_components_n = {
96 1,1,1,1
97 },
98 .idxs_n = 1,
99 .idxs_map = {
100 [NIR_INTRINSIC_IDX_ACCESS] = 1
101 },
102 .has_dest = true,
103 .dest_components_n = 1
104 };
105 struct nir_intrinsic nir_ssbo_atomic_xor_ir3 = {
106 .name = "ssbo_atomic_xor_ir3",
107 .srcs_n = 4,
108 .src_components_n = {
109 1,1,1,1
110 },
111 .idxs_n = 1,
112 .idxs_map = {
113 [NIR_INTRINSIC_IDX_ACCESS] = 1
114 },
115 .has_dest = true,
116 .dest_components_n = 1
117 };
118 struct nir_intrinsic nir_ssbo_atomic_exchange_ir3 = {
119 .name = "ssbo_atomic_exchange_ir3",
120 .srcs_n = 4,
121 .src_components_n = {
122 1,1,1,1
123 },
124 .idxs_n = 1,
125 .idxs_map = {
126 [NIR_INTRINSIC_IDX_ACCESS] = 1
127 },
128 .has_dest = true,
129 .dest_components_n = 1
130 };
131 struct nir_intrinsic nir_ssbo_atomic_comp_swap_ir3 = {
132 .name = "ssbo_atomic_comp_swap_ir3",
133 .srcs_n = 5,
134 .src_components_n = {
135 1,1,1,1,1
136 },
137 .idxs_n = 1,
138 .idxs_map = {
139 [NIR_INTRINSIC_IDX_ACCESS] = 1
140 },
141 .has_dest = true,
142 .dest_components_n = 1
143 };
144 /* ir3 ssbo */
145 /*----------------------------------------------------------------------------*/
146 /*
147 * IR3-specific intrinsics for tessellation control shaders. cond_end_ir3 end
148 * the shader when src0 is false and is used to narrow down the TCS shader to
149 * just thread 0 before writing out tessellation levels.
150 */
151 struct nir_intrinsic nir_cond_end_ir3 = {
152 .name = "cond_end_ir3",
153 .srcs_n = 1,
154 .src_components_n = {
155 1
156 }
157 };
158 /*
159 * end_patch_ir3 is used just before thread 0 exist the TCS and presumably
160 * signals the TE that the patch is complete and can be tessellated.
161 */
162 struct nir_intrinsic nir_end_patch_ir3 = {
163 .name = "end_patch_ir3"
164 };
165 /*
166 * IR3-specific bindless handle specifier. Similar to vulkan_resource_index, but
167 * without the binding because the hardware expects a single flattened index
168 * rather than a (binding, index) pair. We may also want to use this with GL.
169 * Note that this doesn't actually turn into a HW instruction.
170 */
171 struct nir_intrinsic nir_bindless_resource_ir3 = {
172 .name = "bindless_resource_ir3",
173 .srcs_n = 1,
174 .src_components_n = {
175 1
176 },
177 .has_dest = true,
178 .dest_components_n = 1,
179 .idxs_n = 1,
180 .idxs_map = {
181 [NIR_INTRINSIC_IDX_DESC_SET] = 1
182 },
183 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
184 };
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/ir3/load.c deleted (index 5f58f48..0000000)
1 /*
2 * IR3-specific load/store intrinsics. These access a buffer used to pass data
3 * between geometry stages - perhaps it's explicit access to the vertex cache.
4 */
5 struct nir_intrinsic nir_load_shared_ir3 = {
6 .name = "load_shared_ir3",
7 .srcs_n = 1,
8 .src_components_n = {
9 1
10 },
11 .has_dest = true,
12 .idxs_n = 3,
13 .idxs_map = {
14 [NIR_INTRINSIC_IDX_BASE] = 1,
15 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 2,
16 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 3
17 },
18 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
19 };
20 struct nir_intrinsic nir_load_ssbo_ir3 = {
21 .name = "load_ssbo_ir3",
22 .srcs_n = 3,
23 .src_components_n = {
24 1,1,1
25 },
26 .has_dest = true,
27 .idxs_n = 3,
28 .idxs_map = {
29 [NIR_INTRINSIC_IDX_ACCESS] = 1,
30 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 2,
31 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 3
32 },
33 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
34 };
35 /*---------------------------------------------------------------------------*/
36 /*
37 * IR3-specific load/store global intrinsics. They take a 64-bit base address
38 * and a 32-bit offset. The hardware will add the base and the offset, which
39 * saves us from doing 64-bit math on the base address.
40 */
41 /*
42 * src[] = { address(vec2 of hi+lo uint32_t), offset }.
43 * const_index[] = { access, align_mul, align_offset }
44 */
45 struct nir_intrinsic nir_load_global_ir3 = {
46 .name = "load_global_ir3",
47 .srcs_n = 2,
48 .src_components_n = {
49 2, 1
50 },
51 .has_dest = true,
52 .idxs_n = 3,
53 .idxs_map = {
54 [NIR_INTRINSIC_IDX_ACCESS] = 1,
55 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 2,
56 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 3
57 },
58 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE
59 };
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/ir3/store.c deleted (index d5307e2..0000000)
1 /*
2 * IR3-specific load/store intrinsics. These access a buffer used to pass data
3 * between geometry stages - perhaps it's explicit access to the vertex cache.
4 */
5 /* src[] = { value, offset }. */
6 struct nir_intrinsic nir_store_shared_ir3 = {
7 .name = "store_shared_ir3",
8 .srcs_n = 2,
9 .src_components_n = {
10 0,1
11 },
12 .idxs_n = 3,
13 .idxs_map = {
14 [NIR_INTRINSIC_IDX_BASE] = 1,
15 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 2,
16 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 3
17 }
18 };
19 struct nir_intrinsic nir_store_ssbo_ir3 = {
20 .name = "store_ssbo_ir3",
21 .srcs_n = 4,
22 .src_components_n = {
23 0,1,1,1
24 },
25 .idxs_n = 4,
26 .idxs_map = {
27 [NIR_INTRINSIC_IDX_WRMASK] = 1,
28 [NIR_INTRINSIC_IDX_ACCESS] = 2,
29 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 3,
30 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 4
31 }
32 };
33 /*---------------------------------------------------------------------------*/
34 /*
35 * IR3-specific load/store global intrinsics. They take a 64-bit base address
36 * and a 32-bit offset. The hardware will add the base and the offset, which
37 * saves us from doing 64-bit math on the base address.
38 */
39 /*
40 * src[] = { value, address(vec2 of hi+lo uint32_t), offset }.
41 * const_index[] = { write_mask, align_mul, align_offset }
42 */
43 struct nir_intrinsic nir_store_global_ir3 = {
44 .name = "store_global_ir3",
45 .srcs_n = 3,
46 .src_components_n = {
47 0,2,1
48 },
49 .idxs_n = 3,
50 .idxs_map = {
51 [NIR_INTRINSIC_IDX_ACCESS] = 1,
52 [NIR_INTRINSIC_IDX_ALIGN_MUL] = 2,
53 [NIR_INTRINSIC_IDX_ALIGN_OFFSET] = 3
54 }
55 };
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/ir3/system_values.c deleted (index 9374a9f..0000000)
1 /* System values for freedreno geometry shaders. */
2 static struct nir_intrinsic nir_load_vs_primitive_stride_ir3 = {
3 .name = "load_vs_primitive_stride_ir3",
4 .has_dest = true,
5 .dest_components_n = 1,
6 .bit_szs = 0x20,
7 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
8 .system_value = true
9 };
10 static struct nir_intrinsic nir_load_vs_vertex_stride_ir3 = {
11 .name = "load_vs_vertex_stride_ir3",
12 .has_dest = true,
13 .dest_components_n = 1,
14 .bit_szs = 0x20,
15 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
16 .system_value = true
17 };
18 static struct nir_intrinsic nir_load_gs_header_ir3 = {
19 .name = "load_gs_header_ir3",
20 .has_dest = true,
21 .dest_components_n = 1,
22 .bit_szs = 0x20,
23 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
24 .system_value = true
25 };
26 static struct nir_intrinsic nir_load_primitive_location_ir3 = {
27 .name = "load_primitive_location_ir3",
28 .has_dest = true,
29 .dest_components_n = 1,
30 .idxs_n = 1,
31 .idxs_map = {
32 [NIR_INTRINSIC_IDX_DRIVER_LOCATION] = 1,
33 },
34 .bit_szs = 0x20,
35 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
36 .system_value = true
37 };
38 /*----------------------------------------------------------------------------*/
39 /* System values for freedreno tessellation shaders. */
40 static struct nir_intrinsic nir_load_hs_patch_stride_ir3 = {
41 .name = "load_patch_stride_ir3",
42 .has_dest = true,
43 .dest_components_n = 1,
44 .bit_szs = 0x20,
45 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
46 .system_value = true
47 };
48 static struct nir_intrinsic nir_load_tess_factor_base_ir3 = {
49 .name = "load_tess_factor_base_ir3",
50 .has_dest = true,
51 .dest_components_n = 2,
52 .bit_szs = 0x20,
53 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
54 .system_value = true
55 };
56 static struct nir_intrinsic nir_load_tess_param_base_ir3 = {
57 .name = "load_tess_param_base_ir3",
58 .has_dest = true,
59 .dest_components_n = 2,
60 .bit_szs = 0x20,
61 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
62 .system_value = true
63 };
64 static struct nir_intrinsic nir_load_tcs_header_ir3 = {
65 .name = "load_tcs_header_ir3",
66 .has_dest = true,
67 .dest_components_n = 1,
68 .bit_szs = 0x20,
69 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER,
70 .system_value = true
71 };
File builders/mesa-vulkan-0/contrib/generators/nir/intrinsics/v3d/v3d.c deleted (index f28c588..0000000)
1 /*
2 * V3D-specific instrinc for tile buffer color reads.
3 *
4 * The hardware requires that we read the samples and components of a pixel
5 * in order, so we cannot eliminate or remove any loads in a sequence.
6 *
7 * src[] = { render_target }
8 * BASE = sample index
9 */
10 struct nir_intrinsic nir_load_tlb_color_v3d = {
11 .name = "load_tlb_color_v3d",
12 .srcs_n = 1,
13 .src_components_n = {
14 1
15 },
16 .has_dest = true,
17 .idxs_n = 2,
18 .idxs_map = {
19 [NIR_INTRINSIC_IDX_BASE] = 1,
20 [NIR_INTRINSIC_IDX_COMPONENT] = 2,
21 }
22 };
23
24 /*
25 * V3D-specific instrinc for per-sample tile buffer color writes.
26 *
27 * The driver backend needs to identify per-sample color writes and emit
28 * specific code for them.
29 *
30 * src[] = { value, render_target }
31 * BASE = sample index
32 */
33 struct nir_intrinsic nir_store_tlb_sample_color_v3d = {
34 .name = "store_tlb_sample_color_v3d",
35 .srcs_n = 2,
36 .src_components_n = {
37 0,1
38 },
39 .idxs_n = 3,
40 .idxs_map = {
41 [NIR_INTRINSIC_IDX_BASE] = 1,
42 [NIR_INTRINSIC_IDX_COMPONENT] = 2,
43 [NIR_INTRINSIC_IDX_SRC_TYPE] = 3
44 }
45 };
46
47 /*
48 * V3D-specific intrinsic to load the number of layers attached to
49 * the target framebuffer
50 */
51 struct nir_intrinsic nir_load_fb_layers_v3d = {
52 .name = "load_fb_layers_v3d",
53 .has_dest = true,
54 .dest_components_n = 1,
55 .flags = NIR_INTRINSIC_FLAGS_CAN_ELIMINATE | NIR_INTRINSIC_FLAGS_CAN_REORDER
56 };
File builders/mesa-vulkan-0/contrib/generators/nir/nir_builder_opcodes_h.c deleted (index 7716f63..0000000)
1 #include <stdint.h>
2 #include <stdio.h>
3 #include <stdlib.h>
4 #include <stdbool.h>
5
6 /*
7 * we don't care about memory management
8 * we don't care about global variables
9 * we don't care about speed optimization: clarity is prime
10 * we mostly don't care about code factorisation
11 * something is not expected:
12 * - corrupted generation (very very bad!)
13 * - more likely a crash (good!)
14 */
15
16 /*----------------------------------------------------------------------------*/
17 /* do fix C */
18 #define loop for(;;)
19 #define u8 uint8_t
20 #define s8 int8_t
21 #define u32 uint32_t
22 /* #define char u8 */
23 /*----------------------------------------------------------------------------*/
24
25 #include "nir_database.c"
26
27 static char *code_prologue = "\
28 #ifndef _NIR_BUILDERS_OPCODES_\n\
29 #define _NIR_BUILDERS_OPCODES_";
30
31 static char *code_epilogue = "\n#endif /* _NIR_BUILDERS_OPCODES_ */";
32
33 /* should use C stdlib functions instead of glib extensions */
34 #define OUT(fmt, ...) dprintf(1,fmt,##__VA_ARGS__)
35 #define ARRAY_N(a) sizeof(a) / sizeof(*a)
36
37 #define NO_ARRAY_ALU_SRC_OPDS_N_MAX 4
38 static void builder_alu_gen(u32 op)
39 {
40 u32 src_opd;
41 OUT("\nstatic inline nir_ssa_def *\nnir_%s(nir_builder *build",
42 nir_ops[op]->name);
43 src_opd = 0;
44 loop {
45 if (src_opd == nir_ops[op]->inputs_n)
46 break;
47 OUT(", nir_ssa_def *src%u", src_opd);
48 ++src_opd;
49 };
50
51 /* upstream python code is brain damaged */
52 if (nir_ops[op]->inputs_n <= NO_ARRAY_ALU_SRC_OPDS_N_MAX) {
53 OUT(")\n{\n return nir_build_alu(build, nir_op_%s", nir_ops[op]->name);
54 src_opd = 0;
55 loop {
56 if (src_opd == NO_ARRAY_ALU_SRC_OPDS_N_MAX)
57 break;
58 if (src_opd < nir_ops[op]->inputs_n)
59 OUT(", src%u", src_opd);
60 else
61 OUT(", NULL");
62 ++src_opd;
63 };
64 OUT(");\n}");
65 } else {
66 OUT(")\n{\n nir_ssa_def *srcs[%u] = {", nir_ops[op]->inputs_n);
67 src_opd = 0;
68 loop {
69 if (src_opd == nir_ops[op]->inputs_n)
70 break;
71
72 OUT("src%u", src_opd);
73 if (src_opd < (nir_ops[op]->inputs_n - 1))
74 OUT(", ");
75 ++src_opd;
76 }
77 OUT("};");
78 OUT("\n return nir_build_alu_src_arr(build, nir_op_%s, srcs);\n}", nir_ops[op]->name);
79 }
80 }
81 #undef NO_ARRAY_ALU_SRC_OPDS_N_MAX
82
83 static bool is_alu(u32 op)
84 {
85 return nir_ops[op]->type == NIR_OP_TYPE_ALU;
86 }
87
88 static void builders_alu_gen(void)
89 {
90 u32 nir_op = 0;
91 u32 nir_ops_n = ARRAY_N(nir_ops);
92
93 loop {
94 if (nir_op == nir_ops_n)
95 break;
96 if (is_alu(nir_op))
97 builder_alu_gen(nir_op);
98 ++nir_op;
99 }
100 }
101
102 static char *load_system_value_code = "\
103 \n\n/* Generic builder for system values. */\n\
104 static inline nir_ssa_def * \n\
105 nir_load_system_value(nir_builder *build, nir_intrinsic_op op, int index,\n\
106 unsigned num_components, unsigned bit_size)\n\
107 {\n\
108 nir_intrinsic_instr *load = nir_intrinsic_instr_create(build->shader, op);\n\
109 if (nir_intrinsic_infos[op].dest_components > 0)\n\
110 assert(num_components == nir_intrinsic_infos[op].dest_components);\n\
111 else\n\
112 load->num_components = num_components;\n\
113 load->const_index[0] = index;\n\
114 nir_ssa_dest_init(&load->instr, &load->dest,\n\
115 num_components, bit_size, NULL);\n\
116 nir_builder_instr_insert(build, &load->instr);\n\
117 return &load->dest.ssa;\n\
118 }\n";
119
120 static bool has_one_bit_sz(u8 bit_szs)
121 {
122 u8 i;
123 u8 n;
124
125 i = 0;
126 n = 0;
127 loop {
128 if (((1 << i) & bit_szs) != 0) {
129 ++n;
130 if (n == 2)
131 return false;
132 }
133
134 ++i;
135
136 if (i == 8)
137 break;
138 }
139 if (n == 1)
140 return true;
141 return false;
142 }
143
144 static void builder_load_system_value_gen(struct nir_intrinsic *sys_val)
145 {
146 OUT("\n\n\
147 static inline nir_ssa_def * \n\
148 nir_%s(nir_builder *build", sys_val->name);
149
150 /* build the function declaration parameters */
151 if (sys_val->idxs_n != 0) /* only the first idx will be used */
152 OUT(", unsigned %s", idxs_str[sys_val->idxs_map[0]]);
153 if (sys_val->dest_components_n == 0)
154 OUT(", unsigned num_components");
155 if (!has_one_bit_sz(sys_val->bit_szs))
156 OUT(", unsigned bit_size");
157 OUT(")");
158
159 OUT("\n\
160 {\n\
161 return nir_load_system_value(build, nir_intrinsic_%s", sys_val->name);
162
163 /* build the function call parameters */
164 if (sys_val->idxs_n != 0) /* only the first idx will be used */
165 OUT(",\n\t\t\t %s", idxs_str[sys_val->idxs_map[0]]);
166 else
167 OUT(",\n\t\t\t 0");
168
169 if (sys_val->dest_components_n == 0)
170 OUT(",\n\t\t\t num_components");
171 else
172 OUT(",\n\t\t\t %u", sys_val->dest_components_n);
173 if (!has_one_bit_sz(sys_val->bit_szs))
174 OUT(", bit_size");
175 else /* for 1 bit_sz, the bit_sz is the value itself */
176 OUT(", %u", sys_val->bit_szs);
177 OUT(");\n}");
178 }
179
180 static void builders_load_system_value_gen(void)
181 {
182 u32 intrinsic_idx = 0;
183 u32 intrinsics_n = ARRAY_N(nir_intrinsics);
184
185 OUT(load_system_value_code);
186
187 loop {
188 struct nir_intrinsic *intrinsic;
189
190 if (intrinsic_idx == intrinsics_n)
191 break;
192
193 intrinsic = nir_intrinsics[intrinsic_idx];
194
195 if (intrinsic->system_value)
196 builder_load_system_value_gen(intrinsic);
197 ++intrinsic_idx;
198 };
199 }
200
201 static void builders_gen(void)
202 {
203 builders_alu_gen();
204 builders_load_system_value_gen();
205 }
206
207 int main(void)
208 {
209 OUT(code_prologue);
210 builders_gen();
211 OUT(code_epilogue);
212 exit(0);
213 }
File builders/mesa-vulkan-0/contrib/generators/nir/nir_database.c deleted (index 41bdff0..0000000)
1 #ifndef _NIR_DATABASE_
2 #define _NIR_DATABASE_
3 /*
4 * we don't require (to modify often/to make cross-language definitions), then
5 * a direct source file database is more than appropriate... should probably be
6 * straight the internal nir structure
7 */
8
9 /*
10 * gen: GENerator
11 * idx(s): InDeX(es)
12 * info: INFOrmation
13 * op(s): OPeration(s)
14 * opd(s): OPerand(s)
15 * prop(s): PROPert(y/ies)
16 * src: SouRCe
17 * dest: DESTination
18 * str: STRing
19 * sz(s): SiZe(s)
20 */
21 #include "nir_database_alu.c"
22 #include "nir_database_intrinsic.c"
23 #endif /* _NIR_DATABASE_ */
File builders/mesa-vulkan-0/contrib/generators/nir/nir_database_alu.c deleted (index 45eae97..0000000)
1 /*
2 * instead of starting top->bottom from the old generators, work
3 * bottom->top to re-construction the nir ops families, if ever...
4 */
5 #define NIR_TYPE_BOOL 1
6 #define NIR_TYPE_BOOL1 2
7 #define NIR_TYPE_BOOL8 3
8 #define NIR_TYPE_BOOL16 4
9 #define NIR_TYPE_BOOL32 5
10 #define NIR_TYPE_INT 6
11 #define NIR_TYPE_INT1 7
12 #define NIR_TYPE_INT8 8
13 #define NIR_TYPE_INT16 9
14 #define NIR_TYPE_INT32 10
15 #define NIR_TYPE_INT64 11
16 #define NIR_TYPE_UINT 12
17 #define NIR_TYPE_UINT1 13
18 #define NIR_TYPE_UINT8 14
19 #define NIR_TYPE_UINT16 15
20 #define NIR_TYPE_UINT32 16
21 #define NIR_TYPE_UINT64 17
22 #define NIR_TYPE_FLOAT 18
23 #define NIR_TYPE_FLOAT16 19
24 #define NIR_TYPE_FLOAT32 20
25 #define NIR_TYPE_FLOAT64 21
26
27 #define NIR_OP_TYPE_UNDEFINED 0
28 /* XXX: current database factorization makes the following useless */
29 #define NIR_OP_TYPE_ALU 1
30
31 #define NIR_OP_INPUTS_N_MAX 16
32 #define NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE 0x01
33 #define NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE 0x02
34 /* XXX: conversion field is used only by the intel driver for now */
35 struct nir_op {
36 char *name;
37 u8 type;
38
39 u8 output_sz;
40 u8 output_type;
41
42 u8 inputs_n;
43 u8 inputs_szs[NIR_OP_INPUTS_N_MAX];
44 u8 inputs_types[NIR_OP_INPUTS_N_MAX];
45
46 u8 algebraic_properties;
47 };
48
49 static struct nir_op nir_b2f16 = {
50 "b2f16",
51 NIR_OP_TYPE_ALU,
52 0,
53 NIR_TYPE_FLOAT16,
54 1,
55 {0},
56 {NIR_TYPE_BOOL},
57 0
58 };
59 static struct nir_op nir_b2f32 = {
60 "b2f32",
61 NIR_OP_TYPE_ALU,
62 0,
63 NIR_TYPE_FLOAT32,
64 1,
65 {0},
66 {NIR_TYPE_BOOL},
67 0
68 };
69 static struct nir_op nir_b2f64 = {
70 "b2f64",
71 NIR_OP_TYPE_ALU,
72 0,
73 NIR_TYPE_FLOAT64,
74 1,
75 {0},
76 {NIR_TYPE_BOOL},
77 0
78 };
79 static struct nir_op nir_b2i1 = {
80 "b2i1",
81 NIR_OP_TYPE_ALU,
82 0,
83 NIR_TYPE_INT1,
84 1,
85 {0},
86 {NIR_TYPE_BOOL},
87 0
88 };
89 static struct nir_op nir_b2i8 = {
90 "b2i8",
91 NIR_OP_TYPE_ALU,
92 0,
93 NIR_TYPE_INT8,
94 1,
95 {0},
96 {NIR_TYPE_BOOL},
97 0
98 };
99 static struct nir_op nir_b2i16 = {
100 "b2i16",
101 NIR_OP_TYPE_ALU,
102 0,
103 NIR_TYPE_INT16,
104 1,
105 {0},
106 {NIR_TYPE_BOOL},
107 0
108 };
109 static struct nir_op nir_b2i32 = {
110 "b2i32",
111 NIR_OP_TYPE_ALU,
112 0,
113 NIR_TYPE_INT32,
114 1,
115 {0},
116 {NIR_TYPE_BOOL},
117 0
118 };
119 static struct nir_op nir_b2i64 = {
120 "b2i64",
121 NIR_OP_TYPE_ALU,
122 0,
123 NIR_TYPE_INT64,
124 1,
125 {0},
126 {NIR_TYPE_BOOL},
127 0
128 };
129 static struct nir_op nir_b2b1 = {
130 "b2b1",
131 NIR_OP_TYPE_ALU,
132 0,
133 NIR_TYPE_BOOL1,
134 1,
135 {0},
136 {NIR_TYPE_BOOL},
137 0
138 };
139 static struct nir_op nir_b2b8 = {
140 "b2b8",
141 NIR_OP_TYPE_ALU,
142 0,
143 NIR_TYPE_BOOL8,
144 1,
145 {0},
146 {NIR_TYPE_BOOL},
147 0
148 };
149 static struct nir_op nir_b2b16 = {
150 "b2b16",
151 NIR_OP_TYPE_ALU,
152 0,
153 NIR_TYPE_BOOL16,
154 1,
155 {0},
156 {NIR_TYPE_BOOL},
157 0
158 };
159 static struct nir_op nir_b2b32 = {
160 "b2b32",
161 NIR_OP_TYPE_ALU,
162 0,
163 NIR_TYPE_BOOL32,
164 1,
165 {0},
166 {NIR_TYPE_BOOL},
167 0
168 };
169 /*============================================================================*/
170 /* b[1,8,16,32]csel */
171 static struct nir_op nir_bcsel = {
172 "bcsel",
173 NIR_OP_TYPE_ALU,
174 0,
175 NIR_TYPE_UINT,
176 3,
177 {0,0,0},
178 {NIR_TYPE_BOOL1,NIR_TYPE_UINT,NIR_TYPE_UINT},
179 0
180 };
181 static struct nir_op nir_b8csel = {
182 "b8csel",
183 NIR_OP_TYPE_ALU,
184 0,
185 NIR_TYPE_UINT,
186 3,
187 {0,0,0},
188 {NIR_TYPE_BOOL8,NIR_TYPE_UINT,NIR_TYPE_UINT},
189 0
190 };
191 static struct nir_op nir_b16csel = {
192 "b16csel",
193 NIR_OP_TYPE_ALU,
194 0,
195 NIR_TYPE_UINT,
196 3,
197 {0,0,0},
198 {NIR_TYPE_BOOL16,NIR_TYPE_UINT,NIR_TYPE_UINT},
199 0
200 };
201 static struct nir_op nir_b32csel = {
202 "b32csel",
203 NIR_OP_TYPE_ALU,
204 0,
205 NIR_TYPE_UINT,
206 3,
207 {0,0,0},
208 {NIR_TYPE_BOOL32,NIR_TYPE_UINT,NIR_TYPE_UINT},
209 0
210 };
211 /* b[1,8,16,32]csel */
212 /*============================================================================*/
213 static struct nir_op nir_bfi = {
214 "bfi",
215 NIR_OP_TYPE_ALU,
216 0,
217 NIR_TYPE_UINT32,
218 3,
219 {0,0,0},
220 {NIR_TYPE_UINT32,NIR_TYPE_UINT32,NIR_TYPE_UINT32},
221 0
222 };
223 static struct nir_op nir_bit_count = {
224 "bit_count",
225 NIR_OP_TYPE_ALU,
226 0,
227 NIR_TYPE_UINT32,
228 1,
229 {0},
230 {NIR_TYPE_UINT},
231 0
232 };
233 static struct nir_op nir_bitfield_insert = {
234 "bitfield_insert",
235 NIR_OP_TYPE_ALU,
236 0,
237 NIR_TYPE_UINT32,
238 4,
239 {0,0,0,0},
240 {NIR_TYPE_UINT32,NIR_TYPE_UINT32,NIR_TYPE_INT32,NIR_TYPE_INT32},
241 0
242 };
243 static struct nir_op nir_bitfield_reverse = {
244 "bitfield_reverse",
245 NIR_OP_TYPE_ALU,
246 0,
247 NIR_TYPE_UINT32,
248 1,
249 {0},
250 {NIR_TYPE_UINT32},
251 0
252 };
253 static struct nir_op nir_cube_face_coord = {
254 "cube_face_coord",
255 NIR_OP_TYPE_ALU,
256 2,
257 NIR_TYPE_FLOAT32,
258 1,
259 {3},
260 {NIR_TYPE_FLOAT32},
261 0
262 };
263 static struct nir_op nir_cube_face_index = {
264 "cube_face_index",
265 NIR_OP_TYPE_ALU,
266 1,
267 NIR_TYPE_FLOAT32,
268 1,
269 {3},
270 {NIR_TYPE_FLOAT32},
271 0
272 };
273 /*----------------------------------------------------------------------------*/
274 static struct nir_op nir_f2b1 = {
275 "f2b1",
276 NIR_OP_TYPE_ALU,
277 0,
278 NIR_TYPE_BOOL1,
279 1,
280 {0},
281 {NIR_TYPE_FLOAT},
282 0
283 };
284 static struct nir_op nir_f2b8 = {
285 "f2b8",
286 NIR_OP_TYPE_ALU,
287 0,
288 NIR_TYPE_BOOL8,
289 1,
290 {0},
291 {NIR_TYPE_FLOAT},
292 0
293 };
294 static struct nir_op nir_f2b16 = {
295 "f2b16",
296 NIR_OP_TYPE_ALU,
297 0,
298 NIR_TYPE_BOOL32,
299 1,
300 {0},
301 {NIR_TYPE_FLOAT},
302 0
303 };
304 static struct nir_op nir_f2b32 = {
305 "f2b32",
306 NIR_OP_TYPE_ALU,
307 0,
308 NIR_TYPE_BOOL32,
309 1,
310 {0},
311 {NIR_TYPE_FLOAT},
312 0
313 };
314 /*----------------------------------------------------------------------------*/
315 /*
316 * Special opcode that is the same as f2f16, i2i16, u2u16 except that it is safe
317 * to remove it if the result is immediately converted back to 32 bits again.
318 * This is generated as part of the precision lowering pass. mp stands for medium
319 */
320 static struct nir_op nir_f2fmp = {
321 "f2fmp",
322 NIR_OP_TYPE_ALU,
323 0,
324 NIR_TYPE_FLOAT16,
325 1,
326 {0},
327 {NIR_TYPE_FLOAT32},
328 0
329 };
330 static struct nir_op nir_i2imp = {
331 "i2imp",
332 NIR_OP_TYPE_ALU,
333 0,
334 NIR_TYPE_INT16,
335 1,
336 {0},
337 {NIR_TYPE_INT32},
338 0
339 };
340 /* u2ump isn't defined, because the behavior is equal to i2imp */
341 static struct nir_op nir_f2imp = {
342 "f2imp",
343 NIR_OP_TYPE_ALU,
344 0,
345 NIR_TYPE_INT16,
346 1,
347 {0},
348 {NIR_TYPE_FLOAT32},
349 0
350 };
351 static struct nir_op nir_f2ump = {
352 "f2ump",
353 NIR_OP_TYPE_ALU,
354 0,
355 NIR_TYPE_UINT16,
356 1,
357 {0},
358 {NIR_TYPE_FLOAT32},
359 0
360 };
361 static struct nir_op nir_i2fmp = {
362 "i2fmp",
363 NIR_OP_TYPE_ALU,
364 0,
365 NIR_TYPE_FLOAT16,
366 1,
367 {0},
368 {NIR_TYPE_INT32},
369 0
370 };
371 static struct nir_op nir_u2fmp = {
372 "u2fmp",
373 NIR_OP_TYPE_ALU,
374 0,
375 NIR_TYPE_FLOAT16,
376 1,
377 {0},
378 {NIR_TYPE_UINT32},
379 0
380 };
381 /*----------------------------------------------------------------------------*/
382 static struct nir_op nir_f2f16 = {
383 "f2f16",
384 NIR_OP_TYPE_ALU,
385 0,
386 NIR_TYPE_FLOAT16,
387 1,
388 {0},
389 {NIR_TYPE_FLOAT},
390 0
391 };
392 static struct nir_op nir_f2f16_rtne = {
393 "f2f16_rtne",
394 NIR_OP_TYPE_ALU,
395 0,
396 NIR_TYPE_FLOAT16,
397 1,
398 {0},
399 {NIR_TYPE_FLOAT},
400 0
401 };
402 static struct nir_op nir_f2f16_rtz = {
403 "f2f16_rtz",
404 NIR_OP_TYPE_ALU,
405 0,
406 NIR_TYPE_FLOAT16,
407 1,
408 {0},
409 {NIR_TYPE_FLOAT},
410 0
411 };
412 static struct nir_op nir_f2f32 = {
413 "f2f32",
414 NIR_OP_TYPE_ALU,
415 0,
416 NIR_TYPE_FLOAT32,
417 1,
418 {0},
419 {NIR_TYPE_FLOAT},
420 0
421 };
422 static struct nir_op nir_f2f64 = {
423 "f2f64",
424 NIR_OP_TYPE_ALU,
425 0,
426 NIR_TYPE_FLOAT64,
427 1,
428 {0},
429 {NIR_TYPE_FLOAT},
430 0
431 };
432 static struct nir_op nir_f2i1 = {
433 "f2i1",
434 NIR_OP_TYPE_ALU,
435 0,
436 NIR_TYPE_INT1,
437 1,
438 {0},
439 {NIR_TYPE_FLOAT},
440 0
441 };
442 static struct nir_op nir_f2i16 = {
443 "f2i16",
444 NIR_OP_TYPE_ALU,
445 0,
446 NIR_TYPE_INT16,
447 1,
448 {0},
449 {NIR_TYPE_FLOAT},
450 0
451 };
452 static struct nir_op nir_f2i32 = {
453 "f2i32",
454 NIR_OP_TYPE_ALU,
455 0,
456 NIR_TYPE_INT32,
457 1,
458 {0},
459 {NIR_TYPE_FLOAT},
460 0
461 };
462 static struct nir_op nir_f2i64 = {
463 "f2i64",
464 NIR_OP_TYPE_ALU,
465 0,
466 NIR_TYPE_INT64,
467 1,
468 {0},
469 {NIR_TYPE_FLOAT},
470 0
471 };
472 static struct nir_op nir_f2i8 = {
473 "f2i8",
474 NIR_OP_TYPE_ALU,
475 0,
476 NIR_TYPE_INT8,
477 1,
478 {0},
479 {NIR_TYPE_FLOAT},
480 0
481 };
482 static struct nir_op nir_f2u1 = {
483 "f2u1",
484 NIR_OP_TYPE_ALU,
485 0,
486 NIR_TYPE_UINT1,
487 1,
488 {0},
489 {NIR_TYPE_FLOAT},
490 0
491 };
492 static struct nir_op nir_f2u16 = {
493 "f2u16",
494 NIR_OP_TYPE_ALU,
495 0,
496 NIR_TYPE_UINT16,
497 1,
498 {0},
499 {NIR_TYPE_FLOAT},
500 0
501 };
502 static struct nir_op nir_f2u32 = {
503 "f2u32",
504 NIR_OP_TYPE_ALU,
505 0,
506 NIR_TYPE_UINT32,
507 1,
508 {0},
509 {NIR_TYPE_FLOAT},
510 0
511 };
512 static struct nir_op nir_f2u64 = {
513 "f2u64",
514 NIR_OP_TYPE_ALU,
515 0,
516 NIR_TYPE_UINT64,
517 1,
518 {0},
519 {NIR_TYPE_FLOAT},
520 0
521 };
522 static struct nir_op nir_f2u8 = {
523 "f2u8",
524 NIR_OP_TYPE_ALU,
525 0,
526 NIR_TYPE_UINT8,
527 1,
528 {0},
529 {NIR_TYPE_FLOAT},
530 0
531 };
532 static struct nir_op nir_fabs = {
533 "fabs",
534 NIR_OP_TYPE_ALU,
535 0,
536 NIR_TYPE_FLOAT,
537 1,
538 {0},
539 {NIR_TYPE_FLOAT},
540 0
541 };
542 static struct nir_op nir_fceil = {
543 "fceil",
544 NIR_OP_TYPE_ALU,
545 0,
546 NIR_TYPE_FLOAT,
547 1,
548 {0},
549 {NIR_TYPE_FLOAT},
550 0,
551 };
552 static struct nir_op nir_fcos = {
553 "fcos",
554 NIR_OP_TYPE_ALU,
555 0,
556 NIR_TYPE_FLOAT,
557 1,
558 {0},
559 {NIR_TYPE_FLOAT},
560 0
561 };
562 static struct nir_op nir_fcsel = {
563 "fcsel",
564 NIR_OP_TYPE_ALU,
565 0,
566 NIR_TYPE_FLOAT32,
567 3,
568 {0,0,0},
569 {NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32,NIR_TYPE_FLOAT32},
570 0
571 };
572 static struct nir_op nir_fddx = {
573 "fddx",
574 NIR_OP_TYPE_ALU,
575 0,
576 NIR_TYPE_FLOAT,
577 1,
578 {0},
579 {NIR_TYPE_FLOAT},
580 0
581 };
582 static struct nir_op nir_fddx_coarse = {
583 "fddx_coarse",
584 NIR_OP_TYPE_ALU,
585 0,
586 NIR_TYPE_FLOAT,
587 1,
588 {0},
589 {NIR_TYPE_FLOAT},
590 0
591 };
592 static struct nir_op nir_fddx_fine = {
593 "fddx_fine",
594 NIR_OP_TYPE_ALU,
595 0,
596 NIR_TYPE_FLOAT,
597 1,
598 {0},
599 {NIR_TYPE_FLOAT},
600 0
601 };
602 static struct nir_op nir_fddy = {
603 "fddy",
604 NIR_OP_TYPE_ALU,
605 0,
606 NIR_TYPE_FLOAT,
607 1,
608 {0},
609 {NIR_TYPE_FLOAT},
610 0
611 };
612 static struct nir_op nir_fddy_coarse = {
613 "fddy_coarse",
614 NIR_OP_TYPE_ALU,
615 0,
616 NIR_TYPE_FLOAT,
617 1,
618 {0},
619 {NIR_TYPE_FLOAT},
620 0
621 };
622 static struct nir_op nir_fddy_fine = {
623 "fddy_fine",
624 NIR_OP_TYPE_ALU,
625 0,
626 NIR_TYPE_FLOAT,
627 1,
628 {0},
629 {NIR_TYPE_FLOAT},
630 0
631 };
632 static struct nir_op nir_fdph = {
633 "fdph",
634 NIR_OP_TYPE_ALU,
635 1,
636 NIR_TYPE_FLOAT,
637 2,
638 {3,4},
639 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
640 0
641 };
642 static struct nir_op nir_fdph_replicated = {
643 "fdph_replicated",
644 NIR_OP_TYPE_ALU,
645 4,
646 NIR_TYPE_FLOAT,
647 2,
648 {3,4},
649 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
650 0
651 };
652 /*---------------------------------------------------------------------------*/
653 static struct nir_op nir_fexp2 = {
654 "fexp2",
655 NIR_OP_TYPE_ALU,
656 0,
657 NIR_TYPE_FLOAT,
658 1,
659 {0},
660 {NIR_TYPE_FLOAT},
661 0
662 };
663 static struct nir_op nir_ffloor = {
664 "ffloor",
665 NIR_OP_TYPE_ALU,
666 0,
667 NIR_TYPE_FLOAT,
668 1,
669 {0},
670 {NIR_TYPE_FLOAT},
671 0
672 };
673 static struct nir_op nir_ffma = {
674 "ffma",
675 NIR_OP_TYPE_ALU,
676 0,
677 NIR_TYPE_FLOAT,
678 3,
679 {0,0,0},
680 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
681 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
682 };
683 static struct nir_op nir_ffract = {
684 "ffract",
685 NIR_OP_TYPE_ALU,
686 0,
687 NIR_TYPE_FLOAT,
688 1,
689 {0},
690 {NIR_TYPE_FLOAT},
691 0
692 };
693 /*----------------------------------------------------------------------------*/
694 static struct nir_op nir_find_lsb = {
695 "find_lsb",
696 NIR_OP_TYPE_ALU,
697 0,
698 NIR_TYPE_INT32,
699 1,
700 {0},
701 {NIR_TYPE_INT},
702 0
703 };
704 static struct nir_op nir_flog2 = {
705 "flog2",
706 NIR_OP_TYPE_ALU,
707 0,
708 NIR_TYPE_FLOAT,
709 1,
710 {0},
711 {NIR_TYPE_FLOAT},
712 0
713 };
714 static struct nir_op nir_flrp = {
715 "flrp",
716 NIR_OP_TYPE_ALU,
717 0,
718 NIR_TYPE_FLOAT,
719 3,
720 {0,0,0},
721 {NIR_TYPE_FLOAT,NIR_TYPE_FLOAT,NIR_TYPE_FLOAT},
722 0
723 };
724 static struct nir_op nir_fneg = {
725 "fneg",
726 NIR_OP_TYPE_ALU,
727 0,
728 NIR_TYPE_FLOAT,
729 1,
730 {0},
731 {NIR_TYPE_FLOAT},
732 0
733 };
734 static struct nir_op nir_fquantize2f16 = {
735 "fquantize2f16",
736 NIR_OP_TYPE_ALU,
737 0,
738 NIR_TYPE_FLOAT,
739 1,
740 {0},
741 {NIR_TYPE_FLOAT},
742 0
743 };
744 static struct nir_op nir_frcp = {
745 "frcp",
746 NIR_OP_TYPE_ALU,
747 0,
748 NIR_TYPE_FLOAT,
749 1,
750 {0},
751 {NIR_TYPE_FLOAT},
752 0
753 };
754 static struct nir_op nir_frexp_exp = {
755 "frexp_exp",
756 NIR_OP_TYPE_ALU,
757 0,
758 NIR_TYPE_INT32,
759 1,
760 {0},
761 {NIR_TYPE_FLOAT},
762 0
763 };
764 static struct nir_op nir_frexp_sig = {
765 "frexp_sig",
766 NIR_OP_TYPE_ALU,
767 0,
768 NIR_TYPE_FLOAT,
769 1,
770 {0},
771 {NIR_TYPE_FLOAT},
772 0
773 };
774 static struct nir_op nir_fround_even = {
775 "fround_even",
776 NIR_OP_TYPE_ALU,
777 0,
778 NIR_TYPE_FLOAT,
779 1,
780 {0},
781 {NIR_TYPE_FLOAT},
782 0
783 };
784 static struct nir_op nir_frsq = {
785 "frsq",
786 NIR_OP_TYPE_ALU,
787 0,
788 NIR_TYPE_FLOAT,
789 1,
790 {0},
791 {NIR_TYPE_FLOAT},
792 0
793 };
794 static struct nir_op nir_fsat = {
795 "fsat",
796 NIR_OP_TYPE_ALU,
797 0,
798 NIR_TYPE_FLOAT,
799 1,
800 {0},
801 {NIR_TYPE_FLOAT},
802 0
803 };
804 static struct nir_op nir_fsat_signed = {
805 "fsat_signed",
806 NIR_OP_TYPE_ALU,
807 0,
808 NIR_TYPE_FLOAT,
809 1,
810 {0},
811 {NIR_TYPE_FLOAT},
812 0
813 };
814 static struct nir_op nir_fclamp_pos = {
815 "fclamp_pos",
816 NIR_OP_TYPE_ALU,
817 0,
818 NIR_TYPE_FLOAT,
819 1,
820 {0},
821 {NIR_TYPE_FLOAT},
822 0
823 };
824 static struct nir_op nir_fsign = {
825 "fsign",
826 NIR_OP_TYPE_ALU,
827 0,
828 NIR_TYPE_FLOAT,
829 1,
830 {0},
831 {NIR_TYPE_FLOAT},
832 0
833 };
834 static struct nir_op nir_fsin = {
835 "fsin",
836 NIR_OP_TYPE_ALU,
837 0,
838 NIR_TYPE_FLOAT,
839 1,
840 {0},
841 {NIR_TYPE_FLOAT},
842 0
843 };
844 static struct nir_op nir_fsqrt = {
845 "fsqrt",
846 NIR_OP_TYPE_ALU,
847 0,
848 NIR_TYPE_FLOAT,
849 1,
850 {0},
851 {NIR_TYPE_FLOAT},
852 0
853 };
854 static struct nir_op nir_ftrunc = {
855 "ftrunc",
856 NIR_OP_TYPE_ALU,
857 0,
858 NIR_TYPE_FLOAT,
859 1,
860 {0},
861 {NIR_TYPE_FLOAT},
862 0
863 };
864 /*----------------------------------------------------------------------------*/
865 static struct nir_op nir_i2b1 = {
866 "i2b1",
867 NIR_OP_TYPE_ALU,
868 0,
869 NIR_TYPE_BOOL1,
870 1,
871 {0},
872 {NIR_TYPE_INT},
873 0
874 };
875 static struct nir_op nir_i2b8 = {
876 "i2b8",
877 NIR_OP_TYPE_ALU,
878 0,
879 NIR_TYPE_BOOL8,
880 1,
881 {0},
882 {NIR_TYPE_INT},
883 0
884 };
885 static struct nir_op nir_i2b16 = {
886 "i2b16",
887 NIR_OP_TYPE_ALU,
888 0,
889 NIR_TYPE_BOOL16,
890 1,
891 {0},
892 {NIR_TYPE_INT},
893 0
894 };
895 static struct nir_op nir_i2b32 = {
896 "i2b32",
897 NIR_OP_TYPE_ALU,
898 0,
899 NIR_TYPE_BOOL32,
900 1,
901 {0},
902 {NIR_TYPE_INT},
903 0
904 };
905 /*----------------------------------------------------------------------------*/
906 static struct nir_op nir_i2f16 = {
907 "i2f16",
908 NIR_OP_TYPE_ALU,
909 0,
910 NIR_TYPE_FLOAT16,
911 1,
912 {0},
913 {NIR_TYPE_INT},
914 0
915 };
916 static struct nir_op nir_i2f32 = {
917 "i2f32",
918 NIR_OP_TYPE_ALU,
919 0,
920 NIR_TYPE_FLOAT32,
921 1,
922 {0},
923 {NIR_TYPE_INT},
924 0
925 };
926 static struct nir_op nir_i2f64 = {
927 "i2f64",
928 NIR_OP_TYPE_ALU,
929 0,
930 NIR_TYPE_FLOAT64,
931 1,
932 {0},
933 {NIR_TYPE_INT},
934 0
935 };
936 static struct nir_op nir_i2i1 = {
937 "i2i1",
938 NIR_OP_TYPE_ALU,
939 0,
940 NIR_TYPE_INT1,
941 1,
942 {0},
943 {NIR_TYPE_INT},
944 0
945 };
946 static struct nir_op nir_i2i16 = {
947 "i2i16",
948 NIR_OP_TYPE_ALU,
949 0,
950 NIR_TYPE_INT16,
951 1,
952 {0},
953 {NIR_TYPE_INT},
954 0
955 };
956 static struct nir_op nir_i2i32 = {
957 "i2i32",
958 NIR_OP_TYPE_ALU,
959 0,
960 NIR_TYPE_INT32,
961 1,
962 {0},
963 {NIR_TYPE_INT},
964 0
965
966 };
967 static struct nir_op nir_i2i64 = {
968 "i2i64",
969 NIR_OP_TYPE_ALU,
970 0,
971 NIR_TYPE_INT64,
972 1,
973 {0},
974 {NIR_TYPE_INT},
975 0
976 };
977 static struct nir_op nir_i2i8 = {
978 "i2i8",
979 NIR_OP_TYPE_ALU,
980 0,
981 NIR_TYPE_INT8,
982 1,
983 {0},
984 {NIR_TYPE_INT},
985 0
986 };
987 static struct nir_op nir_iabs = {
988 "iabs",
989 NIR_OP_TYPE_ALU,
990 0,
991 NIR_TYPE_INT,
992 1,
993 {0},
994 {NIR_TYPE_INT},
995 0
996 };
997 static struct nir_op nir_ibfe = {
998 "ibfe",
999 NIR_OP_TYPE_ALU,
1000 0,
1001 NIR_TYPE_INT32,
1002 3,
1003 {0,0,0},
1004 {NIR_TYPE_INT32,NIR_TYPE_UINT32,NIR_TYPE_UINT32},
1005 0
1006 };
1007 static struct nir_op nir_ibitfield_extract = {
1008 "ibitfield_extract",
1009 NIR_OP_TYPE_ALU,
1010 0,
1011 NIR_TYPE_INT32,
1012 3,
1013 {0,0,0},
1014 {NIR_TYPE_INT32,NIR_TYPE_INT32,NIR_TYPE_INT32},
1015 0
1016 };
1017 static struct nir_op nir_ifind_msb = {
1018 "ifind_msb",
1019 NIR_OP_TYPE_ALU,
1020 0,
1021 NIR_TYPE_INT32,
1022 1,
1023 {0},
1024 NIR_TYPE_INT32,
1025 0
1026 };
1027 static struct nir_op nir_ineg = {
1028 "ineg",
1029 NIR_OP_TYPE_ALU,
1030 0,
1031 NIR_TYPE_INT,
1032 1,
1033 {0},
1034 {NIR_TYPE_INT},
1035 0
1036 };
1037 static struct nir_op nir_inot = {
1038 "inot",
1039 NIR_OP_TYPE_ALU,
1040 0,
1041 NIR_TYPE_INT,
1042 1,
1043 {0},
1044 {NIR_TYPE_INT},
1045 0
1046 };
1047 static struct nir_op nir_ishl = {
1048 "ishl",
1049 NIR_OP_TYPE_ALU,
1050 0,
1051 NIR_TYPE_INT,
1052 2,
1053 {0,0},
1054 {NIR_TYPE_INT,NIR_TYPE_UINT32},
1055 0
1056 };
1057 static struct nir_op nir_ishr = {
1058 "ishr",
1059 NIR_OP_TYPE_ALU,
1060 0,
1061 NIR_TYPE_INT,
1062 2,
1063 {0,0},
1064 {NIR_TYPE_INT,NIR_TYPE_UINT32},
1065 0
1066 };
1067 static struct nir_op nir_isign = {
1068 "isign",
1069 NIR_OP_TYPE_ALU,
1070 0,
1071 NIR_TYPE_INT,
1072 1,
1073 {0},
1074 {NIR_TYPE_INT},
1075 0
1076 };
1077 static struct nir_op nir_ldexp = {
1078 "ldexp",
1079 NIR_OP_TYPE_ALU,
1080 0,
1081 NIR_TYPE_FLOAT,
1082 2,
1083 {0,0},
1084 {NIR_TYPE_FLOAT,NIR_TYPE_INT32},
1085 0
1086 };
1087 static struct nir_op nir_mov = {
1088 "mov",
1089 NIR_OP_TYPE_ALU,
1090 0,
1091 NIR_TYPE_UINT,
1092 1,
1093 {0},
1094 {NIR_TYPE_UINT},
1095 0
1096 };
1097 static struct nir_op nir_pack_32_4x8 = {
1098 "pack_32_4x8",
1099 NIR_OP_TYPE_ALU,
1100 1,
1101 NIR_TYPE_UINT32,
1102 1,
1103 {4},
1104 {NIR_TYPE_UINT8},
1105 0
1106 };
1107 static struct nir_op nir_pack_32_2x16 = {
1108 "pack_32_2x16",
1109 NIR_OP_TYPE_ALU,
1110 1,
1111 NIR_TYPE_UINT32,
1112 1,
1113 {2},
1114 {NIR_TYPE_UINT16},
1115 0
1116 };
1117 static struct nir_op nir_pack_64_2x32 = {
1118 "pack_64_2x32",
1119 NIR_OP_TYPE_ALU,
1120 1,
1121 NIR_TYPE_UINT64,
1122 1,
1123 {2},
1124 {NIR_TYPE_UINT32},
1125 0
1126 };
1127 static struct nir_op nir_pack_64_4x16 = {
1128 "pack_64_4x16",
1129 NIR_OP_TYPE_ALU,
1130 1,
1131 NIR_TYPE_UINT64,
1132 1,
1133 {4},
1134 {NIR_TYPE_UINT16},
1135 0
1136 };
1137 static struct nir_op nir_pack_half_2x16 = {
1138 "pack_half_2x16",
1139 NIR_OP_TYPE_ALU,
1140 1,
1141 NIR_TYPE_UINT32,
1142 1,
1143 {2},
1144 {NIR_TYPE_FLOAT32},
1145 0
1146 };
1147 static struct nir_op nir_pack_snorm_2x16 = {
1148 "pack_snorm_2x16",
1149 NIR_OP_TYPE_ALU,
1150 1,
1151 NIR_TYPE_UINT32,
1152 1,
1153 {2},
1154 {NIR_TYPE_FLOAT32},
1155 0
1156 };
1157 static struct nir_op nir_pack_snorm_4x8 = {
1158 "pack_snorm_4x8",
1159 NIR_OP_TYPE_ALU,
1160 1,
1161 NIR_TYPE_UINT32,
1162 1,
1163 {4},
1164 {NIR_TYPE_FLOAT32},
1165 0
1166 };
1167 static struct nir_op nir_pack_unorm_2x16 = {
1168 "pack_unorm_2x16",
1169 NIR_OP_TYPE_ALU,
1170 1,
1171 NIR_TYPE_UINT32,
1172 1,
1173 {2},
1174 {NIR_TYPE_FLOAT32},
1175 0
1176 };
1177 static struct nir_op nir_pack_unorm_4x8 = {
1178 "pack_unorm_4x8",
1179 NIR_OP_TYPE_ALU,
1180 1,
1181 NIR_TYPE_UINT32,
1182 1,
1183 {4},
1184 {NIR_TYPE_FLOAT32},
1185 0
1186 };
1187 static struct nir_op nir_pack_uvec2_to_uint = {
1188 "pack_uvec2_to_uint",
1189 NIR_OP_TYPE_ALU,
1190 1,
1191 NIR_TYPE_UINT32,
1192 1,
1193 {2},
1194 {NIR_TYPE_UINT32},
1195 0
1196 };
1197 static struct nir_op nir_pack_uvec4_to_uint = {
1198 "pack_uvec4_to_uint",
1199 NIR_OP_TYPE_ALU,
1200 1,
1201 NIR_TYPE_UINT32,
1202 1,
1203 {4},
1204 {NIR_TYPE_UINT32},
1205 0
1206 };
1207 static struct nir_op nir_u2f16 = {
1208 "u2f16",
1209 NIR_OP_TYPE_ALU,
1210 0,
1211 NIR_TYPE_FLOAT16,
1212 1,
1213 {0},
1214 {NIR_TYPE_UINT},
1215 0
1216 };
1217 static struct nir_op nir_u2f32 = {
1218 "u2f32",
1219 NIR_OP_TYPE_ALU,
1220 0,
1221 NIR_TYPE_FLOAT32,
1222 1,
1223 {0},
1224 {NIR_TYPE_UINT},
1225 0
1226 };
1227 static struct nir_op nir_u2f64 = {
1228 "u2f64",
1229 NIR_OP_TYPE_ALU,
1230 0,
1231 NIR_TYPE_FLOAT64,
1232 1,
1233 {0},
1234 {NIR_TYPE_UINT},
1235 0
1236 };
1237 static struct nir_op nir_u2u1 = {
1238 "u2u1",
1239 NIR_OP_TYPE_ALU,
1240 0,
1241 NIR_TYPE_UINT1,
1242 1,
1243 {0},
1244 {NIR_TYPE_UINT},
1245 0
1246 };
1247 static struct nir_op nir_u2u16 = {
1248 "u2u16",
1249 NIR_OP_TYPE_ALU,
1250 0,
1251 NIR_TYPE_UINT16,
1252 1,
1253 {0},
1254 {NIR_TYPE_UINT},
1255 0
1256 };
1257 static struct nir_op nir_u2u32 = {
1258 "u2u32",
1259 NIR_OP_TYPE_ALU,
1260 0,
1261 NIR_TYPE_UINT32,
1262 1,
1263 {0},
1264 {NIR_TYPE_UINT},
1265 0
1266 };
1267 static struct nir_op nir_u2u64 = {
1268 "u2u64",
1269 NIR_OP_TYPE_ALU,
1270 0,
1271 NIR_TYPE_UINT64,
1272 1,
1273 {0},
1274 {NIR_TYPE_UINT},
1275 0
1276 };
1277 static struct nir_op nir_u2u8 = {
1278 "u2u8",
1279 NIR_OP_TYPE_ALU,
1280 0,
1281 NIR_TYPE_UINT8,
1282 1,
1283 {0},
1284 {NIR_TYPE_UINT},
1285 0
1286 };
1287 static struct nir_op nir_ubfe = {
1288 "ubfe",
1289 NIR_OP_TYPE_ALU,
1290 0,
1291 NIR_TYPE_UINT32,
1292 3,
1293 {0,0,0},
1294 {NIR_TYPE_UINT32,NIR_TYPE_UINT32,NIR_TYPE_UINT32},
1295 0
1296 };
1297 static struct nir_op nir_ubitfield_extract = {
1298 "ubitfield_extract",
1299 NIR_OP_TYPE_ALU,
1300 0,
1301 NIR_TYPE_UINT32,
1302 3,
1303 {0,0,0},
1304 {NIR_TYPE_UINT32,NIR_TYPE_INT32,NIR_TYPE_INT32},
1305 0
1306 };
1307 static struct nir_op nir_ufind_msb = {
1308 "ufind_msb",
1309 NIR_OP_TYPE_ALU,
1310 0,
1311 NIR_TYPE_INT32,
1312 1,
1313 {0},
1314 {NIR_TYPE_UINT},
1315 0
1316 };
1317 static struct nir_op nir_uclz = {
1318 "uclz",
1319 NIR_OP_TYPE_ALU,
1320 0,
1321 NIR_TYPE_UINT32,
1322 1,
1323 {0},
1324 NIR_TYPE_UINT32,
1325 0
1326 };
1327 static struct nir_op nir_unpack_32_4x8 = {
1328 "unpack_32_4x8",
1329 NIR_OP_TYPE_ALU,
1330 4,
1331 NIR_TYPE_UINT8,
1332 1,
1333 {1},
1334 {NIR_TYPE_UINT32},
1335 0
1336 };
1337 static struct nir_op nir_unpack_32_2x16 = {
1338 "unpack_32_2x16",
1339 NIR_OP_TYPE_ALU,
1340 2,
1341 NIR_TYPE_UINT16,
1342 1,
1343 {1},
1344 {NIR_TYPE_UINT32},
1345 0
1346 };
1347 static struct nir_op nir_unpack_32_2x16_split_x = {
1348 "unpack_32_2x16_split_x",
1349 NIR_OP_TYPE_ALU,
1350 0,
1351 NIR_TYPE_UINT16,
1352 1,
1353 {0},
1354 {NIR_TYPE_UINT32},
1355 0
1356 };
1357 static struct nir_op nir_unpack_32_2x16_split_y = {
1358 "unpack_32_2x16_split_y",
1359 NIR_OP_TYPE_ALU,
1360 0,
1361 NIR_TYPE_UINT16,
1362 1,
1363 {0},
1364 {NIR_TYPE_UINT32},
1365 0
1366 };
1367 static struct nir_op nir_unpack_64_2x32 = {
1368 "unpack_64_2x32",
1369 NIR_OP_TYPE_ALU,
1370 2,
1371 NIR_TYPE_UINT32,
1372 1,
1373 {1},
1374 {NIR_TYPE_UINT64},
1375 0
1376 };
1377 static struct nir_op nir_unpack_64_2x32_split_x = {
1378 "unpack_64_2x32_split_x",
1379 NIR_OP_TYPE_ALU,
1380 0,
1381 NIR_TYPE_UINT32,
1382 1,
1383 {0},
1384 {NIR_TYPE_UINT64},
1385 0
1386 };
1387 static struct nir_op nir_unpack_64_2x32_split_y = {
1388 "unpack_64_2x32_split_y",
1389 NIR_OP_TYPE_ALU,
1390 0,
1391 NIR_TYPE_UINT32,
1392 1,
1393 {0},
1394 {NIR_TYPE_UINT64},
1395 0
1396 };
1397 static struct nir_op nir_unpack_64_4x16 = {
1398 "unpack_64_4x16",
1399 NIR_OP_TYPE_ALU,
1400 4,
1401 NIR_TYPE_UINT16,
1402 1,
1403 {1},
1404 {NIR_TYPE_UINT64},
1405 0
1406 };
1407 static struct nir_op nir_unpack_half_2x16 = {
1408 "unpack_half_2x16",
1409 NIR_OP_TYPE_ALU,
1410 2,
1411 NIR_TYPE_FLOAT32,
1412 1,
1413 {1},
1414 {NIR_TYPE_UINT32},
1415 0
1416 };
1417 static struct nir_op nir_unpack_half_2x16_flush_to_zero = {
1418 "unpack_half_2x16_flush_to_zero",
1419 NIR_OP_TYPE_ALU,
1420 2,
1421 NIR_TYPE_FLOAT32,
1422 1,
1423 {1},
1424 {NIR_TYPE_UINT32},
1425 0
1426 };
1427 static struct nir_op nir_unpack_half_2x16_split_x = {
1428 "unpack_half_2x16_split_x",
1429 NIR_OP_TYPE_ALU,
1430 0,
1431 NIR_TYPE_FLOAT32,
1432 1,
1433 {0},
1434 {NIR_TYPE_UINT32},
1435 0
1436 };
1437 static struct nir_op nir_unpack_half_2x16_split_x_flush_to_zero = {
1438 "unpack_half_2x16_split_x_flush_to_zero",
1439 NIR_OP_TYPE_ALU,
1440 0,
1441 NIR_TYPE_FLOAT32,
1442 1,
1443 {0},
1444 {NIR_TYPE_UINT32},
1445 0
1446 };
1447 static struct nir_op nir_unpack_half_2x16_split_y = {
1448 "unpack_half_2x16_split_y",
1449 NIR_OP_TYPE_ALU,
1450 0,
1451 NIR_TYPE_FLOAT32,
1452 1,
1453 {0},
1454 {NIR_TYPE_UINT32},
1455 0
1456 };
1457 static struct nir_op nir_unpack_half_2x16_split_y_flush_to_zero = {
1458 "unpack_half_2x16_split_y_flush_to_zero",
1459 NIR_OP_TYPE_ALU,
1460 0,
1461 NIR_TYPE_FLOAT32,
1462 1,
1463 {0},
1464 {NIR_TYPE_UINT32},
1465 0
1466 };
1467 static struct nir_op nir_unpack_snorm_2x16 = {
1468 "unpack_snorm_2x16",
1469 NIR_OP_TYPE_ALU,
1470 2,
1471 NIR_TYPE_FLOAT32,
1472 1,
1473 {1},
1474 {NIR_TYPE_UINT32},
1475 0
1476 };
1477 static struct nir_op nir_unpack_snorm_4x8 = {
1478 "unpack_snorm_4x8",
1479 NIR_OP_TYPE_ALU,
1480 4,
1481 NIR_TYPE_FLOAT32,
1482 1,
1483 {1},
1484 {NIR_TYPE_UINT32},
1485 0
1486 };
1487 static struct nir_op nir_unpack_unorm_2x16 = {
1488 "unpack_unorm_2x16",
1489 NIR_OP_TYPE_ALU,
1490 2,
1491 NIR_TYPE_FLOAT32,
1492 1,
1493 {1},
1494 {NIR_TYPE_UINT32},
1495 0
1496 };
1497 static struct nir_op nir_unpack_unorm_4x8 = {
1498 "unpack_unorm_4x8",
1499 NIR_OP_TYPE_ALU,
1500 4,
1501 NIR_TYPE_FLOAT32,
1502 1,
1503 {1},
1504 {NIR_TYPE_UINT32},
1505 0
1506 };
1507 static struct nir_op nir_ushr = {
1508 "ushr",
1509 NIR_OP_TYPE_ALU,
1510 0,
1511 NIR_TYPE_UINT,
1512 2,
1513 {0,0},
1514 {NIR_TYPE_UINT,NIR_TYPE_UINT32},
1515 0
1516 };
1517 static struct nir_op nir_urol = {
1518 "urol",
1519 NIR_OP_TYPE_ALU,
1520 0,
1521 NIR_TYPE_UINT,
1522 2,
1523 {0,0},
1524 {NIR_TYPE_UINT,NIR_TYPE_UINT32},
1525 0
1526 };
1527 static struct nir_op nir_uror = {
1528 "uror",
1529 NIR_OP_TYPE_ALU,
1530 0,
1531 NIR_TYPE_UINT,
1532 2,
1533 {0,0},
1534 {NIR_TYPE_UINT,NIR_TYPE_UINT32},
1535 0
1536 };
1537 static struct nir_op nir_vec3 = {
1538 "vec3",
1539 NIR_OP_TYPE_ALU,
1540 3,
1541 NIR_TYPE_UINT,
1542 3,
1543 {1,1,1},
1544 {NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT},
1545 0
1546 };
1547 static struct nir_op nir_vec4 = {
1548 "vec4",
1549 NIR_OP_TYPE_ALU,
1550 4,
1551 NIR_TYPE_UINT,
1552 4,
1553 {1,1,1,1},
1554 {NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT},
1555 0
1556 };
1557 static struct nir_op nir_vec8 = {
1558 "vec8",
1559 NIR_OP_TYPE_ALU,
1560 8,
1561 NIR_TYPE_UINT,
1562 8,
1563 {1,1,1,1,1,1,1,1},
1564 {NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT},
1565 0
1566 };
1567 static struct nir_op nir_vec16 = {
1568 "vec16",
1569 NIR_OP_TYPE_ALU,
1570 16,
1571 NIR_TYPE_UINT,
1572 16,
1573 {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1},
1574 {NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT},
1575 0
1576 };
1577 /*
1578 * ir3-specific instruction that maps directly to mul-add shift high mix,
1579 * (IMADSH_MIX16 i.e. ah * bl << 16 + c). It is used for lowering integer
1580 * multiplication (imul) on Freedreno backend..
1581 */
1582 static struct nir_op nir_imadsh_mix16 = {
1583 "imadsh_mix16",
1584 NIR_OP_TYPE_ALU,
1585 0,
1586 NIR_TYPE_INT32,
1587 3,
1588 {0,0,0},
1589 {NIR_TYPE_INT32,NIR_TYPE_INT32,NIR_TYPE_INT32},
1590 0
1591 };
1592 static struct nir_op nir_bitfield_select = {
1593 "bitfield_select",
1594 NIR_OP_TYPE_ALU,
1595 0,
1596 NIR_TYPE_UINT,
1597 3,
1598 {0,0,0},
1599 {NIR_TYPE_UINT,NIR_TYPE_UINT,NIR_TYPE_UINT},
1600 0
1601 };
1602 /******************************************************************************/
1603 /* Sum of vector components */
1604 static struct nir_op nir_fsum2 = {
1605 "fsum2",
1606 NIR_OP_TYPE_ALU,
1607 1,
1608 NIR_TYPE_FLOAT,
1609 1,
1610 {2},
1611 {NIR_TYPE_FLOAT},
1612 0
1613 };
1614 static struct nir_op nir_fsum3 = {
1615 "fsum3",
1616 NIR_OP_TYPE_ALU,
1617 1,
1618 NIR_TYPE_FLOAT,
1619 1,
1620 {3},
1621 {NIR_TYPE_FLOAT},
1622 0
1623 };
1624 static struct nir_op nir_fsum4 = {
1625 "fsum4",
1626 NIR_OP_TYPE_ALU,
1627 1,
1628 NIR_TYPE_FLOAT,
1629 1,
1630 {4},
1631 {NIR_TYPE_FLOAT},
1632 0
1633 };
1634 /* Sum of vector components */
1635 /******************************************************************************/
1636 static struct nir_op nir_fisnormal = {
1637 "fisnormal",
1638 NIR_OP_TYPE_ALU,
1639 0,
1640 NIR_TYPE_BOOL1,
1641 1,
1642 {0},
1643 {NIR_TYPE_FLOAT},
1644 0
1645 };
1646 static struct nir_op nir_fisfinite = {
1647 "fisfinite",
1648 NIR_OP_TYPE_ALU,
1649 0,
1650 NIR_TYPE_BOOL1,
1651 1,
1652 {0},
1653 {NIR_TYPE_FLOAT},
1654 0
1655 };
1656 /*----------------------------------------------------------------------------*/
1657 /* ir3-specific instruction that maps directly to ir3 mad.s24. */
1658 /* 24b multiply into 32b result (with sign extension) plus 32b int */
1659 static struct nir_op nir_imad24_ir3 = {
1660 "imad24_ir3",
1661 NIR_OP_TYPE_ALU,
1662 0,
1663 NIR_TYPE_INT32,
1664 3,
1665 {0,0,0},
1666 {NIR_TYPE_INT32,NIR_TYPE_INT32,NIR_TYPE_INT32},
1667 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
1668 };
1669 /* unsigned 24b multiply into 32b result plus 32b int */
1670 static struct nir_op nir_umad24 = {
1671 "umad24",
1672 NIR_OP_TYPE_ALU,
1673 0,
1674 NIR_TYPE_UINT32,
1675 3,
1676 {0,0,0},
1677 {NIR_TYPE_UINT32,NIR_TYPE_UINT32,NIR_TYPE_UINT32},
1678 NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE
1679 };
1680 /*----------------------------------------------------------------------------*/
1681
1682 #include "alu/generic/binop/horiz.c"
1683 #include "alu/generic/binop/binop.c"
1684 #include "alu/generic/binop/convert.c"
1685 #include "alu/generic/binop/compare_all_sizes.c"
1686 /*----------------------------------------------------------------------------*/
1687 #include "alu/generic/binop/reduce/reduce.c"
1688 #include "alu/generic/binop/reduce/all_sizes.c"
1689 /*----------------------------------------------------------------------------*/
1690 #include "alu/ir3/binop.c"
1691
1692 static struct nir_op *nir_ops[] = {
1693 &nir_b2b1,
1694 &nir_b2b8,
1695 &nir_b2b16,
1696 &nir_b2b32,
1697 &nir_b2f16,
1698 &nir_b2f32,
1699 &nir_b2f64,
1700 &nir_b2i1,
1701 &nir_b2i8,
1702 &nir_b2i16,
1703 &nir_b2i32,
1704 &nir_b2i64,
1705 &nir_b32csel,
1706 &nir_bcsel,
1707 &nir_bfi,
1708 &nir_bfm,
1709 &nir_bit_count,
1710 &nir_bitfield_insert,
1711 &nir_bitfield_reverse,
1712 &nir_bitfield_select,
1713 &nir_cube_face_coord,
1714 &nir_cube_face_index,
1715 &nir_extract_i16,
1716 &nir_extract_i8,
1717 &nir_extract_u16,
1718 &nir_extract_u8,
1719 &nir_f2b1,
1720 &nir_f2b8,
1721 &nir_f2b16,
1722 &nir_f2b32,
1723 &nir_f2f16,
1724 &nir_f2f16_rtne,
1725 &nir_f2f16_rtz,
1726 &nir_f2f32,
1727 &nir_f2f64,
1728 &nir_f2i1,
1729 &nir_f2i16,
1730 &nir_f2i32,
1731 &nir_f2i64,
1732 &nir_f2i8,
1733 &nir_f2u1,
1734 &nir_f2u16,
1735 &nir_f2u32,
1736 &nir_f2u64,
1737 &nir_f2u8,
1738 &nir_fabs,
1739 &nir_fadd,
1740 /*----------------------------------------------------------------------------*/
1741 &nir_fall_equal2,
1742 &nir_fall_equal3,
1743 &nir_fall_equal4,
1744 &nir_fall_equal8,
1745 &nir_fall_equal16,
1746 /*----------------------------------------------------------------------------*/
1747 &nir_fany_nequal2,
1748 &nir_fany_nequal3,
1749 &nir_fany_nequal4,
1750 &nir_fany_nequal8,
1751 &nir_fany_nequal16,
1752 /*----------------------------------------------------------------------------*/
1753 &nir_fceil,
1754 &nir_fcos,
1755 &nir_fcsel,
1756 &nir_fddx,
1757 &nir_fddx_coarse,
1758 &nir_fddx_fine,
1759 &nir_fddy,
1760 &nir_fddy_coarse,
1761 &nir_fddy_fine,
1762 &nir_fdiv,
1763 /*----------------------------------------------------------------------------*/
1764 &nir_fdot2,
1765 &nir_fdot3,
1766 &nir_fdot4,
1767 &nir_fdot8,
1768 &nir_fdot16,
1769 /*----------------------------------------------------------------------------*/
1770 &nir_fdot_replicated2,
1771 &nir_fdot_replicated3,
1772 &nir_fdot_replicated4,
1773 &nir_fdot_replicated8,
1774 &nir_fdot_replicated16,
1775 /*----------------------------------------------------------------------------*/
1776 &nir_fdph,
1777 &nir_fdph_replicated,
1778 &nir_fexp2,
1779 &nir_ffloor,
1780 &nir_ffma,
1781 &nir_ffract,
1782 &nir_find_lsb,
1783 &nir_flog2,
1784 &nir_flrp,
1785 /*----------------------------------------------------------------------------*/
1786 &nir_flt,
1787 &nir_flt8,
1788 &nir_flt16,
1789 &nir_flt32,
1790 /*----------------------------------------------------------------------------*/
1791 &nir_fge,
1792 &nir_fge8,
1793 &nir_fge16,
1794 &nir_fge32,
1795 /*----------------------------------------------------------------------------*/
1796 &nir_feq,
1797 &nir_feq8,
1798 &nir_feq16,
1799 &nir_feq32,
1800 /*----------------------------------------------------------------------------*/
1801 &nir_fneu,
1802 &nir_fneu8,
1803 &nir_fneu16,
1804 &nir_fneu32,
1805 /*----------------------------------------------------------------------------*/
1806 &nir_ilt,
1807 &nir_ilt8,
1808 &nir_ilt16,
1809 &nir_ilt32,
1810 /*----------------------------------------------------------------------------*/
1811 &nir_ige,
1812 &nir_ige8,
1813 &nir_ige16,
1814 &nir_ige32,
1815 /*----------------------------------------------------------------------------*/
1816 &nir_ieq,
1817 &nir_ieq8,
1818 &nir_ieq16,
1819 &nir_ieq32,
1820 /*----------------------------------------------------------------------------*/
1821 &nir_ult,
1822 &nir_ult8,
1823 &nir_ult16,
1824 &nir_ult32,
1825 /*----------------------------------------------------------------------------*/
1826 &nir_uge,
1827 &nir_uge8,
1828 &nir_uge16,
1829 &nir_uge32,
1830 /*----------------------------------------------------------------------------*/
1831 &nir_ine,
1832 &nir_ine8,
1833 &nir_ine16,
1834 &nir_ine32,
1835 &nir_fmax,
1836 &nir_fmin,
1837 &nir_fmod,
1838 &nir_fmul,
1839 &nir_fneg,
1840 &nir_fpow,
1841 &nir_fquantize2f16,
1842 &nir_frcp,
1843 &nir_frem,
1844 &nir_frexp_exp,
1845 &nir_frexp_sig,
1846 &nir_fround_even,
1847 &nir_frsq,
1848 &nir_fsat,
1849 &nir_fsign,
1850 &nir_fsin,
1851 &nir_fsqrt,
1852 &nir_fsub,
1853 &nir_fsum2,
1854 &nir_fsum3,
1855 &nir_fsum4,
1856 /*---------*/
1857 &nir_ftrunc,
1858 &nir_i2b1,
1859 &nir_i2b8,
1860 &nir_i2b16,
1861 &nir_i2b32,
1862 &nir_i2f16,
1863 &nir_i2f32,
1864 &nir_i2f64,
1865 &nir_i2i1,
1866 &nir_i2i16,
1867 &nir_i2i32,
1868 &nir_i2i64,
1869 &nir_i2i8,
1870 &nir_iabs,
1871 &nir_iadd,
1872 &nir_iadd_sat,
1873 &nir_iand,
1874 &nir_ibfe,
1875 &nir_ibitfield_extract,
1876 &nir_idiv,
1877 &nir_ifind_msb,
1878 &nir_ihadd,
1879 &nir_imadsh_mix16,
1880 &nir_imax,
1881 &nir_imin,
1882 &nir_imod,
1883 &nir_imul,
1884 &nir_imul_2x32_64,
1885 &nir_imul_high,
1886 &nir_ineg,
1887 &nir_inot,
1888 &nir_ior,
1889 &nir_irem,
1890 &nir_irhadd,
1891 &nir_ishl,
1892 &nir_ishr,
1893 &nir_isign,
1894 &nir_isub,
1895 &nir_isub_sat,
1896 &nir_ixor,
1897 &nir_ldexp,
1898 &nir_mov,
1899 &nir_pack_32_2x16,
1900 &nir_pack_32_2x16_split,
1901 &nir_pack_64_2x32,
1902 &nir_pack_64_2x32_split,
1903 &nir_pack_64_4x16,
1904 &nir_pack_half_2x16,
1905 &nir_pack_half_2x16_split,
1906 &nir_pack_snorm_2x16,
1907 &nir_pack_snorm_4x8,
1908 &nir_pack_unorm_2x16,
1909 &nir_pack_unorm_4x8,
1910 &nir_pack_uvec2_to_uint,
1911 &nir_pack_uvec4_to_uint,
1912 &nir_seq,
1913 &nir_sge,
1914 &nir_slt,
1915 &nir_sne,
1916 &nir_u2f16,
1917 &nir_u2f32,
1918 &nir_u2f64,
1919 &nir_u2u1,
1920 &nir_u2u16,
1921 &nir_u2u32,
1922 &nir_u2u64,
1923 &nir_u2u8,
1924 &nir_uadd_carry,
1925 &nir_uadd_sat,
1926 &nir_ubfe,
1927 &nir_ubitfield_extract,
1928 &nir_udiv,
1929 &nir_ufind_msb,
1930 &nir_uhadd,
1931 &nir_umax,
1932 &nir_umax_4x8,
1933 &nir_umin,
1934 &nir_umin_4x8,
1935 &nir_umod,
1936 &nir_umul_2x32_64,
1937 &nir_umul_high,
1938 &nir_umul_low,
1939 &nir_umul_unorm_4x8,
1940 &nir_unpack_32_2x16,
1941 &nir_unpack_32_2x16_split_x,
1942 &nir_unpack_32_2x16_split_y,
1943 &nir_unpack_64_2x32,
1944 &nir_unpack_64_2x32_split_x,
1945 &nir_unpack_64_2x32_split_y,
1946 &nir_unpack_64_4x16,
1947 &nir_unpack_half_2x16,
1948 &nir_unpack_half_2x16_flush_to_zero,
1949 &nir_unpack_half_2x16_split_x,
1950 &nir_unpack_half_2x16_split_x_flush_to_zero,
1951 &nir_unpack_half_2x16_split_y,
1952 &nir_unpack_half_2x16_split_y_flush_to_zero,
1953 &nir_unpack_snorm_2x16,
1954 &nir_unpack_snorm_4x8,
1955 &nir_unpack_unorm_2x16,
1956 &nir_unpack_unorm_4x8,
1957 &nir_urhadd,
1958 &nir_urol,
1959 &nir_uror,
1960 &nir_usadd_4x8,
1961 &nir_ushr,
1962 &nir_ussub_4x8,
1963 &nir_usub_borrow,
1964 &nir_usub_sat,
1965 &nir_vec2,
1966 &nir_vec3,
1967 &nir_vec4,
1968 &nir_vec8,
1969 &nir_vec16,
1970 &nir_amul,
1971 &nir_imad24_ir3,
1972 &nir_imul24,
1973 /*----------------------------------------------------------------------------*/
1974 &nir_ball_fequal2,
1975 &nir_ball_fequal3,
1976 &nir_ball_fequal4,
1977 &nir_ball_fequal8,
1978 &nir_ball_fequal16,
1979 &nir_b8all_fequal2,
1980 &nir_b8all_fequal3,
1981 &nir_b8all_fequal4,
1982 &nir_b8all_fequal8,
1983 &nir_b8all_fequal16,
1984 &nir_b16all_fequal2,
1985 &nir_b16all_fequal3,
1986 &nir_b16all_fequal4,
1987 &nir_b16all_fequal8,
1988 &nir_b16all_fequal16,
1989 &nir_b32all_fequal2,
1990 &nir_b32all_fequal3,
1991 &nir_b32all_fequal4,
1992 &nir_b32all_fequal8,
1993 &nir_b32all_fequal16,
1994 /*----------------------------------------------------------------------------*/
1995 &nir_bany_fnequal2,
1996 &nir_bany_fnequal3,
1997 &nir_bany_fnequal4,
1998 &nir_bany_fnequal8,
1999 &nir_bany_fnequal16,
2000 &nir_b8any_fnequal2,
2001 &nir_b8any_fnequal3,
2002 &nir_b8any_fnequal4,
2003 &nir_b8any_fnequal8,
2004 &nir_b8any_fnequal16,
2005 &nir_b16any_fnequal2,
2006 &nir_b16any_fnequal3,
2007 &nir_b16any_fnequal4,
2008 &nir_b16any_fnequal8,
2009 &nir_b16any_fnequal16,
2010 &nir_b32any_fnequal2,
2011 &nir_b32any_fnequal3,
2012 &nir_b32any_fnequal4,
2013 &nir_b32any_fnequal8,
2014 &nir_b32any_fnequal16,
2015 /*----------------------------------------------------------------------------*/
2016 &nir_ball_iequal2,
2017 &nir_ball_iequal3,
2018 &nir_ball_iequal4,
2019 &nir_ball_iequal8,
2020 &nir_ball_iequal16,
2021 &nir_b8all_iequal2,
2022 &nir_b8all_iequal3,
2023 &nir_b8all_iequal4,
2024 &nir_b8all_iequal8,
2025 &nir_b8all_iequal16,
2026 &nir_b16all_iequal2,
2027 &nir_b16all_iequal3,
2028 &nir_b16all_iequal4,
2029 &nir_b16all_iequal8,
2030 &nir_b16all_iequal16,
2031 &nir_b32all_iequal2,
2032 &nir_b32all_iequal3,
2033 &nir_b32all_iequal4,
2034 &nir_b32all_iequal8,
2035 &nir_b32all_iequal16,
2036 /*----------------------------------------------------------------------------*/
2037 &nir_bany_inequal2,
2038 &nir_bany_inequal3,
2039 &nir_bany_inequal4,
2040 &nir_bany_inequal8,
2041 &nir_bany_inequal16,
2042 &nir_b8any_inequal2,
2043 &nir_b8any_inequal3,
2044 &nir_b8any_inequal4,
2045 &nir_b8any_inequal8,
2046 &nir_b8any_inequal16,
2047 &nir_b16any_inequal2,
2048 &nir_b16any_inequal3,
2049 &nir_b16any_inequal4,
2050 &nir_b16any_inequal8,
2051 &nir_b16any_inequal16,
2052 &nir_b32any_inequal2,
2053 &nir_b32any_inequal3,
2054 &nir_b32any_inequal4,
2055 &nir_b32any_inequal8,
2056 &nir_b32any_inequal16,
2057 /*----------------------------------------------------------------------------*/
2058 &nir_b8csel,
2059 &nir_b16csel,
2060 &nir_uclz,
2061 &nir_uabs_isub,
2062 &nir_uabs_usub,
2063 &nir_imul_32x16,
2064 &nir_umul_32x16,
2065 &nir_f2fmp,
2066 &nir_umad24,
2067 &nir_umul24,
2068 &nir_fsat_signed,
2069 &nir_fclamp_pos,
2070 &nir_unpack_32_4x8,
2071 &nir_pack_32_4x8,
2072 &nir_i2imp,
2073 &nir_fisnormal,
2074 &nir_fisfinite,
2075 &nir_f2imp,
2076 &nir_f2ump,
2077 &nir_i2fmp,
2078 &nir_u2fmp,
2079 };
File builders/mesa-vulkan-0/contrib/generators/nir/nir_database_intrinsic.c deleted (index 26c8fd4..0000000)
1 #define NIR_INTRINSIC_SRCS_N_MAX 5
2
3 /* A constant 'base' value that is added to an offset src */
4 #define NIR_INTRINSIC_IDX_BASE 1
5 /* For store instructions, a writemask */
6 #define NIR_INTRINSIC_IDX_WRMASK 2
7 /* The stream-id for GS emit_vertex/end_primitive intrinsics */
8 #define NIR_INTRINSIC_IDX_STREAM_ID 3
9 /* The clip-plane id for load_user_clip_plane intrinsics */
10 #define NIR_INTRINSIC_IDX_UCP_ID 4
11 /*
12 * The amount of data, starting from BASE, that this instruction
13 * may access. This is used to provide bounds if the offset is
14 * not constant.
15 */
16 #define NIR_INTRINSIC_IDX_RANGE 5
17 /*
18 * The offset to the start of the NIR_INTRINSIC_RANGE. This is an alternative
19 * to NIR_INTRINSIC_BASE for describing the valid range in intrinsics that don't
20 * have the implicit addition of a base to the offset.
21 */
22 #define NIR_INTRINSIC_IDX_RANGE_BASE 6
23 /*
24 * The vulkan descriptor set binding for vulkan_resource_index
25 * intrinsic
26 */
27 #define NIR_INTRINSIC_IDX_DESC_SET 7
28 /*
29 * The vulkan descriptor set binding for vulkan_resource_index
30 * intrinsic
31 */
32 #define NIR_INTRINSIC_IDX_BINDING 8
33 /* Component offset */
34 #define NIR_INTRINSIC_IDX_COMPONENT 9
35 /* Interpolation mode (only meaningful for FS inputs) */
36 #define NIR_INTRINSIC_IDX_INTERP_MODE 10
37 /* A binary nir_op to use when performing a reduction or scan operation */
38 #define NIR_INTRINSIC_IDX_REDUCTION_OP 11
39 /* Cluster size for reduction operations */
40 #define NIR_INTRINSIC_IDX_CLUSTER_SIZE 12
41 /* Parameter index for a load_param intrinsic */
42 #define NIR_INTRINSIC_IDX_PARAM_IDX 13
43 /* Image dimensionality for image intrinsics */
44 #define NIR_INTRINSIC_IDX_IMAGE_DIM 14
45 /* Non-zero if we are accessing an array image */
46 #define NIR_INTRINSIC_IDX_IMAGE_ARRAY 15
47 /* Image format for image intrinsics */
48 #define NIR_INTRINSIC_IDX_FORMAT 16
49 /* Access qualifiers for image and memory access intrinsics */
50 #define NIR_INTRINSIC_IDX_ACCESS 17
51 #define NIR_INTRINSIC_IDX_DST_ACCESS 18
52 #define NIR_INTRINSIC_IDX_SRC_ACCESS 19
53 /* Offset or address alignment */
54 #define NIR_INTRINSIC_IDX_ALIGN_MUL 20
55 #define NIR_INTRINSIC_IDX_ALIGN_OFFSET 21
56 /* The vulkan descriptor type for vulkan_resource_index */
57 #define NIR_INTRINSIC_IDX_DESC_TYPE 22
58 /* The nir_alu_type of input data to a store or conversion */
59 #define NIR_INTRINSIC_IDX_SRC_TYPE 23
60 /* The nir_alu_type of the data output from a load or conversion */
61 #define NIR_INTRINSIC_IDX_DEST_TYPE 24
62 /* The nir_alu_type of a uniform/input/output */
63 #define NIR_INTRINSIC_IDX_TYPE 25
64 /* The swizzle mask for quad_swizzle_amd & masked_swizzle_amd */
65 #define NIR_INTRINSIC_IDX_SWIZZLE_MASK 26
66 /* Driver location of attribute */
67 #define NIR_INTRINSIC_IDX_DRIVER_LOCATION 27
68 /* ordering and visibility of a memory operation */
69 #define NIR_INTRINSIC_IDX_MEMORY_SEMANTICS 28
70 /* Modes affected by a memory operation */
71 #define NIR_INTRINSIC_IDX_MEMORY_MODES 29
72 /* Scope of a memory operation */
73 #define NIR_INTRINSIC_IDX_MEMORY_SCOPE 30
74 /* Scope of a control operation */
75 #define NIR_INTRINSIC_IDX_EXECUTION_SCOPE 31
76 #define NIR_INTRINSIC_IDX_IO_SEMANTICS 32
77 /* Rounding mode for conversions */
78 #define NIR_INTRINSIC_IDX_ROUNDING_MODE 33
79 /* Whether or not to saturate in conversions */
80 #define NIR_INTRINSIC_IDX_SATURATE 34
81 #define NIR_INTRINSIC_IDXS_N_MAX 35
82
83 static u8 *idxs_str[NIR_INTRINSIC_IDXS_N_MAX] = {
84 "UNKNOWN_IDX",
85 "nir_intrinsic_idx_base",
86 "nir_intrinsic_idx_wrmask",
87 "nir_intrinsic_idx_stream_id",
88 "nir_intrinsic_idx_ucp_id",
89 "nir_intrinsic_idx_range",
90 "nir_intrinsic_idx_range_base",
91 "nir_intrinsic_idx_desc_set",
92 "nir_intrinsic_idx_binding",
93 "nir_intrinsic_idx_component",
94 "nir_intrinsic_idx_interp_mode",
95 "nir_intrinsic_idx_reduction_op",
96 "nir_intrinsic_idx_cluster_size",
97 "nir_intrinsic_idx_param_idx",
98 "nir_intrinsic_idx_image_dim",
99 "nir_intrinsic_idx_image_array",
100 "nir_intrinsic_idx_format",
101 "nir_intrinsic_idx_access",
102 "nir_intrinsic_idx_src_access",
103 "nir_intrinsic_idx_dst_access",
104 "nir_intrinsic_idx_align_mul",
105 "nir_intrinsic_idx_align_offset",
106 "nir_intrinsic_idx_desc_type",
107 "nir_intrinsic_idx_src_type",
108 "nir_intrinsic_idx_dst_type",
109 "nir_intrinsic_idx_swizzle_mask",
110 "nir_intrinsic_idx_driver_location",
111 "nir_intrinsic_idx_memory_semantics",
112 "nir_intrinsic_idx_memory_modes",
113 "nir_intrinsic_idx_memory_scope",
114 "nir_intrinsic_idx_execution_scope"
115 "nir_intrinsic_idx_io_semantics"
116 "nir_intrinsic_idx_rounding_mode"
117 "nir_intrinsic_idx_saturate"
118 };
119
120 #define NIR_INTRINSIC_FLAGS_CAN_ELIMINATE 0x01
121 #define NIR_INTRINSIC_FLAGS_CAN_REORDER 0x02
122
123 struct nir_intrinsic {
124 char *name;
125 u8 srcs_n;
126 s8 src_components_n[NIR_INTRINSIC_SRCS_N_MAX];
127 /*
128 * dest_components_n being 0 does not mean there is no dest components.
129 * in the old code, dest_components_n defaults to -1, hence if not
130 * explicitely set to 0 or above, this bool is false
131 */
132 bool has_dest;
133 u8 dest_components_n;
134 u8 idxs_n;
135 u32 idxs_map[NIR_INTRINSIC_IDXS_N_MAX];
136 u32 bit_szs; /* only valid szs are power of 2 bit szs */
137 u8 flags;
138 bool system_value;
139 };
140
141 #include "intrinsics/generic/generic.c"
142 #include "intrinsics/generic/barycentric.c"
143 #include "intrinsics/generic/input_interp.c"
144 #include "intrinsics/generic/system_values.c"
145 #include "intrinsics/generic/load.c"
146 #include "intrinsics/generic/store.c"
147 #include "intrinsics/generic/image.c"
148 /*----------------------------------------------------------------------------*/
149 #include "intrinsics/amd/amd.c"
150 #include "intrinsics/amd/system_values.c"
151 /* wtf ? */
152 #include "intrinsics/amd/r600/r600.c"
153 #include "intrinsics/amd/r600/store.c"
154 #include "intrinsics/amd/r600/system_values.c"
155 /*----------------------------------------------------------------------------*/
156 #include "intrinsics/ir3/ir3.c"
157 #include "intrinsics/ir3/system_values.c"
158 #include "intrinsics/ir3/load.c"
159 #include "intrinsics/ir3/store.c"
160 /*----------------------------------------------------------------------------*/
161 #include "intrinsics/v3d/v3d.c"
162 /*----------------------------------------------------------------------------*/
163 #include "intrinsics/intel/intel.c"
164 #include "intrinsics/intel/image.c"
165 #include "intrinsics/intel/system_values.c"
166
167 struct nir_intrinsic *nir_intrinsics[] = {
168 &nir_atomic_counter_add,
169 &nir_atomic_counter_add_deref,
170 &nir_atomic_counter_and,
171 &nir_atomic_counter_and_deref,
172 &nir_atomic_counter_comp_swap,
173 &nir_atomic_counter_comp_swap_deref,
174 &nir_atomic_counter_exchange,
175 &nir_atomic_counter_exchange_deref,
176 &nir_atomic_counter_inc,
177 &nir_atomic_counter_inc_deref,
178 &nir_atomic_counter_max,
179 &nir_atomic_counter_max_deref,
180 &nir_atomic_counter_min,
181 &nir_atomic_counter_min_deref,
182 &nir_atomic_counter_or,
183 &nir_atomic_counter_or_deref,
184 &nir_atomic_counter_post_dec,
185 &nir_atomic_counter_post_dec_deref,
186 &nir_atomic_counter_pre_dec,
187 &nir_atomic_counter_pre_dec_deref,
188 &nir_atomic_counter_read,
189 &nir_atomic_counter_read_deref,
190 &nir_atomic_counter_xor,
191 &nir_atomic_counter_xor_deref,
192 &nir_ballot,
193 &nir_ballot_bit_count_exclusive,
194 &nir_ballot_bit_count_inclusive,
195 &nir_ballot_bit_count_reduce,
196 &nir_ballot_bitfield_extract,
197 &nir_ballot_find_lsb,
198 &nir_ballot_find_msb,
199 &nir_barrier,
200 &nir_begin_invocation_interlock,
201 &nir_copy_deref,
202 &nir_deref_atomic_add,
203 &nir_deref_atomic_and,
204 &nir_deref_atomic_comp_swap,
205 &nir_deref_atomic_exchange,
206 &nir_deref_atomic_fadd,
207 &nir_deref_atomic_fcomp_swap,
208 &nir_deref_atomic_fmax,
209 &nir_deref_atomic_fmin,
210 &nir_deref_atomic_imax,
211 &nir_deref_atomic_imin,
212 &nir_deref_atomic_or,
213 &nir_deref_atomic_umax,
214 &nir_deref_atomic_umin,
215 &nir_deref_atomic_xor,
216 &nir_discard,
217 &nir_discard_if,
218 &nir_elect,
219 &nir_emit_vertex,
220 &nir_emit_vertex_with_counter,
221 &nir_end_invocation_interlock,
222 &nir_end_primitive,
223 &nir_end_primitive_with_counter,
224 &nir_exclusive_scan,
225 &nir_first_invocation,
226 &nir_get_ssbo_size,
227 &nir_global_atomic_add,
228 &nir_global_atomic_and,
229 &nir_global_atomic_comp_swap,
230 &nir_global_atomic_exchange,
231 &nir_global_atomic_fadd,
232 &nir_global_atomic_fcomp_swap,
233 &nir_global_atomic_fmax,
234 &nir_global_atomic_fmin,
235 &nir_global_atomic_imax,
236 &nir_global_atomic_imin,
237 &nir_global_atomic_or,
238 &nir_global_atomic_umax,
239 &nir_global_atomic_umin,
240 &nir_global_atomic_xor,
241 &nir_group_memory_barrier,
242 &nir_image_atomic_add,
243 &nir_image_atomic_and,
244 &nir_image_atomic_comp_swap,
245 &nir_image_atomic_exchange,
246 &nir_image_atomic_fadd,
247 &nir_image_atomic_or,
248 &nir_image_atomic_xor,
249 &nir_image_deref_atomic_add,
250 &nir_image_deref_atomic_and,
251 &nir_image_deref_atomic_comp_swap,
252 &nir_image_deref_atomic_exchange,
253 &nir_image_deref_atomic_fadd,
254 &nir_image_deref_atomic_or,
255 &nir_image_deref_atomic_xor,
256 &nir_image_deref_load,
257 &nir_image_deref_load_param_intel,
258 &nir_image_deref_load_raw_intel,
259 &nir_image_deref_samples,
260 &nir_image_deref_size,
261 &nir_image_deref_store,
262 &nir_image_deref_store_raw_intel,
263 &nir_image_load,
264 &nir_image_load_raw_intel,
265 &nir_image_samples,
266 &nir_image_size,
267 &nir_image_store,
268 &nir_image_store_raw_intel,
269 &nir_inclusive_scan,
270 &nir_interp_deref_at_centroid,
271 &nir_interp_deref_at_offset,
272 &nir_interp_deref_at_sample,
273 &nir_interp_deref_at_vertex,
274 &nir_load_barycentric_at_offset,
275 &nir_load_barycentric_at_sample,
276 &nir_load_barycentric_centroid,
277 &nir_load_barycentric_pixel,
278 &nir_load_barycentric_sample,
279 &nir_load_barycentric_model,
280 &nir_load_base_instance,
281 &nir_load_base_vertex,
282 &nir_load_blend_const_color_a_float,
283 &nir_load_blend_const_color_aaaa8888_unorm,
284 &nir_load_blend_const_color_b_float,
285 &nir_load_blend_const_color_g_float,
286 &nir_load_blend_const_color_r_float,
287 &nir_load_blend_const_color_rgba8888_unorm,
288 &nir_load_constant,
289 &nir_load_deref,
290 &nir_load_draw_id,
291 &nir_load_first_vertex,
292 &nir_load_frag_coord,
293 &nir_load_front_face,
294 &nir_load_global,
295 &nir_load_global_invocation_id,
296 &nir_load_global_invocation_index,
297 &nir_load_helper_invocation,
298 &nir_load_input,
299 &nir_load_instance_id,
300 &nir_load_interpolated_input,
301 &nir_load_invocation_id,
302 &nir_load_is_indexed_draw,
303 &nir_load_layer_id,
304 &nir_load_local_group_size,
305 &nir_load_local_invocation_id,
306 &nir_load_local_invocation_index,
307 &nir_load_num_subgroups,
308 &nir_load_num_work_groups,
309 &nir_load_output,
310 &nir_load_param,
311 &nir_load_patch_vertices_in,
312 &nir_load_input_vertex,
313 &nir_load_per_vertex_input,
314 &nir_load_per_vertex_output,
315 &nir_load_primitive_id,
316 &nir_load_push_constant,
317 &nir_load_sample_id,
318 &nir_load_sample_id_no_per_sample,
319 &nir_load_sample_mask_in,
320 &nir_load_sample_pos,
321 &nir_load_shared,
322 &nir_load_ssbo,
323 &nir_load_subgroup_eq_mask,
324 &nir_load_subgroup_ge_mask,
325 &nir_load_subgroup_gt_mask,
326 &nir_load_subgroup_id,
327 &nir_load_subgroup_invocation,
328 &nir_load_subgroup_le_mask,
329 &nir_load_subgroup_lt_mask,
330 &nir_load_subgroup_size,
331 &nir_load_tess_coord,
332 &nir_load_tess_level_inner,
333 &nir_load_tess_level_outer,
334 &nir_load_ubo,
335 &nir_load_uniform,
336 &nir_load_user_clip_plane,
337 &nir_load_vertex_id,
338 &nir_load_vertex_id_zero_base,
339 &nir_load_view_index,
340 &nir_load_vulkan_descriptor,
341 &nir_load_work_dim,
342 &nir_load_line_coord,
343 &nir_load_line_width,
344 &nir_load_aa_line_width,
345 &nir_load_work_group_id,
346 &nir_memory_barrier,
347 &nir_memory_barrier_atomic_counter,
348 &nir_memory_barrier_buffer,
349 &nir_memory_barrier_image,
350 &nir_memory_barrier_shared,
351 &nir_nop,
352 &nir_quad_broadcast,
353 &nir_quad_swap_diagonal,
354 &nir_quad_swap_horizontal,
355 &nir_quad_swap_vertical,
356 &nir_read_first_invocation,
357 &nir_read_invocation,
358 &nir_reduce,
359 &nir_set_vertex_and_primitive_count,
360 &nir_shader_clock,
361 &nir_shared_atomic_add,
362 &nir_shared_atomic_and,
363 &nir_shared_atomic_comp_swap,
364 &nir_shared_atomic_exchange,
365 &nir_shared_atomic_fadd,
366 &nir_shared_atomic_fcomp_swap,
367 &nir_shared_atomic_fmax,
368 &nir_shared_atomic_fmin,
369 &nir_shared_atomic_imax,
370 &nir_shared_atomic_imin,
371 &nir_shared_atomic_or,
372 &nir_shared_atomic_umax,
373 &nir_shared_atomic_umin,
374 &nir_shared_atomic_xor,
375 &nir_shuffle,
376 &nir_shuffle_down,
377 &nir_shuffle_up,
378 &nir_shuffle_xor,
379 &nir_ssbo_atomic_add,
380 &nir_ssbo_atomic_and,
381 &nir_ssbo_atomic_comp_swap,
382 &nir_ssbo_atomic_exchange,
383 &nir_ssbo_atomic_fadd,
384 &nir_ssbo_atomic_fcomp_swap,
385 &nir_ssbo_atomic_fmax,
386 &nir_ssbo_atomic_fmin,
387 &nir_ssbo_atomic_imax,
388 &nir_ssbo_atomic_imin,
389 &nir_ssbo_atomic_or,
390 &nir_ssbo_atomic_umax,
391 &nir_ssbo_atomic_umin,
392 &nir_ssbo_atomic_xor,
393 &nir_store_deref,
394 &nir_store_global,
395 &nir_store_output,
396 &nir_store_per_vertex_output,
397 &nir_store_shared,
398 &nir_store_ssbo,
399 &nir_vote_all,
400 &nir_vote_any,
401 &nir_vote_feq,
402 &nir_vote_ieq,
403 &nir_vulkan_resource_index,
404 &nir_vulkan_resource_reindex,
405 &nir_deref_buffer_array_length,
406 &nir_store_ssbo_ir3,
407 &nir_load_ssbo_ir3,
408 &nir_ssbo_atomic_add_ir3,
409 &nir_ssbo_atomic_imin_ir3,
410 &nir_ssbo_atomic_umin_ir3,
411 &nir_ssbo_atomic_imax_ir3,
412 &nir_ssbo_atomic_umax_ir3,
413 &nir_ssbo_atomic_and_ir3,
414 &nir_ssbo_atomic_or_ir3,
415 &nir_ssbo_atomic_xor_ir3,
416 &nir_ssbo_atomic_exchange_ir3,
417 &nir_ssbo_atomic_comp_swap_ir3,
418 &nir_load_kernel_input,
419 &nir_bindless_image_load,
420 &nir_bindless_image_store,
421 &nir_bindless_image_atomic_add,
422 &nir_bindless_image_atomic_and,
423 &nir_bindless_image_atomic_or,
424 &nir_bindless_image_atomic_xor,
425 &nir_bindless_image_atomic_exchange,
426 &nir_bindless_image_atomic_comp_swap,
427 &nir_bindless_image_atomic_fadd,
428 &nir_bindless_image_size,
429 &nir_bindless_image_samples,
430 &nir_bindless_image_load_raw_intel,
431 &nir_bindless_image_store_raw_intel,
432 &nir_load_viewport_x_scale,
433 &nir_load_viewport_y_scale,
434 &nir_load_viewport_z_scale,
435 &nir_load_viewport_z_offset,
436 &nir_load_viewport_scale,
437 &nir_load_viewport_offset,
438 &nir_load_scratch,
439 &nir_store_scratch,
440 &nir_load_sample_pos_from_id,
441 &nir_load_size_ir3,
442 &nir_load_blend_const_color_rgb,
443 &nir_quad_swizzle_amd,
444 &nir_masked_swizzle_amd,
445 &nir_write_invocation_amd,
446 &nir_mbcnt_amd,
447 &nir_load_color0,
448 &nir_load_color1,
449 &nir_load_fs_input_interp_deltas,
450 &nir_demote,
451 &nir_is_helper_invocation,
452 &nir_store_raw_output_pan,
453 &nir_store_combined_output_pan,
454 &nir_load_raw_output_pan,
455 &nir_load_tlb_color_v3d,
456 &nir_load_point_coord,
457 &nir_store_tlb_sample_color_v3d,
458 &nir_demote_if,
459 &nir_image_deref_atomic_inc_wrap,
460 &nir_image_atomic_inc_wrap,
461 &nir_bindless_image_atomic_inc_wrap,
462 &nir_image_deref_atomic_dec_wrap,
463 &nir_image_atomic_dec_wrap,
464 &nir_bindless_image_atomic_dec_wrap,
465 &nir_load_user_data_amd,
466 &nir_load_tess_level_outer_default,
467 &nir_load_tess_level_inner_default,
468 &nir_image_deref_atomic_imin,
469 &nir_image_deref_atomic_imax,
470 &nir_image_deref_atomic_umin,
471 &nir_image_deref_atomic_umax,
472 &nir_image_atomic_imin,
473 &nir_image_atomic_imax,
474 &nir_image_atomic_umin,
475 &nir_image_atomic_umax,
476 &nir_bindless_image_atomic_imin,
477 &nir_bindless_image_atomic_imax,
478 &nir_bindless_image_atomic_umin,
479 &nir_bindless_image_atomic_umax,
480 &nir_load_vs_primitive_stride_ir3,
481 &nir_load_vs_vertex_stride_ir3,
482 &nir_load_gs_header_ir3,
483 &nir_load_primitive_location_ir3,
484 &nir_store_shared_ir3,
485 &nir_load_shared_ir3,
486 &nir_load_alpha_ref_float,
487 &nir_scoped_barrier,
488 &nir_load_hs_patch_stride_ir3,
489 &nir_load_tess_factor_base_ir3,
490 &nir_load_tess_param_base_ir3,
491 &nir_load_tcs_header_ir3,
492 &nir_cond_end_ir3,
493 &nir_end_patch_ir3,
494 &nir_load_global_ir3,
495 &nir_store_global_ir3,
496 &nir_control_barrier,
497 &nir_memory_barrier_tcs_patch,
498 &nir_store_zs_output_pan,
499 &nir_load_ssbo_address,
500 &nir_bindless_resource_ir3,
501 &nir_load_tcs_in_param_base_r600,
502 &nir_load_tcs_out_param_base_r600,
503 &nir_load_tcs_rel_patch_id_r600,
504 &nir_load_tcs_tess_factor_base_r600,
505 &nir_load_local_shared_r600,
506 &nir_store_local_shared_r600,
507 &nir_store_tf_r600,
508 &nir_load_simd_width_intel,
509 &nir_load_scratch_base_ptr,
510 &nir_load_work_group_id_zero_base,
511 &nir_load_base_work_group_id,
512 &nir_load_global_invocation_id_zero_base,
513 &nir_load_base_global_invocation_id,
514 &nir_load_ubo_vec4,
515 &nir_bindless_image_format,
516 &nir_image_deref_format,
517 &nir_image_format,
518 &nir_bindless_image_order,
519 &nir_image_deref_order,
520 &nir_image_order,
521 &nir_load_constant_base_ptr,
522 &nir_load_global_constant,
523 &nir_load_reloc_const_intel,
524 &nir_memcpy_deref,
525 &nir_convert_alu_types
526 };
File builders/mesa-vulkan-0/contrib/generators/nir/nir_intrinsics_c.c deleted (index eae67cb..0000000)
1 #include <stdbool.h>
2 #include <stdio.h>
3 #include <stdlib.h>
4 #include <stdint.h>
5 /*
6 * abbreviations
7 * alu: arithmetic logic unit
8 * conv: CONVersion
9 * e: Epilogue
10 * func: FUNCtion
11 * gen: GENerator
12 * p: Prologue
13 * rnd(s): RouNDing mode(s) (for floats)
14 * str(s): string(s)
15 */
16
17 /*
18 * the nir_intrinsic_info generator is basically an identity transformation of
19 * the "C initializers" database. we keep those database separate in case we
20 * need to enhance ours significantly beyond the original nir_intrinsic_infos
21 * mesa database.
22 */
23
24 /*
25 * we don't care about memory management
26 * we don't care about global variables
27 * we don't care about speed optimization: clarity is prime
28 * we mostly don't care about code factorisation
29 * something is not expected:
30 * - corrupted generation (very very bad!)
31 * - more likely a crash (good!)
32 */
33
34 /*----------------------------------------------------------------------------*/
35 /* do fix C */
36 #define loop for(;;)
37 #define u8 uint8_t
38 #define s8 int8_t
39 #define u32 uint32_t
40 /* #define char u8 */
41 /*----------------------------------------------------------------------------*/
42
43 #include "nir_database.c"
44
45 static char *code_p = "#include \"nir.h\"";
46
47 /* should use C stdlib functions instead of glib extensions */
48 #define OUT(fmt, ...) dprintf(1,fmt,##__VA_ARGS__)
49 #define ARRAY_N(a) sizeof(a) / sizeof(*a)
50
51 /******************************************************************************/
52 /* This is basically the old mako template */
53 static char nir_intrinsic_infos_p[] = "\n\n\
54 const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics] = {";
55 static char nir_intrinsic_info_p[] = "\n\
56 {\n\
57 .name = \"%s\"";
58 static char num_srcs[] = ",\n\
59 .num_srcs = %u";
60 static char src_components_p[] = ",\n\
61 .src_components = {\n";
62 static char src_components_e[] = "\n\
63 }";
64 static char has_dest[] = ",\n\
65 .has_dest = true";
66 static char dest_components[] = ",\n\
67 .dest_components = %u";
68 static char dest_bit_sizes[] = ",\n\
69 .dest_bit_sizes = 0x%x";
70 static char num_indices[] = ",\n\
71 .num_indices = %u";
72 static char index_map_p[] = ",\n\
73 .index_map = {\n";
74 static char index_map_e[] = "\n\
75 }";
76 static char flags[] = ",\n\
77 .flags = %s";
78 static char nir_intrinsic_info_e[] = "\n\
79 },";
80 static char nir_intrinsic_infos_e[] = "\n\
81 };";
82 /******************************************************************************/
83
84 /* hardcoded for now */
85 static char *flags_str(u8 flags)
86 {
87 if ((flags & NIR_INTRINSIC_FLAGS_CAN_ELIMINATE) != 0
88 && (flags & NIR_INTRINSIC_FLAGS_CAN_REORDER) != 0)
89 return "NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER";
90 if ((flags & NIR_INTRINSIC_FLAGS_CAN_ELIMINATE) != 0)
91 return "NIR_INTRINSIC_CAN_ELIMINATE";
92 if ((flags & NIR_INTRINSIC_FLAGS_CAN_REORDER) != 0)
93 return "NIR_INTRINSIC_CAN_REORDER";
94 }
95
96 static char *idx_str(u8 idx)
97 {
98 switch (idx) {
99 case NIR_INTRINSIC_IDX_BASE: return "NIR_INTRINSIC_BASE";
100 case NIR_INTRINSIC_IDX_WRMASK: return "NIR_INTRINSIC_WRMASK";
101 case NIR_INTRINSIC_IDX_STREAM_ID: return "NIR_INTRINSIC_STREAM_ID";
102 case NIR_INTRINSIC_IDX_UCP_ID: return "NIR_INTRINSIC_UCP_ID";
103 case NIR_INTRINSIC_IDX_RANGE: return "NIR_INTRINSIC_RANGE";
104 case NIR_INTRINSIC_IDX_RANGE_BASE: return "NIR_INTRINSIC_RANGE_BASE";
105 case NIR_INTRINSIC_IDX_DESC_SET: return "NIR_INTRINSIC_DESC_SET";
106 case NIR_INTRINSIC_IDX_BINDING: return "NIR_INTRINSIC_BINDING";
107 case NIR_INTRINSIC_IDX_COMPONENT: return "NIR_INTRINSIC_COMPONENT";
108 case NIR_INTRINSIC_IDX_INTERP_MODE: return "NIR_INTRINSIC_INTERP_MODE";
109 case NIR_INTRINSIC_IDX_REDUCTION_OP: return "NIR_INTRINSIC_REDUCTION_OP";
110 case NIR_INTRINSIC_IDX_CLUSTER_SIZE: return "NIR_INTRINSIC_CLUSTER_SIZE";
111 case NIR_INTRINSIC_IDX_PARAM_IDX: return "NIR_INTRINSIC_PARAM_IDX";
112 case NIR_INTRINSIC_IDX_IMAGE_DIM: return "NIR_INTRINSIC_IMAGE_DIM";
113 case NIR_INTRINSIC_IDX_IMAGE_ARRAY: return "NIR_INTRINSIC_IMAGE_ARRAY";
114 case NIR_INTRINSIC_IDX_FORMAT: return "NIR_INTRINSIC_FORMAT";
115 case NIR_INTRINSIC_IDX_ACCESS: return "NIR_INTRINSIC_ACCESS";
116 case NIR_INTRINSIC_IDX_SRC_ACCESS: return "NIR_INTRINSIC_SRC_ACCESS";
117 case NIR_INTRINSIC_IDX_DST_ACCESS: return "NIR_INTRINSIC_DST_ACCESS";
118 case NIR_INTRINSIC_IDX_ALIGN_MUL: return "NIR_INTRINSIC_ALIGN_MUL";
119 case NIR_INTRINSIC_IDX_ALIGN_OFFSET: return "NIR_INTRINSIC_ALIGN_OFFSET";
120 case NIR_INTRINSIC_IDX_DESC_TYPE: return "NIR_INTRINSIC_DESC_TYPE";
121 case NIR_INTRINSIC_IDX_SRC_TYPE: return "NIR_INTRINSIC_SRC_TYPE";
122 case NIR_INTRINSIC_IDX_DEST_TYPE: return "NIR_INTRINSIC_DEST_TYPE";
123 case NIR_INTRINSIC_IDX_SWIZZLE_MASK: return "NIR_INTRINSIC_SWIZZLE_MASK";
124 case NIR_INTRINSIC_IDX_DRIVER_LOCATION: return "NIR_INTRINSIC_DRIVER_LOCATION";
125 case NIR_INTRINSIC_IDX_MEMORY_SEMANTICS:return "NIR_INTRINSIC_MEMORY_SEMANTICS";
126 case NIR_INTRINSIC_IDX_MEMORY_MODES: return "NIR_INTRINSIC_MEMORY_MODES";
127 case NIR_INTRINSIC_IDX_MEMORY_SCOPE: return "NIR_INTRINSIC_MEMORY_SCOPE";
128 case NIR_INTRINSIC_IDX_EXECUTION_SCOPE: return "NIR_INTRINSIC_EXECUTION_SCOPE";
129 case NIR_INTRINSIC_IDX_IO_SEMANTICS: return "NIR_INTRINSIC_IO_SEMANTICS";
130 case NIR_INTRINSIC_IDX_ROUNDING_MODE: return "NIR_INTRINSIC_ROUNDING_MODE";
131 case NIR_INTRINSIC_IDX_SATURATE: return "NIR_INTRINSIC_SATURATE";
132 }
133 }
134
135 static void nir_intrinsic_info_gen(struct nir_intrinsic *intrinsic)
136 {
137 OUT(nir_intrinsic_info_p, intrinsic->name);
138
139 if (intrinsic->srcs_n != 0) {
140 u8 i;
141
142 OUT(num_srcs, intrinsic->srcs_n);
143
144 /*------------------------------------------------------------*/
145 OUT(src_components_p);
146 i = 0;
147 loop {
148 if (i == intrinsic->srcs_n)
149 break;
150 if (i == 0)
151 OUT("\t\t\t%d", intrinsic->src_components_n[i]);
152 else
153 OUT(",%d", intrinsic->src_components_n[i]);
154 ++i;
155 }
156 OUT(src_components_e);
157 /*------------------------------------------------------------*/
158 }
159
160 if (intrinsic->has_dest)
161 OUT(has_dest);
162
163 if (intrinsic->dest_components_n != 0)
164 OUT(dest_components, intrinsic->dest_components_n);
165
166 if (intrinsic->bit_szs != 0)
167 OUT(dest_bit_sizes, intrinsic->bit_szs);
168
169 if (intrinsic->idxs_n != 0) {
170 u8 i;
171 u8 j;
172
173 OUT(num_indices, intrinsic->idxs_n);
174
175 /*------------------------------------------------------------*/
176 OUT(index_map_p);
177 i = 1;
178 j = 1;
179 loop {
180 if (i == (intrinsic->idxs_n + 1))
181 break;
182
183 if (intrinsic->idxs_map[j] != 0) {
184 if (i == 1)
185 OUT("\t\t\t[%s] = %u", idx_str(j), i);
186 else
187 OUT(",\n\t\t\t[%s] = %u", idx_str(j),i);
188 ++i;
189 }
190
191 ++j;
192 }
193 OUT(index_map_e);
194 /*------------------------------------------------------------*/
195 }
196
197 if (intrinsic->flags != 0)
198 OUT(flags, flags_str(intrinsic->flags));
199
200 OUT(nir_intrinsic_info_e);
201 }
202
203 static void nir_intrinsic_infos_gen(void)
204 {
205 u32 intrinsic_idx;
206 u32 intrinsics_n = ARRAY_N(nir_intrinsics);
207
208 OUT(nir_intrinsic_infos_p);
209 intrinsic_idx = 0;
210 loop {
211 if (intrinsic_idx == intrinsics_n)
212 break;
213 nir_intrinsic_info_gen(nir_intrinsics[intrinsic_idx]);
214 ++intrinsic_idx;
215
216 }
217 OUT(nir_intrinsic_infos_e);
218 }
219
220 int main(void)
221 {
222 OUT(code_p);
223 nir_intrinsic_infos_gen();
224 exit(0);
225 }
File builders/mesa-vulkan-0/contrib/generators/nir/nir_intrinsics_h.c deleted (index 84c6118..0000000)
1 #include <stdio.h>
2 #include <stdlib.h>
3 #include <stdint.h>
4 #include <stdbool.h>
5
6 /*
7 * we don't care about memory management
8 * we don't care about global variables
9 * we don't care about speed optimization: clarity is prime
10 * we mostly don't care about code factorisation
11 * something is not expected:
12 * - corrupted generation (very very bad!)
13 * - more likely a crash (good!)
14 */
15
16 /*----------------------------------------------------------------------------*/
17 /* do fix C */
18 #define loop for(;;)
19 #define u8 uint8_t
20 #define s8 int8_t
21 #define u32 uint32_t
22 /* #define char u8 */
23 /*----------------------------------------------------------------------------*/
24
25 #include "nir_database.c"
26
27 static char *code_prologue = "\
28 #ifndef _NIR_INTRINSICS_\n\
29 #define _NIR_INTRINSICS_\n\
30 typedef enum {";
31
32 static char *code_epilogue = "\
33 \n} nir_intrinsic_op;\n\
34 #endif /* _NIR_INTRINSICS_ */";
35
36 /* should use C stdlib functions instead of glib extensions */
37 #define OUT(fmt, ...) dprintf(1,fmt,##__VA_ARGS__)
38 #define ARRAY_N(a) sizeof(a) / sizeof(*a)
39
40 static void enum_gen(void)
41 {
42 u32 intrinsic_idx = 0;
43 u32 intrinsics_n = ARRAY_N(nir_intrinsics);
44
45 loop {
46 if (intrinsic_idx == intrinsics_n)
47 break;
48
49 OUT("\nnir_intrinsic_%s,",
50 nir_intrinsics[intrinsic_idx]->name);
51 ++intrinsic_idx;
52 }
53
54 #define nir_intrinsics_last \
55 nir_intrinsics[intrinsics_n - 1]
56 OUT("\nnir_last_intrinsic = nir_intrinsic_%s,",
57 nir_intrinsics_last->name);
58 OUT("\nnir_num_intrinsics = nir_last_intrinsic + 1");
59 }
60
61 int main(void)
62 {
63 OUT(code_prologue);
64 enum_gen();
65 OUT(code_epilogue);
66 exit(0);
67 }
File builders/mesa-vulkan-0/contrib/generators/nir/nir_opcodes_c.c deleted (index 4a0a892..0000000)
1 #include <stdbool.h>
2 #include <stdio.h>
3 #include <stdlib.h>
4 #include <stdint.h>
5 /*
6 * abbreviations
7 * alu: arithmetic logic unit
8 * conv: CONVersion
9 * e: Epilogue
10 * func: FUNCtion
11 * gen: GENerator
12 * p: Prologue
13 * rnd(s): RouNDing mode(s) (for floats)
14 * str(s): string(s)
15 */
16
17 /*
18 * XXX: to have a code gen for the alu conv matrix is "more" plain wrong than
19 * most of the mesa generators. That said, we lower it to simple C anyway.
20 *
21 * the nir_op_info generator is basically an identity transformation of
22 * the "C initializers" database. we keep those database separate in case we
23 * need to enhance ours beyond the original nir_op_infos mesa database.
24 *
25 * in other words, those generators should not exist in the first place.
26 */
27
28 /*
29 * we don't care about memory management
30 * we don't care about global variables
31 * we don't care about speed optimization: clarity is prime
32 * we mostly don't care about code factorisation
33 * something is not expected:
34 * - corrupted generation (very very bad!)
35 * - more likely a crash (good!)
36 */
37
38 /*----------------------------------------------------------------------------*/
39 /* do fix C */
40 #define loop for(;;)
41 #define u8 uint8_t
42 #define s8 int8_t
43 #define u32 uint32_t
44 /* #define char u8 */
45 /*----------------------------------------------------------------------------*/
46
47 #include "nir_database.c"
48
49 static char *code_p = "#include \"nir.h\"";
50
51 /* should use C stdlib functions instead of glib extensions */
52 #define OUT(fmt, ...) dprintf(1,fmt,##__VA_ARGS__)
53 #define ERR(fmt, ...) dprintf(2,fmt,##__VA_ARGS__)
54 #define ARRAY_N(a) sizeof(a) / sizeof(*a)
55
56 /* order matter */
57 #define INT 0
58 #define UINT 1
59 #define FLOAT 2
60 #define BOOL 3
61 #define ALU_TYPES_N 4
62
63 static char *alu_types_strs[] = {
64 "int",
65 "uint",
66 "float",
67 "bool"
68 };
69
70 static u8 type_bits_n_n[ALU_TYPES_N] = {
71 5, /* int */
72 5, /* uint */
73 3, /* float */
74 4, /* bool */
75 };
76 #define TYPE_BITS_N_N_MAX 5
77
78 /* actually a 3 dimensions array of function pointers... */
79 static u8 type_bits_n[ALU_TYPES_N][TYPE_BITS_N_N_MAX] = {
80 { 1, 8, 16, 32 , 64}, /* int */
81 { 1, 8, 16, 32 , 64}, /* uint */
82 { 16, 32 , 64}, /* float */
83 { 1, 8, 16, 32}, /* bool */
84 };
85
86 static char *rnds_strs[3][2] = {
87 {"rtne", "_rtne"},
88 {"rtz", "_rtz"},
89 {"undef", ""}
90 };
91 #define RND_N_MAX 3
92
93 /******************************************************************************/
94 /* what follows is basically the old "mako" template */
95 static char alu_conv_matrix_p[] = "\n\
96 nir_op\n\
97 nir_type_conversion_op(nir_alu_type src, nir_alu_type dst, nir_rounding_mode rnd)\n\
98 {\n\
99 nir_alu_type src_base = (nir_alu_type) nir_alu_type_get_base_type(src);\n\
100 nir_alu_type dst_base = (nir_alu_type) nir_alu_type_get_base_type(dst);\n\
101 unsigned src_bit_size = nir_alu_type_get_type_size(src);\n\
102 unsigned dst_bit_size = nir_alu_type_get_type_size(dst);\n\
103 \n\
104 if (src == dst && src_base == nir_type_float) {\n\
105 return nir_op_mov;\n\
106 } else if (src == dst && src_base == nir_type_bool) {\n\
107 return nir_op_mov;\n\
108 } else if ((src_base == nir_type_int || src_base == nir_type_uint) &&\n\
109 (dst_base == nir_type_int || dst_base == nir_type_uint) &&\n\
110 src_bit_size == dst_bit_size) {\n\
111 /*\n\
112 * Integer <-> integer conversions with the same bit-size on both\n\
113 * ends are just no-op moves.\n\
114 */\n\
115 return nir_op_mov;\n\
116 }";
117 static char src_types_p[] = "\n\
118 switch (src_base) {";
119 static char src_type_p[] = "\n\
120 case nir_type_%s:";
121 static char dst_types_p[] = "\n\
122 switch(dst_base) {";
123 static char dst_type_p[] = "\n\
124 case nir_type_%s:";
125 static char dst_type_bits_n_n_p[] = "\n\
126 switch(dst_bit_size) {";
127 static char dst_type_bits_n_p[] = "\n\
128 case %u:";
129 static char rnds_p[] = "\n\
130 switch(rnd) {";
131 static char rnds_e[] = "\n\
132 default:\n\
133 unreachable(\"Invalid 16-bit nir rounding mode\");\n\
134 }";
135 static char dst_type_bits_n_e[] = "";
136 static char dst_type_bits_n_n_e[] = "\n\
137 default:\n\
138 unreachable(\"Invalid nir alu bit size\");\n\
139 }";
140 static char dst_type_e[] = ""; /* empty */
141 static char dst_types_e[] = "\n\
142 default:\n\
143 unreachable(\"Invalid nir alu dst base type\");\n\
144 }";
145 static char src_type_e[] = "";/* empty */
146 static char src_types_e[] = "\n\
147 default:\n\
148 unreachable(\"Invalid nir alu src base type\");\n\
149 }";
150 static char alu_conv_matrix_e[] = "\n\
151 }";
152
153 static void rnd_gen(u8 src_type, u8 dst_type, u8 bits_n, u8 rnd)
154 {
155 OUT("\n\
156 case nir_rounding_mode_%s:\n\
157 return nir_op_%c2%c%u%s;",
158 rnds_strs[rnd][0],
159 alu_types_strs[src_type][0],
160 alu_types_strs[dst_type][0],
161 bits_n,
162 rnds_strs[rnd][1]);
163
164 }
165
166 static void dst_type_bits_n_gen(u8 src_type, u8 dst_type, u8 bits_n)
167 {
168 OUT(dst_type_bits_n_p, bits_n);
169 if (src_type == FLOAT && dst_type == FLOAT && bits_n == 16) {
170 u8 rnd;
171
172 OUT(rnds_p);
173
174 rnd = 0;
175 loop {
176 if (rnd == RND_N_MAX)
177 break;
178 rnd_gen(src_type, dst_type, bits_n, rnd);
179 ++rnd;
180 }
181
182 OUT(rnds_e);
183 } else {
184 OUT("\n\
185 assert(rnd == nir_rounding_mode_undef);\n\
186 return nir_op_%c2%c%u;",
187 alu_types_strs[src_type][0],
188 alu_types_strs[dst_type][0],
189 bits_n);
190 }
191 OUT(dst_type_bits_n_e);
192 }
193
194 static void dst_type_bits_n_n_gen(u8 src_type, u8 dst_type)
195 {
196 u8 bits_n_idx;
197
198 OUT(dst_type_bits_n_n_p);
199
200 bits_n_idx = 0;
201 loop {
202 if (bits_n_idx == type_bits_n_n[dst_type])
203 break;
204
205 dst_type_bits_n_gen(src_type, dst_type,
206 type_bits_n[dst_type][bits_n_idx]);
207 ++bits_n_idx;
208 }
209 OUT(dst_type_bits_n_n_e);
210 }
211
212 static void dst_type_gen(u8 src_type, u8 dst_type)
213 {
214
215 OUT(dst_type_p, alu_types_strs[dst_type]);
216
217 if ((src_type == INT || src_type == UINT)
218 && (dst_type == INT || dst_type == UINT)) {
219 if (dst_type == INT)
220 return;
221 dst_type = src_type; /* force the dst type */
222 } else if (src_type == BOOL && (dst_type == INT || dst_type == UINT
223 || dst_type == BOOL)) {
224 if (dst_type == INT)
225 return;
226 dst_type = INT; /* force modifi the dst type */
227 } else if (src_type == UINT && dst_type == BOOL) {
228 src_type = INT; /* force the src type */
229 }
230
231 dst_type_bits_n_n_gen(src_type, dst_type);
232
233 OUT(dst_type_e, alu_types_strs[dst_type]);
234 }
235
236 static void src_type_gen(u8 src_type)
237 {
238 u8 dst_type;
239
240 OUT(src_type_p, alu_types_strs[src_type]);
241
242 OUT(dst_types_p);
243 dst_type = 0;
244 loop {
245 if (dst_type == ALU_TYPES_N)
246 break;
247 dst_type_gen(src_type, dst_type);
248 ++dst_type;
249 }
250 OUT(dst_types_e);
251
252 OUT(src_type_e);
253 }
254
255 /* the major dimension of the conv matrix is the src type */
256 static void alu_conv_matrix_src_alu_types_gen(void)
257 {
258 u8 src_type;
259
260 OUT(alu_conv_matrix_p);
261
262 OUT(src_types_p);
263 src_type = 0;
264 loop {
265 if (src_type == ALU_TYPES_N)
266 break;
267 src_type_gen(src_type);
268 ++src_type;
269 }
270 OUT(src_types_e);
271
272 OUT(alu_conv_matrix_e);
273 }
274
275 static void alu_conv_matrix_gen(void)
276 {
277 /* of course, the src type is the major dimension of the conv matrix */
278 alu_conv_matrix_src_alu_types_gen();
279 }
280 /******************************************************************************/
281
282
283 /******************************************************************************/
284 /* Same thing than above */
285 static char nir_op_infos_p[] = "\n\n\
286 const nir_op_info nir_op_infos[nir_num_opcodes] = {";
287 static char nir_op_info_p[] = "\n\
288 {\n\
289 .name = \"%s\",\n\
290 .num_inputs = %u,\n\
291 .output_size = %u,\n\
292 .output_type = %s";
293 static char input_sizes_p[] = ",\n\
294 .input_sizes = {\n\t\t";
295 static char input_sizes_e[] = "\n\
296 }";
297 static char input_types_p[] = ",\n\
298 .input_types = {\n\t\t";
299 static char input_types_e[] = "\n\
300 }";
301 static char nir_op_info_e[] = ",\n\
302 .algebraic_properties =\n\
303 %s\n\
304 },";
305 static char nir_op_infos_e[] = "\n\
306 };";
307
308 /* don't use cpp extensions */
309 static char *nir_type_str(u8 nir_type)
310 {
311 switch (nir_type) {
312 case NIR_TYPE_BOOL: return "nir_type_bool";
313 case NIR_TYPE_BOOL1: return "nir_type_bool1";
314 case NIR_TYPE_BOOL8: return "nir_type_bool8";
315 case NIR_TYPE_BOOL16: return "nir_type_bool16";
316 case NIR_TYPE_BOOL32: return "nir_type_bool32";
317 case NIR_TYPE_INT: return "nir_type_int";
318 case NIR_TYPE_INT1: return "nir_type_int1";
319 case NIR_TYPE_INT8: return "nir_type_int8";
320 case NIR_TYPE_INT16: return "nir_type_int16";
321 case NIR_TYPE_INT32: return "nir_type_int32";
322 case NIR_TYPE_INT64: return "nir_type_int64";
323 case NIR_TYPE_UINT: return "nir_type_uint";
324 case NIR_TYPE_UINT1: return "nir_type_uint1";
325 case NIR_TYPE_UINT8: return "nir_type_uint8";
326 case NIR_TYPE_UINT16: return "nir_type_uint16";
327 case NIR_TYPE_UINT32: return "nir_type_uint32";
328 case NIR_TYPE_UINT64: return "nir_type_uint64";
329 case NIR_TYPE_FLOAT: return "nir_type_float";
330 case NIR_TYPE_FLOAT16: return "nir_type_float16";
331 case NIR_TYPE_FLOAT32: return "nir_type_float32";
332 case NIR_TYPE_FLOAT64: return "nir_type_float64";
333 }
334 ERR("unknown nir type\n");
335 exit(1);
336 }
337
338 /* hardcoded for now */
339 static char *aglebraic_properties_str(u8 props)
340 {
341 if ((props & NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE) != 0
342 && (props & NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE) != 0)
343 return "NIR_OP_IS_2SRC_COMMUTATIVE | NIR_OP_IS_ASSOCIATIVE";
344 if ((props & NIR_OP_ALGEBRAIC_PROPERTIES_2SRC_COMMUTATIVE) != 0)
345 return "NIR_OP_IS_2SRC_COMMUTATIVE";
346 if ((props & NIR_OP_ALGEBRAIC_PROPERTIES_ASSOCIATIVE) != 0)
347 return "NIR_OP_IS_ASSOCIATIVE";
348 return "0";
349 }
350
351 static void nir_op_info_gen(u32 op_idx)
352 {
353 u8 i;
354
355 struct nir_op *op = nir_ops[op_idx];
356
357 OUT(nir_op_info_p, op->name, op->inputs_n, op->output_sz,
358 nir_type_str(op->output_type));
359 /*--------------------------------------------------------------------*/
360 OUT(input_sizes_p);
361 i = 0;
362 loop {
363 if (i == op->inputs_n)
364 break;
365 if (i == 0)
366 OUT("%u", op->inputs_szs[i]);
367 else
368 OUT(", %u", op->inputs_szs[i]);
369 ++i;
370 }
371 OUT(input_sizes_e);
372 /*--------------------------------------------------------------------*/
373
374 /*--------------------------------------------------------------------*/
375 OUT(input_types_p);
376 i = 0;
377 loop {
378 if (i == op->inputs_n)
379 break;
380 if (i == 0)
381 OUT("%s", nir_type_str(op->inputs_types[i]));
382 else
383 OUT(", %s", nir_type_str(op->inputs_types[i]));
384 ++i;
385 }
386 OUT(input_types_e);
387 /*--------------------------------------------------------------------*/
388
389 OUT(nir_op_info_e, aglebraic_properties_str(op->algebraic_properties));
390 }
391
392 static void nir_op_infos_gen(void)
393 {
394 u32 op_idx;
395 u32 ops_n = ARRAY_N(nir_ops);
396
397 OUT(nir_op_infos_p);
398 op_idx = 0;
399 loop {
400 if (op_idx == ops_n)
401 break;
402 nir_op_info_gen(op_idx);
403 ++op_idx;
404
405 }
406 OUT(nir_op_infos_e);
407 }
408 /******************************************************************************/
409 int main(void)
410 {
411 OUT(code_p);
412 alu_conv_matrix_gen();
413 nir_op_infos_gen();
414 exit(0);
415 }
File builders/mesa-vulkan-0/contrib/generators/nir/nir_opcodes_h.c deleted (index 04bded0..0000000)
1 #include <stdio.h>
2 #include <stdlib.h>
3 #include <stdint.h>
4 #include <stdbool.h>
5
6 /*
7 * we don't care about memory management
8 * we don't care about global variables
9 * we don't care about speed optimization: clarity is prime
10 * we mostly don't care about code factorisation
11 * something is not expected:
12 * - corrupted generation (very very bad!)
13 * - more likely a crash (good!)
14 */
15
16 /*----------------------------------------------------------------------------*/
17 /* do fix C */
18 #define loop for(;;)
19 #define u8 uint8_t
20 #define s8 int8_t
21 #define u32 uint32_t
22 /* #define char u8 */
23 /*----------------------------------------------------------------------------*/
24
25 #include "nir_database.c"
26
27 static char *code_prologue = "\
28 #ifndef _NIR_OPCODES_\n\
29 #define _NIR_OPCODES_\n\
30 typedef enum {";
31
32 static char *code_epilogue = "\
33 \n} nir_op;\n\
34 #endif /* _NIR_OPCODES_ */";
35
36 /* should use C stdlib functions instead of glib extensions */
37 #define OUT(fmt, ...) dprintf(1,fmt,##__VA_ARGS__)
38 #define ARRAY_N(a) sizeof(a) / sizeof(*a)
39
40 static void enum_gen(void)
41 {
42 u32 nir_op = 0;
43 u32 nir_ops_n = ARRAY_N(nir_ops);
44
45 loop {
46 if (nir_op == nir_ops_n)
47 break;
48 OUT("\nnir_op_%s,", nir_ops[nir_op]->name);
49 ++nir_op;
50 }
51
52 #define nir_ops_last nir_ops[nir_ops_n - 1]
53 OUT("\nnir_last_opcode = nir_op_%s,", nir_ops_last->name);
54 OUT("\nnir_num_opcodes = nir_last_opcode + 1");
55 }
56
57 int main(void)
58 {
59 OUT(code_prologue);
60 enum_gen();
61 OUT(code_epilogue);
62 exit(0);
63 }
File builders/mesa-vulkan-0/contrib/generators/sid_tables/field.c deleted (index 5448317..0000000)
1 /*
2 * field function-like macros definitions start with:
3 * 1 - "S_": set function-like macro (the function-like macro we will use for
4 * the field mask)
5 * 2 - "G_": get function-like macro
6 * 3 - "C_": clear (direct register mask)
7 *
8 * Only 1 is needed, if more than 1 is defined they occur in the order from
9 * above.
10 *
11 * we update the parser state for any of those function-like macros is found
12 */
13 static bool macro_name_is_register_field_related(void)
14 {
15 if ( (macro_name_s[0] == 'S' && macro_name_s[1] == '_')
16 || (macro_name_s[0] == 'G' && macro_name_s[1] == '_')
17 || (macro_name_s[0] == 'C' && macro_name_s[1] == '_'))
18 return true;
19 return false;
20 }
21
22 #define macro_is_set_accessor macro_name_is_set_function_like
23 static bool macro_name_is_set_function_like(void)
24 {
25 return macro_name_s[0] == 'S';
26 }
27
28 /*
29 * the "macro function-like name" is the "macro name" minus the
30 * parameters list
31 */
32 static void si_register_fields_append(void)
33 {
34 struct si_register_field *new;
35 struct si_register *reg;
36 char *field_name_s;
37
38 si_register_fields = realloc(si_register_fields,
39 sizeof(*si_register_fields) * (si_register_fields_n + 1));
40 new = &si_register_fields[si_register_fields_n];
41
42 /* no values yet */
43 new->sid_strings_offsets_n = 0;
44 new->sid_strings_offsets_so = 0;
45
46 /*
47 * since the macro definitions are in order (register->field->value)
48 * the current register is the last one
49 */
50 reg = si_registers_last_get();
51 if (reg->fields_n == 0) {
52 new->first_field = true;
53 reg->si_register_fields_so = si_register_fields_n;
54 } else
55 new->first_field = false;
56 ++reg->fields_n;
57
58 /*
59 * skip the field set accessor plus register offset prefix "S_" and
60 * register offset "HEXNUM_", and don't copy the parameter list
61 */
62 field_name_s = field_name_s_get();
63 sid_strings_append(field_name_s, macro_parameters_s);
64 new->sid_strings_offset = sid_strings_last_offset_get();
65
66 new->hdr_macro_name_s = macro_name_s;
67 new->hdr_parameters_s = macro_parameters_s;
68
69 ++si_register_fields_n;
70 }
71
72 static void register_field_macro_consume(void)
73 {
74 /* we do generate a new field only for a set function-like macro */
75 if (macro_is_set_accessor())
76 si_register_fields_append();
77 }
File builders/mesa-vulkan-0/contrib/generators/sid_tables/generator.c deleted (index 685b911..0000000)
1 static const char *struct_types="\
2 struct si_field {\n\
3 unsigned name_offset;\n\
4 unsigned mask;\n\
5 unsigned num_values;\n\
6 unsigned values_offset; /* offset into sid_strings_offsets */\n\
7 };\n\
8 \n\
9 struct si_reg {\n\
10 unsigned name_offset;\n\
11 unsigned offset;\n\
12 unsigned num_fields;\n\
13 unsigned fields_offset;\n\
14 };\n\
15 \n\
16 struct si_packet3 {\n\
17 unsigned name_offset;\n\
18 unsigned op;\n\
19 };\
20 ";
21
22 static void sid_strings_gen(void)
23 {
24 u32 i;
25
26 static char string_prefix[] = {'\n','"'};
27 static char string_suffix[] = {'\\','0','"',' '};
28
29 OUT("\n\nstatic const char sid_strings[] =");
30
31 i = 0;
32 loop {
33 struct sid_string *sid_string;
34
35 if (i == sid_strings_n)
36 break;
37
38 sid_string = &sid_strings[i];
39
40 OUTW(&string_prefix[0], sizeof(string_prefix));
41 OUTW(sid_string->hdr_string_s, sid_string->hdr_string_e
42 - sid_string->hdr_string_s);
43 OUTW(&string_suffix[0], sizeof(string_suffix));
44
45 OUT("/* %d */", sid_strings[i].offset);
46 ++i;
47 };
48 OUT(";");
49 }
50
51 static void si_packet3s_gen(void)
52 {
53 u32 i;
54
55 OUT("\n\nstatic const struct si_packet3 packet3_table[] = {");
56
57 i = 0;
58 loop {
59 struct si_packet3 *pkt;
60 u64 macro_name_len;
61
62 if (i == si_packet3s_n)
63 break;
64
65 pkt = &si_packet3s[i];
66 macro_name_len = pkt->hdr_macro_name_e - pkt->hdr_macro_name_s;
67
68 OUT("\n{%d,", pkt->sid_strings_offset);
69 OUTW(pkt->hdr_macro_name_s, macro_name_len);
70 OUT("},");
71 ++i;
72 };
73 OUT("\n};");
74 }
75
76 #define SID_H_SI_REG_TABLE_GEN_HDR "static const struct si_reg sid_reg_table[] = {"
77 #define GFX9D_H_SI_REG_TABLE_GEN_HDR "static const struct si_reg gfx9d_reg_table[] = {"
78 static void si_reg_table_gen(const char *hdr)
79 {
80 u32 i;
81
82 OUT("\n\n%s", hdr);
83
84 i = 0;
85 loop {
86 struct si_register *reg;
87 size_t offset_name_len;
88
89 if (i == (*si_registers_n))
90 break;
91
92 reg = &(*si_registers)[i];
93 offset_name_len = reg->hdr_offset_name_e
94 - reg->hdr_offset_name_s;
95
96 OUT("\n{%d, ", reg->sid_strings_offset);
97 OUTW(reg->hdr_offset_name_s, offset_name_len);
98 if (reg->fields_n != 0) {
99 OUT(", %u, %u},", reg->fields_n,
100 reg->sid_fields_table_so);
101 } else
102 OUT("},");
103 ++i;
104 };
105 OUT("\n};");
106 }
107
108 static void sid_fields_table_gen(void)
109 {
110 u32 i;
111
112 OUT("\n\nstatic const struct si_field sid_fields_table[] = {");
113
114 i = 0;
115 loop {
116 struct si_register_field *field;
117 /*
118 * basically the macro name without the parameters list...
119 * namely like a function
120 */
121 u64 macro_function_like_name_len;
122
123 if (i == si_register_fields_n)
124 break;
125
126 field = &si_register_fields[i];
127 macro_function_like_name_len = field->hdr_parameters_s
128 - field->hdr_macro_name_s;
129
130 if (field->first_field)
131 OUT("\n/* %d */", i);
132
133 if (field->sid_strings_offsets_n != 0) {
134 OUT("\n{%d, ", field->sid_strings_offset);
135 OUTW(field->hdr_macro_name_s,
136 macro_function_like_name_len);
137 OUT("(~0u), %d, %d},", field->sid_strings_offsets_n,
138 field->sid_strings_offsets_so);
139 } else {
140 OUT("\n{%d, ", field->sid_strings_offset);
141 OUTW(field->hdr_macro_name_s,
142 macro_function_like_name_len);
143 OUT("(~0u)},");
144 }
145 ++i;
146 };
147 OUT("\n};");
148 }
149
150 static void sid_strings_offsets_gen(void)
151 {
152 u32 i;
153
154 OUT("\n\nstatic const int sid_strings_offsets[] = {");
155
156 i = 0;
157 loop {
158 struct sid_strings_offsets_segment *segment;
159 u32 j;
160
161 if (i == sid_strings_offsets_segments_n)
162 break;
163
164 segment = &sid_strings_offsets_segments[i];
165
166 OUT("\n/* %d */ ", segment->so);
167
168 j = 0;
169 loop {
170 if (j == segment->offsets_n)
171 break;
172 OUT("%d,", segment->offsets[j]);
173 ++j;
174 };
175
176 ++i;
177 };
178 OUT("\n};");
179 }
File builders/mesa-vulkan-0/contrib/generators/sid_tables/hdr_parser.c deleted (index c30140f..0000000)
1 /*----------------------------------------------------------------------------*/
2 /* parser states */
3 static void *directive_locate(void);
4 static void *directive_name(void);
5 static void *macro_name_locate_s(void);
6 static void *macro_name_parse(void);
7 static void *macro_value_locate_s(void);
8 /*----------------------------------------------------------------------------*/
9
10 static void *macro_value_locate_s(void)
11 {
12 void *(*parser_state)(void);
13
14 if (*hdr_pos == '\n')
15 return directive_locate; /* no more chars in directive line */
16
17 if (*hdr_pos != ' ' && *hdr_pos != '\t') {
18 macro_value_s = hdr_pos;
19 /* got a value, we are finished, locate the next directive */
20 macro_found = true;
21 parser_state = directive_locate;
22 goto exit;
23 }
24 parser_state = macro_value_locate_s;
25 exit:
26 ++hdr_pos;
27 return parser_state;
28 }
29
30 static void *macro_name_parse(void)
31 {
32 if (*hdr_pos == '\n')
33 return directive_locate; /* no more chars in directive line */
34
35 /*
36 * if the macro is a function-like macro, record the start of the
37 * list of parameters
38 */
39 if (*hdr_pos == '(')
40 macro_parameters_s = hdr_pos;
41
42 if (*hdr_pos == ' ' || *hdr_pos == '\t') {
43 /* found the end of our macro name */
44 macro_name_e = hdr_pos;
45 return macro_value_locate_s;
46 }
47 ++hdr_pos;
48 return macro_name_parse;
49 }
50
51 static void *macro_name_locate_s(void)
52 {
53 if (*hdr_pos == '\n')
54 return directive_locate; /* no more chars in directive line */
55
56 if (*hdr_pos != ' ' && *hdr_pos != '\t') {
57 /* got the first char of the macro name */
58 macro_name_s = hdr_pos;
59 return macro_name_parse;
60 }
61 ++hdr_pos;
62 return macro_name_locate_s;
63 }
64
65 /* we found a directive, check it's a macro definition */
66 static char directive_define[] = {'d','e','f','i','n','e'};
67 static void *directive_name(void)
68 {
69 int cmp;
70
71 if (hdr_eof - hdr_pos < sizeof(directive_define)) {
72 hdr_pos = hdr_eof;
73 return 0; /* no more char in hdr */
74 }
75
76 cmp = memcmp(hdr_pos, &directive_define[0], sizeof(directive_define));
77 if (cmp != 0) {
78 /* not a define directive, locate the next one */
79 return directive_locate;
80 }
81
82 /*
83 * we found a define directive, hence a macro definition. point right
84 * after the checked directive name
85 */
86 hdr_pos += sizeof(directive_define);
87 return macro_name_locate_s;
88 }
89
90 /*
91 * we are parsing the header file to locate the start of a directive,
92 * here "/n#define"
93 */
94 static void *directive_locate(void)
95 {
96 if (*hdr_pos == '\n' ) {
97 /* peak next char */
98 if ((hdr_pos + 1) != hdr_eof && *(hdr_pos + 1) == '#') {
99 /* let's point on the start of the directive name */
100 hdr_pos += 2;
101 return directive_name;
102 }
103 }
104 ++hdr_pos;
105 return directive_locate;
106 }
File builders/mesa-vulkan-0/contrib/generators/sid_tables/hdr_preprocess.c deleted (index df21f5b..0000000)
1 /*
2 * 2 stream oriented passes in order:
3 * 1 join lines which have a escaped line return '\n'
4 * 2 remove the 2 types of comments: "block" and "end of line"
5 * (we could only replace them with a space chars)
6 */
7 static size_t hdr_lines_to_zero_terminator(char *hdr, size_t hdr_sz)
8 {
9 loop {
10 if (hdr_sz == 0)
11 break;
12 if (*hdr == '\n')
13 *hdr = 0;
14 ++hdr;
15 hdr_sz--;
16 };
17 }
18
19 static size_t hdr_lines_merge(char *hdr, size_t hdr_sz)
20 {
21 char *s;
22 char *d;
23 char *last_char;
24
25 if (hdr_sz == 0)
26 return 0;
27
28 s = hdr;
29 /* in-place processing */
30 d = hdr;
31
32 /* hdr cannot be 0, then last_char >=0 namely doesn't warp around 0 */
33 last_char = hdr + hdr_sz - 1;
34
35 loop {
36 if (s > last_char)
37 break;
38
39 if (s[0] == '\\' && s != last_char && s[1] == '\n') {
40 s += 2;
41 continue;
42 }
43
44 d[0] = s[0];
45 ++s;
46 ++d;
47 };
48 /* ok since the hdr file cannot be empty here */
49 return d - hdr;
50 }
51
52 /*----------------------------------------------------------------------------*/
53 /* lil state machine to avoid regexes here */
54 static void *state_in_block_comment(char **s, char **d, char *last_char);
55 static void *state_in_end_of_line_comment(char **s, char **d, char *last_char);
56 static void *state_out_of_comment(char **s, char **d, char *last_char);
57 /*----------------------------------------------------------------------------*/
58
59 /* we could just replace comment chars with spaces */
60 static void *state_in_end_of_line_comment(char **s, char **d, char *last_char)
61 {
62 if ((*s)[0] == '\n')
63 return state_out_of_comment;
64 ++(*s);
65 return state_in_end_of_line_comment;
66 }
67
68 /* we could just replace comment chars with spaces */
69 static void *state_in_block_comment(char **s, char **d, char *last_char)
70 {
71 if ((*s)[0] == '*' && (*s) < last_char && (*s)[1] == '/') {
72 (*s) += 2;
73 return state_out_of_comment;
74 }
75 ++(*s);
76 return state_in_block_comment;
77 }
78
79 static void *state_out_of_comment(char **s, char **d, char *last_char)
80 {
81 if ((*s)[0] == '/' && (*s) < last_char) {
82 if ((*s)[1] == '*') {
83 (*s) += 2;
84 return state_in_block_comment;
85 } else if ((*s)[1] == '/') {
86 (*s) += 2;
87 return state_in_end_of_line_comment;
88 }
89 }
90
91 (*d)[0] = (*s)[0];
92 ++(*d);
93 ++(*s);
94 return state_out_of_comment;
95 }
96
97 static size_t hdr_comments_remove(char *hdr, size_t hdr_sz)
98 {
99 char *s;
100 char *last_char;
101 char *d;
102 void *(*state)(char **s, char **d, char *last_char);
103
104 if (hdr_sz == 0)
105 return 0;
106
107 s = hdr;
108 /* in-place processing */
109 d = hdr;
110
111 /* hdr cannot be 0, then last_char >=0 namely doesn't warp around 0 */
112 last_char = hdr + hdr_sz - 1;
113
114 state = state_out_of_comment;
115 loop {
116 if (s > last_char)
117 break;
118
119 state = state(&s, &d, last_char);
120
121 };
122 /* ok since the hdr file cannot be empty here */
123 return d - hdr;
124 }
125 /*----------------------------------------------------------------------------*/
126
127 static void hdr_preprocess(char **hdr, size_t *hdr_sz, int fd)
128 {
129 char *hdr_read_start;
130 struct stat stat;
131
132 fstat(fd, &stat);
133 *hdr_sz = stat.st_size;
134
135 *hdr = malloc(*hdr_sz);
136 hdr_read_start = *hdr;
137
138 loop {
139 ssize_t read_bytes_n;
140
141 /* don't care about hdr_sz since we want the whole file */
142 read_bytes_n = read(fd, hdr_read_start, *hdr_sz);
143
144 if (read_bytes_n == 0) /* end of file */
145 break;
146
147 if (read_bytes_n == -1) {
148 if (errno == EINTR)
149 continue;
150 ERR("FATAL:unable to read the header file\n");
151 exit(1);
152 }
153
154 hdr_read_start += read_bytes_n;
155 };
156
157 *hdr_sz = hdr_lines_merge(*hdr, *hdr_sz);
158 *hdr_sz = hdr_comments_remove(*hdr, *hdr_sz);
159 }
File builders/mesa-vulkan-0/contrib/generators/sid_tables/macro_process.c deleted (index 5088295..0000000)
1 static struct sid_strings_offsets_segment *
2 sid_strings_offsets_segments_last_get(void)
3 {
4 return &sid_strings_offsets_segments[
5 sid_strings_offsets_segments_n - 1];
6 }
7
8 static struct si_register *si_registers_last_get(void)
9 {
10 /* could be registers from sid.h or gfx9d.h */
11 return &(*si_registers)[(*si_registers_n) - 1];
12 }
13
14 static struct si_register_field *si_register_fields_last_get(void)
15 {
16 return &si_register_fields[si_register_fields_n - 1];
17 }
18
19 static s32 sid_strings_last_offset_get(void)
20 {
21 return sid_strings[sid_strings_n -1].offset;
22 }
23
24 static struct sid_string *sid_strings_last_get(void)
25 {
26 return &sid_strings[sid_strings_n - 1];
27 }
28
29 static void sid_strings_append(char *s, char *e)
30 {
31 struct sid_string *new;
32
33 sid_strings = realloc(sid_strings, sizeof(*sid_strings)
34 * (sid_strings_n + 1));
35 new = &sid_strings[sid_strings_n];
36
37 new->hdr_string_s = s;
38 new->hdr_string_e = e;
39
40 if (sid_strings_n == 0) {
41 new->offset = 0;
42 } else {
43 struct sid_string *prev = sid_strings_last_get();
44
45 /* account for the prefix and suffix chars '"','\','0','"' */
46 new->offset = prev->offset + (e - s) + 4;
47 }
48 ++sid_strings_n;
49 }
50
51 #define register_name_s_get prefix_skip
52 #define field_name_s_get prefix_skip
53 #define value_name_s_get prefix_skip
54 static char *prefix_skip(void)
55 {
56 /*
57 * skip "R_" for a register name
58 * skip "S_" for a field set accessor name
59 * skip "V_" for a field value name
60 */
61 char *c = macro_name_s + 2;
62
63 /* skip anything till '_', namely the register hexnumber */
64 loop {
65 if (*c == '_')
66 break;
67 ++c;
68 };
69 return c + 1;
70 }
71
72
73 #include "pkt.c"
74 #include "register.c"
75 #include "field.c"
76 #include "value.c"
77
78 static void macro_process(void)
79 {
80 /* fall thru processing */
81
82 TRACE("\n================================================================================\nmacro_name_s=\t\t%p\nmacro_parameter_s=\t%p\nmacro_name_e=\t\t%p\nmacro_value_s=\t\t%p\n",
83 macro_name_s, macro_parameters_s, macro_name_e, macro_value_s);
84 TRACEW(macro_name_s, macro_name_e - macro_name_s);
85
86 if (macro_name_is_pkt3()) {
87 TRACE("\npkt3 detected");
88 pkt3_macro_consume();
89 return;
90 }
91 if (macro_name_is_register_offset_name()) {
92 TRACE("\nregister detected");
93 register_offset_name_macro_consume();
94 return;
95 }
96 if (macro_name_is_register_field_related()) {
97 TRACE("\nfield detected");
98 register_field_macro_consume();
99 return;
100 }
101 if (macro_name_is_register_field_value_name()) {
102 TRACE("\nvalue detected");
103 register_field_value_name_macro_consume();
104 return;
105 }
106 TRACE("\nnothing detected");
107 }
File builders/mesa-vulkan-0/contrib/generators/sid_tables/pkt.c deleted (index 3165b83..0000000)
1 /* this macro type is based on the macro name */
2 #define macro_is_function_like macro_name_is_function_like
3 static bool macro_name_is_function_like(void)
4 {
5 if (*(macro_name_e - 1) == ')')
6 return true;
7 return false;
8 }
9
10 static bool macro_name_is_pkt3(void)
11 {
12 int cmp;
13 static char pkt3_prefix[] = {'P','K','T','3','_'};
14
15 cmp = memcmp(&pkt3_prefix[0], macro_name_s, sizeof(pkt3_prefix));
16 if (cmp != 0)
17 return false;
18 return true;
19 }
20
21 static void si_packet3s_append(void)
22 {
23 struct si_packet3 *new;
24
25 si_packet3s = realloc(si_packet3s, sizeof(*si_packet3s) *
26 (si_packet3s_n + 1));
27 new = &si_packet3s[si_packet3s_n];
28
29 new->sid_strings_offset = sid_strings_last_offset_get();
30
31 /* the full macro name */
32 new->hdr_macro_name_s = macro_name_s;
33 new->hdr_macro_name_e = macro_name_e;
34 ++si_packet3s_n;
35 }
36
37 static void pkt3_macro_consume(void)
38 {
39 /* we are not interested in pkt3 function-like macro */
40 if (macro_is_function_like())
41 return;
42
43 /* skip the pkt3 prefix "PKT3_" */
44 sid_strings_append(macro_name_s + 5, macro_name_e);
45 si_packet3s_append();
46 }
File builders/mesa-vulkan-0/contrib/generators/sid_tables/register.c deleted (index 43abb4f..0000000)
1 /* a register macro name starts with "R_" */
2 static bool macro_name_is_register_offset_name(void)
3 {
4 if (macro_name_s[0] == 'R' && macro_name_s[1] == '_')
5 return true;
6 return false;
7 }
8
9 static void register_offset_name_macro_consume(void)
10 {
11 struct si_register *new;
12 char *register_name_s;
13
14 *si_registers = realloc((*si_registers), sizeof(*(*si_registers))
15 * ((*si_registers_n) + 1));
16 new = &(*si_registers)[(*si_registers_n)];
17
18 /*
19 * skip the register offset name prefix "R_HEXNUM_" to reach the
20 * actual register name
21 */
22 register_name_s = register_name_s_get();
23
24 /*
25 * carefull, it's only the register name, namely the register offset
26 * name without prefix
27 */
28 sid_strings_append(register_name_s, macro_name_e);
29 new->sid_strings_offset = sid_strings_last_offset_get();
30
31 /* carefull, the register offset name is the full macro name */
32 new->hdr_offset_name_s = macro_name_s;
33 new->hdr_offset_name_e = macro_name_e;
34
35 /* no fields yet */
36 new->fields_n = 0;
37 new->si_register_fields_so = 0;
38
39 ++(*si_registers_n);
40 }
File builders/mesa-vulkan-0/contrib/generators/sid_tables/sid_tables.c deleted (index e4b11ff..0000000)
1 #include <sys/stat.h>
2 #include <unistd.h>
3 #include <fcntl.h>
4 #include <errno.h>
5 #include <string.h>
6
7 #include <stdbool.h>
8 #include <stdio.h>
9 #include <stdlib.h>
10 #include <stdint.h>
11
12 /*
13 * we don't care about memory management
14 * we don't care about global variables
15 * we don't care about speed optimization: clarity is prime
16 * we mostly don't care about code factorisation
17 * something is not expected:
18 * - corrupted generation (very very bad!)
19 * - more likely a crash (good!)
20 *
21 * the deprecated generator used to perform some factorisation at
22 * the register definition level, not done here, for now, if ever
23 */
24
25 /*
26 * buf: buffer
27 * e: End
28 * eo: End Offset
29 * eof: End Of File
30 * idx: IndeX
31 * pos: POSition
32 * reg: REGister
33 * s: Start
34 * si: amd Southern Islands gcn1 gpus
35 * so: Start Offset
36 */
37
38
39 /*----------------------------------------------------------------------------*/
40 /* do fix C */
41 #define loop for(;;)
42 #define u8 uint8_t
43 #define u32 uint32_t
44 #define s32 int32_t
45 #define u64 uint64_t
46 /* #define char u8 */
47 /* #define int s32 */
48 /* #define size_t u64 */
49 /* #define ssize_t s64 */
50
51 /*
52 * FAT WARNING: most C stdlib printf stuff is BUFFERED on stdout. you must use
53 * the flush C stdlib functions if you mix POSIX and C stdlib
54 * dprintf is a GLIBC extension which is immune to this flushing
55 */
56 #define ERR(fmt, ...) dprintf(2,fmt,##__VA_ARGS__)
57 #define OUT(fmt, ...) dprintf(1,fmt,##__VA_ARGS__)
58 /*----------------------------------------------------------------------------*/
59
60
61 /*----------------------------------------------------------------------------*/
62 #ifdef DEBUG
63 #define TRACE(fmt, ...) dprintf(2, fmt,##__VA_ARGS__)
64 #define TRACEW(a,b) write(2,a,b)
65 #else
66 #define TRACE(fmt, ...)
67 #define TRACEW(a,b)
68 #endif
69 /*----------------------------------------------------------------------------*/
70
71
72 /*----------------------------------------------------------------------------*/
73 static int sid_h_fd;
74 static char *sid_h;
75 static size_t sid_h_sz;
76
77 static int gfx9d_h_fd;
78 static char *gfx9d_h;
79 static size_t gfx9d_h_sz;
80 /*----------------------------------------------------------------------------*/
81
82
83 /*----------------------------------------------------------------------------*/
84 /* parser */
85 static char *hdr_pos; /* current postion in header file */
86 static char *hdr_eof; /* point right after the last char */
87 static bool macro_found;
88 static char *macro_name_s;
89 static char *macro_parameters_s;
90 static char *macro_name_e; /* points right past the last char */
91 static char *macro_value_s;
92
93 /* while accumulating data, registers could be those from sid.h or gfx9d.h */
94 static struct si_register **si_registers;
95 static int *si_registers_n;
96 /*----------------------------------------------------------------------------*/
97
98
99 /*----------------------------------------------------------------------------*/
100 /* WARNING: byte offsets in sid_strings are s32 */
101 struct sid_string {
102 s32 offset;
103 char *hdr_string_s;
104 char *hdr_string_e;
105 };
106 static struct sid_string *sid_strings;
107 static u32 sid_strings_n;
108 /*----------------------------------------------------------------------------*/
109
110
111 /*----------------------------------------------------------------------------*/
112 struct si_packet3 {
113 s32 sid_strings_offset;
114 char *hdr_macro_name_s;
115 char *hdr_macro_name_e;
116 };
117 static struct si_packet3 *si_packet3s;
118 static u32 si_packet3s_n;
119 /*----------------------------------------------------------------------------*/
120
121
122 /*----------------------------------------------------------------------------*/
123 struct si_register {
124 s32 sid_strings_offset;
125
126 char *hdr_offset_name_s;
127 char *hdr_offset_name_e;
128
129 u32 fields_n;
130
131 /* map the src code generated name to our name */
132 #define sid_fields_table_so si_register_fields_so
133 u32 si_register_fields_so;
134 };
135
136 static struct si_register *sid_h_registers;
137 static u32 sid_h_registers_n;
138
139 static struct si_register *gfx9d_h_registers;
140 static u32 gfx9d_h_registers_n;
141
142 /*----------------------------------------------------------------------------*/
143
144
145 /*----------------------------------------------------------------------------*/
146 struct si_register_field {
147 bool first_field;
148
149 s32 sid_strings_offset;
150
151 char *hdr_macro_name_s;
152 char *hdr_parameters_s;
153
154 /* WARNING: numeric ordered _continuous_ array of integer values */
155 u32 sid_strings_offsets_n;
156 u32 sid_strings_offsets_so;
157 };
158 static struct si_register_field *si_register_fields;
159 static u32 si_register_fields_n;
160 /*----------------------------------------------------------------------------*/
161
162
163 /*----------------------------------------------------------------------------*/
164 /*
165 * this is a segment of offsets. each of those segment is related to one
166 * register field
167 */
168 struct sid_strings_offsets_segment {
169 u32 so; /* the starting offset in sid_strings_offsets */
170 u32 offsets_n;
171 s32 *offsets; /* the actual sid_strings_offsets, signed... */
172 };
173 struct sid_strings_offsets_segment *sid_strings_offsets_segments;
174 u32 sid_strings_offsets_segments_n;
175 /*----------------------------------------------------------------------------*/
176
177
178 /*----------------------------------------------------------------------------*/
179 /*
180 * as for now, linux write syscall is castrated to a write unit which is less
181 * than max of s32
182 */
183 void OUTW(void *pos, u64 sz)
184 {
185 size_t bytes_n_to_write = sz;
186
187 loop {
188 ssize_t bytes_n_written;
189
190 if (bytes_n_to_write == 0)
191 break;
192
193 bytes_n_written = write(1, pos, bytes_n_to_write);
194 if (bytes_n_written == -1) {
195 if (errno == EAGAIN || errno == EINTR)
196 continue;
197 ERR("\nunable to write to output file (%s)\n",
198 strerror(errno));
199 exit(1);
200 }
201 bytes_n_to_write -= bytes_n_written;
202 pos += bytes_n_written;
203 };
204 }
205 /*----------------------------------------------------------------------------*/
206
207
208 /*----------------------------------------------------------------------------*/
209 #include "macro_process.c"
210 #include "generator.c"
211 #include "hdr_parser.c"
212 #include "hdr_preprocess.c"
213 /*----------------------------------------------------------------------------*/
214
215
216 static void sid_tables_h_gen(void)
217 {
218 void *(*parser_state)(void);
219
220 /*--------------------------------------------------------------------*/
221 sid_strings_n = 0;
222 sid_strings = 0;
223
224 si_packet3s_n = 0;
225 si_packet3s = 0;
226
227 sid_h_registers_n = 0;
228 sid_h_registers = 0;
229
230 gfx9d_h_registers_n = 0;
231 gfx9d_h_registers = 0;
232
233 si_register_fields_n = 0;
234 si_register_fields = 0;
235
236 sid_strings_offsets_segments = 0;
237 sid_strings_offsets_segments_n = 0;
238 /*--------------------------------------------------------------------*/
239
240
241 /*--------------------------------------------------------------------*/
242 /* accumulate data from sid.h */
243 hdr_pos = sid_h;
244 hdr_eof = sid_h + sid_h_sz;
245
246 si_registers = &sid_h_registers;
247 si_registers_n = &sid_h_registers_n;
248
249 parser_state = directive_locate;
250 macro_found = false;
251 loop {
252 if (hdr_pos == hdr_eof)
253 break;
254
255 parser_state = parser_state();
256
257 if (macro_found) {
258 macro_process();
259 macro_found = false;
260 }
261 };
262 /*--------------------------------------------------------------------*/
263
264
265 /*--------------------------------------------------------------------*/
266 /* accumulate data from gfx9d.h */
267 hdr_pos = gfx9d_h;
268 hdr_eof = gfx9d_h + gfx9d_h_sz;
269
270 si_registers = &gfx9d_h_registers;
271 si_registers_n = &gfx9d_h_registers_n;
272
273 parser_state = directive_locate;
274 macro_found = false;
275 loop {
276 if (hdr_pos == hdr_eof)
277 break;
278
279 parser_state = parser_state();
280
281 if (macro_found) {
282 macro_process();
283 macro_found = false;
284 }
285 };
286 /*--------------------------------------------------------------------*/
287
288
289 /*--------------------------------------------------------------------*/
290 OUT(struct_types);
291
292 /* output the generated code from accumulated data */
293 sid_strings_gen();
294 si_packet3s_gen();
295
296 si_registers = &sid_h_registers;
297 si_registers_n = &sid_h_registers_n;
298 si_reg_table_gen(SID_H_SI_REG_TABLE_GEN_HDR);
299
300 si_registers = &gfx9d_h_registers;
301 si_registers_n = &gfx9d_h_registers_n;
302 si_reg_table_gen(GFX9D_H_SI_REG_TABLE_GEN_HDR);
303
304 sid_fields_table_gen();
305
306 sid_strings_offsets_gen();
307 /*--------------------------------------------------------------------*/
308 }
309
310
311 int main(int args_n, char **args)
312 {
313 if (args_n != 3) {
314 ERR("\nusage: sid_tables SID_H_PATH GFX9D_H_PATH\n");
315 exit(1);
316 }
317
318 TRACE("\nSID_H_PATH=%s\nGFX9D_PATH=%s", args[1], args[2]);
319
320 sid_h_fd = open(args[1], O_RDONLY);
321 if (sid_h_fd == -1) {
322 ERR("\nunable to open SID_H=%s\n", args[1]);
323 exit(1);
324 }
325
326 gfx9d_h_fd = open(args[2], O_RDONLY);
327 if (gfx9d_h_fd == -1) {
328 ERR("\nunable to open GFX9D_H=%s\n", args[2]);
329 exit(1);
330 }
331
332 hdr_preprocess(&sid_h, &sid_h_sz, sid_h_fd);
333 hdr_preprocess(&gfx9d_h, &gfx9d_h_sz, gfx9d_h_fd);
334
335 OUT("#ifndef SID_TABLES_H\n#define SID_TABLES_H\n");
336 sid_tables_h_gen();
337 OUT("\n#endif");
338
339 exit(0);
340 }
File builders/mesa-vulkan-0/contrib/generators/sid_tables/value.c deleted (index 83a315e..0000000)
1 static struct sid_strings_offsets_segment *sid_strings_offsets_segment_new(void)
2 {
3 struct sid_strings_offsets_segment *prev;
4 struct sid_strings_offsets_segment *new;
5
6 /*
7 * the related register field, the last one due to source file ordering
8 */
9 struct si_register_field *field = si_register_fields_last_get();
10
11 sid_strings_offsets_segments = realloc(sid_strings_offsets_segments,
12 sizeof(*sid_strings_offsets_segments)
13 * (sid_strings_offsets_segments_n + 1));
14 new = &sid_strings_offsets_segments[sid_strings_offsets_segments_n];
15
16 /* first segment */
17 if (sid_strings_offsets_segments_n == 0) {
18 memset(new, 0, sizeof(*new));
19 field->sid_strings_offsets_n = 0;
20 field->sid_strings_offsets_so = 0;
21 goto exit;
22 }
23
24 /*
25 * we have a previous segment, init properly the new segment based on
26 * this very previous segment in order to receive new values
27 */
28 prev = sid_strings_offsets_segments_last_get();
29
30 new->so = prev->so + prev->offsets_n;
31 field->sid_strings_offsets_so = new->so;
32 new->offsets_n = 0;
33 new->offsets = 0;
34 exit:
35 ++sid_strings_offsets_segments_n;
36 return new;
37 }
38
39 static struct sid_strings_offsets_segment *field_values_names_segment_get(void)
40 {
41 /*
42 * the target field is the last one, because the source header
43 * file declare register/field/values in order
44 */
45 struct si_register_field *last_field = si_register_fields_last_get();
46
47 /*
48 * check if we have already one sid_strings_offsets segment related to
49 * this field
50 */
51 if (last_field->sid_strings_offsets_n != 0)
52 return sid_strings_offsets_segments_last_get();
53 return sid_strings_offsets_segment_new();
54 }
55
56 /* WARNING: the sid_strings offsets are stored as signed */
57 static void field_values_names_segment_append(
58 struct sid_strings_offsets_segment *segment,
59 s32 offset)
60 {
61 /* we target always the last field due to source header file ordering */
62 struct si_register_field *field = si_register_fields_last_get();
63
64 segment->offsets = realloc(segment->offsets, sizeof(*segment->offsets)
65 * (segment->offsets_n + 1));
66 segment->offsets[segment->offsets_n] = offset;
67 ++segment->offsets_n;
68
69 /* update the field */
70 field->sid_strings_offsets_n = segment->offsets_n;
71 }
72
73 static void register_field_value_name_macro_consume(void)
74 {
75 char *value_name_s;
76 u64 value_numeric;
77 s32 value_name_sid_strings_offset;
78 struct sid_strings_offsets_segment *field_values_names_segment;
79
80 /* add the value name, the macro name without the "V_(HEXNUMBER)_" */
81 value_name_s = value_name_s_get();
82 sid_strings_append(value_name_s, macro_name_e);
83 value_name_sid_strings_offset = sid_strings_last_offset_get();
84
85 /* WARNING, only zero/positive values */
86 value_numeric = strtoul(macro_value_s, 0, 0);
87
88 field_values_names_segment = field_values_names_segment_get();
89
90 /*
91 * reach the right storage location for this value name offset
92 * the segment are _continuous_ values, not _sparse_ like in the
93 * source header file
94 */
95 loop {
96 if (field_values_names_segment->offsets_n == value_numeric)
97 break;
98 field_values_names_segment_append(field_values_names_segment,
99 -1);
100 };
101
102 field_values_names_segment_append(field_values_names_segment,
103 value_name_sid_strings_offset);
104 }
105
106 /* the macro name starts with "V_" */
107 static bool macro_name_is_register_field_value_name(void)
108 {
109 if (macro_name_s[0] == 'V' && macro_name_s[1] == '_')
110 return true;
111 return false;
112 }
File builders/mesa-vulkan-amd-sh-0/builder.sh renamed from builders/mesa-vulkan-0/builder.sh (similarity 50%) (mode: 100644) (index 8bbb8bd..8693935)
1 git_commit=7346933fc8616ec2adc9848d267cee873f2eabb8
1 git_commit=ea83fd912423ac0247395f5c1ccabe94cd95ee24
2 2 slot=0 slot=0
3 3 . $nyan_root/builders/mesa-vulkan/builder.sh . $nyan_root/builders/mesa-vulkan/builder.sh
File builders/mesa-vulkan-amd-sh-0/contrib/vk_enum_to_str.c renamed from builders/mesa-vulkan-0/contrib/vk_enum_to_str.c (similarity 100%)
File builders/mesa-vulkan-amd-sh-0/contrib/vk_enum_to_str.h renamed from builders/mesa-vulkan-0/contrib/vk_enum_to_str.h (similarity 100%)
File builders/mesa-vulkan-amd-sh-0/contrib/x86_64_amdgpu_linux_gnu_vulkan_x11_drm_gcc.sh renamed from builders/mesa-vulkan-0/contrib/x86_64_amdgpu_linux_gnu_vulkan_x11_drm_gcc.sh (similarity 94%) (mode: 100755) (index a42ffd5..cfd96b5)
... ... fi
592 592
593 593
594 594 #=============================================================================== #===============================================================================
595 # the kronos registry, with a xml parser for it
595 # the kronos registry
596 596 vulkan_api_xml=$src_dir/src/vulkan/registry/vk.xml vulkan_api_xml=$src_dir/src/vulkan/registry/vk.xml
597 #-------------------------------------------------------------------------------
598 $build_cc -I$src_dir/contrib/ezxml $src_dir/contrib/ezxml/ezxml.c \
599 -o $build_dir/ezxml.o
600 597 #=============================================================================== #===============================================================================
601 598
602 599
 
... ... $libdrm_cppflags \
699 696 #------------------------------------------------------------------------------- #-------------------------------------------------------------------------------
700 697 $cc $cppflags $src_dir/src/vulkan/wsi/wsi_common.c \ $cc $cppflags $src_dir/src/vulkan/wsi/wsi_common.c \
701 698 -o $build_dir/wsi_common.o & -o $build_dir/wsi_common.o &
699 $cc $cppflags $src_dir/src/vulkan/wsi/wsi_common_drm.c \
700 -o $build_dir/wsi_common_drm.o &
702 701 $cc $cppflags $src_dir/src/vulkan/wsi/wsi_common_x11.c \ $cc $cppflags $src_dir/src/vulkan/wsi/wsi_common_x11.c \
703 702 -o $build_dir/wsi_common_x11.o & -o $build_dir/wsi_common_x11.o &
704 703 $cc $cppflags $src_dir/src/vulkan/wsi/wsi_common_display.c \ $cc $cppflags $src_dir/src/vulkan/wsi/wsi_common_display.c \
 
... ... rm -f $build_dir/libvulkan_wsi.a
708 707 wait wait
709 708 $ar $build_dir/libvulkan_wsi.a \ $ar $build_dir/libvulkan_wsi.a \
710 709 $build_dir/wsi_common.o \ $build_dir/wsi_common.o \
710 $build_dir/wsi_common_drm.o \
711 711 $build_dir/wsi_common_x11.o \ $build_dir/wsi_common_x11.o \
712 712 $build_dir/wsi_common_display.o $build_dir/wsi_common_display.o
713 713 #=============================================================================== #===============================================================================
 
... ... $python3 $src_dir/src/amd/registers/makeregheader.py \
745 745 --guard AMDGFXREGS_H \ --guard AMDGFXREGS_H \
746 746 >$build_dir/amdgfxregs.h & >$build_dir/amdgfxregs.h &
747 747 #------------------------------------------------------------------------------- #-------------------------------------------------------------------------------
748 #-------------------------------------------------------------------------------
749 ##### keep that here since some upstream updates don't get properly traced by git
750 ##### and going out of sync will break nir
751 ####export PYTHONPATH=$mako
752 ####$python3 $src_dir/src/compiler/nir/nir_builder_opcodes_h.py \
753 ####>$build_dir/nir_builder_opcodes.h &
754 ####
755 ####$python3 $src_dir/src/compiler/nir/nir_opcodes_h.py \
756 ####>$build_dir/nir_opcodes.h &
757 ####
758 ####$python3 $src_dir/src/compiler/nir/nir_intrinsics_h.py \
759 ####--outdir $build_dir &
760 ####unset PYTHONPATH
761 #-------------------------------------------------------------------------------
762 #-------------------------------------------------------------------------------
763 $build_cc -I$src/contrib/generators/nir \
764 $src_dir/contrib/generators/nir/nir_builder_opcodes_h.c \
765 -o $build_dir/nir_builder_opcodes_h.o
766
767 $build_ccld $build_dir/nir_builder_opcodes_h.o \
768 -o $build_dir/nir_builder_opcodes_h
769
770 $build_dir/nir_builder_opcodes_h >$build_dir/nir_builder_opcodes.h &
771 #-------------------------------------------------------------------------------
772 $build_cc -I$src/contrib/generators/nir \
773 $src_dir/contrib/generators/nir/nir_opcodes_h.c \
774 -o $build_dir/nir_opcodes_h.o
775
776 $build_ccld $build_dir/nir_opcodes_h.o \
777 -o $build_dir/nir_opcodes_h
778
779 $build_dir/nir_opcodes_h >$build_dir/nir_opcodes.h &
780 #-------------------------------------------------------------------------------
781 # nir_intrinsics.h
782 $build_cc -I$src/contrib/generators/nir \
783 $src_dir/contrib/generators/nir/nir_intrinsics_h.c \
784 -o $build_dir/nir_intrinsics_h.o
748 export PYTHONPATH=$mako
749 $python3 $src_dir/src/compiler/nir/nir_builder_opcodes_h.py \
750 >$build_dir/nir_builder_opcodes.h &
785 751
786 $build_ccld $build_dir/nir_intrinsics_h.o \
787 -o $build_dir/nir_intrinsics_h
752 $python3 $src_dir/src/compiler/nir/nir_opcodes_h.py \
753 >$build_dir/nir_opcodes.h &
788 754
789 $build_dir/nir_intrinsics_h >$build_dir/nir_intrinsics.h &
755 $python3 $src_dir/src/compiler/nir/nir_intrinsics_h.py \
756 --outdir $build_dir &
757 unset PYTHONPATH
790 758 #------------------------------------------------------------------------------- #-------------------------------------------------------------------------------
791 759 cppflags="\ cppflags="\
792 760 $cppflags_common \ $cppflags_common \
 
... ... $python3 $src_dir/src/compiler/spirv/vtn_gather_types_c.py \
981 949 $src_dir/src/compiler/spirv/spirv.core.grammar.json \ $src_dir/src/compiler/spirv/spirv.core.grammar.json \
982 950 $build_dir/vtn_gather_types.c & $build_dir/vtn_gather_types.c &
983 951 #------------------------------------------------------------------------------- #-------------------------------------------------------------------------------
952 $python3 $src_dir/src/compiler/spirv/vtn_generator_ids_h.py \
953 $src_dir/src/compiler/spirv/spir-v.xml \
954 $build_dir/vtn_generator_ids.h
955 #-------------------------------------------------------------------------------
984 956 # nir generated files # nir generated files
985 957 $python3 $src_dir/src/compiler/nir/nir_constant_expressions.py \ $python3 $src_dir/src/compiler/nir/nir_constant_expressions.py \
986 958 >$build_dir/nir_constant_expressions.c & >$build_dir/nir_constant_expressions.c &
 
... ... $python3 $src_dir/src/compiler/nir/nir_constant_expressions.py \
988 960 $python3 $src_dir/src/compiler/nir/nir_opt_algebraic.py \ $python3 $src_dir/src/compiler/nir/nir_opt_algebraic.py \
989 961 >$build_dir/nir_opt_algebraic.c & >$build_dir/nir_opt_algebraic.c &
990 962 #------------------------------------------------------------------------------- #-------------------------------------------------------------------------------
991 #-------------------------------------------------------------------------------
992 ##### keep that here since some upstream updates don't get properly traced by git
993 ##### and going out of sync will break nir
994 ####$python3 $src_dir/src/compiler/nir/nir_opcodes_c.py \
995 ####>$build_dir/nir_opcodes.c &
996 ####
997 ####$python3 $src_dir/src/compiler/nir/nir_intrinsics_c.py \
998 ####--outdir $build_dir &
999 #-------------------------------------------------------------------------------
1000 #-------------------------------------------------------------------------------
1001 unset PYTHONPATH
1002 #-------------------------------------------------------------------------------
1003 # nir_intrinsics.c
1004 $build_cc -I$src/contrib/generators/nir \
1005 $src_dir/contrib/generators/nir/nir_intrinsics_c.c \
1006 -o $build_dir/nir_intrinsics_c.o
1007
1008 $build_ccld $build_dir/nir_intrinsics_c.o \
1009 -o $build_dir/nir_intrinsics_c
963 $python3 $src_dir/src/compiler/nir/nir_opcodes_c.py \
964 >$build_dir/nir_opcodes.c &
1010 965
1011 $build_dir/nir_intrinsics_c >$build_dir/nir_intrinsics.c &
966 $python3 $src_dir/src/compiler/nir/nir_intrinsics_c.py \
967 --outdir $build_dir &
1012 968 #------------------------------------------------------------------------------- #-------------------------------------------------------------------------------
1013 # nir_opcodes.c
1014 $build_cc -I$src/contrib/generators/nir \
1015 $src_dir/contrib/generators/nir/nir_opcodes_c.c \
1016 -o $build_dir/nir_opcodes_c.o
1017
1018 $build_ccld $build_dir/nir_opcodes_c.o \
1019 -o $build_dir/nir_opcodes_c
1020
1021 $build_dir/nir_opcodes_c >$build_dir/nir_opcodes.c &
969 unset PYTHONPATH
1022 970 #------------------------------------------------------------------------------- #-------------------------------------------------------------------------------
1023 971 cppflags="\ cppflags="\
1024 972 $cppflags_common \ $cppflags_common \
 
... ... $src_dir/src/compiler/nir/nir_opt_shrink_vectors.c \
1170 1118 $src_dir/src/compiler/nir/nir_opt_sink.c \ $src_dir/src/compiler/nir/nir_opt_sink.c \
1171 1119 $src_dir/src/compiler/nir/nir_opt_trivial_continues.c \ $src_dir/src/compiler/nir/nir_opt_trivial_continues.c \
1172 1120 $src_dir/src/compiler/nir/nir_opt_undef.c \ $src_dir/src/compiler/nir/nir_opt_undef.c \
1121 $src_dir/src/compiler/nir/nir_opt_uniform_atomics.c \
1173 1122 $src_dir/src/compiler/nir/nir_opt_vectorize.c \ $src_dir/src/compiler/nir/nir_opt_vectorize.c \
1174 1123 $src_dir/src/compiler/nir/nir_phi_builder.c \ $src_dir/src/compiler/nir/nir_phi_builder.c \
1175 1124 $src_dir/src/compiler/nir/nir_print.c \ $src_dir/src/compiler/nir/nir_print.c \
 
... ... $xorgproto_cppflags \
1246 1195 " "
1247 1196
1248 1197 libaco_files="\ libaco_files="\
1198 $src_dir/src/amd/compiler/aco_form_hard_clauses.cpp \
1249 1199 $src_dir/src/amd/compiler/aco_dead_code_analysis.cpp \ $src_dir/src/amd/compiler/aco_dead_code_analysis.cpp \
1250 1200 $src_dir/src/amd/compiler/aco_dominance.cpp \ $src_dir/src/amd/compiler/aco_dominance.cpp \
1251 1201 $src_dir/src/amd/compiler/aco_instruction_selection.cpp \ $src_dir/src/amd/compiler/aco_instruction_selection.cpp \
 
... ... $src_dir/src/util/half_float.c \
1347 1297 $src_dir/src/util/hash_table.c \ $src_dir/src/util/hash_table.c \
1348 1298 $src_dir/src/util/log.c \ $src_dir/src/util/log.c \
1349 1299 $src_dir/src/util/mesa-sha1.c \ $src_dir/src/util/mesa-sha1.c \
1300 $src_dir/src/util/memstream.c \
1350 1301 $src_dir/src/util/os_file.c \ $src_dir/src/util/os_file.c \
1351 1302 $src_dir/src/util/os_misc.c \ $src_dir/src/util/os_misc.c \
1352 1303 $src_dir/src/util/os_socket.c \ $src_dir/src/util/os_socket.c \
File builders/mesa-vulkan-amd-sh-0/radeon_icd.x86_64.json renamed from builders/mesa-vulkan-0/radeon_icd.x86_64.json (similarity 100%)
File builders/mesa-vulkan/builder.sh changed (mode: 100644) (index c32b5f2..b575650)
... ... mkdir -p /nyan/mesa-vulkan/$slot/lib
28 28 mkdir -p /nyan/mesa-vulkan/$slot/share/vulkan/icd.d mkdir -p /nyan/mesa-vulkan/$slot/share/vulkan/icd.d
29 29
30 30 cp -f $build_dir/libvulkan_radeon.so /nyan/mesa-vulkan/$slot/lib cp -f $build_dir/libvulkan_radeon.so /nyan/mesa-vulkan/$slot/lib
31 cp -f $nyan_root/builders/mesa-vulkan-$slot/radeon_icd.x86_64.json /nyan/mesa-vulkan/$slot/share/vulkan/icd.d
31 cp -f $nyan_root/builders/mesa-vulkan-amd-sh-$slot/radeon_icd.x86_64.json /nyan/mesa-vulkan/$slot/share/vulkan/icd.d
32 32
33 33 #------------------------------------------------------------------------------- #-------------------------------------------------------------------------------
34 34 MAX_API_VERSION=$(sed -n -E -e "s/^MAX_API_VERSION = '([\\.0-9]+)'/\\1/p" \ MAX_API_VERSION=$(sed -n -E -e "s/^MAX_API_VERSION = '([\\.0-9]+)'/\\1/p" \
File builders/xserver-1/builder.sh changed (mode: 100644) (index f9aaf6f..dd33cce)
1 git_commit=efb3abddd49fb75bd6d0e31046fed43d258c93da
1 git_commit=affc47452507d7e4605fd8c9a16db078e4f2aea2
2 2 slot=1 slot=1
3 3 . $nyan_root/builders/xserver/builder.sh . $nyan_root/builders/xserver/builder.sh
Hints:
Before first commit, do not forget to setup your git environment:
git config --global user.name "your_name_here"
git config --global user.email "your@email_here"

Clone this repository using HTTP(S):
git clone https://rocketgit.com/user/sylware/nyanlinux

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git clone ssh://rocketgit@ssh.rocketgit.com/user/sylware/nyanlinux

Clone this repository using git:
git clone git://git.rocketgit.com/user/sylware/nyanlinux

You are allowed to anonymously push to this repository.
This means that your pushed commits will automatically be transformed into a merge request:
... clone the repository ...
... make some changes and some commits ...
git push origin main