sylware / linux-gpu-amd-si (public) (License: GPLv2+) (since 2019-09-09) (hash sha1)
my old AMD Southern Islands GPU linux driver
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master
List of commits:
Subject Hash Author Date (UTC)
bug fixing 7baa7069aa89a98d831d7def358766155771e9ca Sylvain BERTRAND 2014-02-07 15:08:53
bug fixing d4a1ef00d163bc42e277c83d0a763fa11476af56 Sylvain BERTRAND 2014-02-06 20:14:33
tbls fixes 4795a3090a17bc486056301bc6bef509b9c5e339 Sylvain BERTRAND 2014-02-05 15:09:41
log more accurately the smc tbls 3d88d2a589a89e9a34f4046242f4a72a76069ddb Sylvain BERTRAND 2014-02-05 10:51:39
log more 5018f3c130cb9ce53e1834fcc586f00614a3ed86 Sylvain BERTRAND 2014-02-04 21:46:05
smc sw regs dump code 46acefa1d42984757cb1ba48a32130f2f9674687 Sylvain BERTRAND 2014-02-04 20:44:26
do dump the tbls c79209766b71e2d3231cf25673684762bf46dd8c Sylvain BERTRAND 2014-02-04 20:20:33
mc_dte_cfg_tbl dump code 46dcab9ac217dbf29a1295622587e083f161b677 Sylvain BERTRAND 2014-02-04 20:11:45
mc_eng_pll_tbl dump code 7906ec9bfacb86dd4a11bbbb2a71d33e4f3f85e7 Sylvain BERTRAND 2014-02-04 19:57:40
mc_mc_arb_tbl dump code 50faaa9b589277e1707ea2d3964731a400932654 Sylvain BERTRAND 2014-02-04 19:51:01
mc_mc_reg_tbl dump code af3826d3878248194a46cf3fda7dc2c503f8948b Sylvain BERTRAND 2014-02-04 19:40:11
mc_cac_cfg_tbl dump code 5b2ab4803a9053f36cf378a64c27f237c2c2bf0b Sylvain BERTRAND 2014-02-04 19:25:10
smc_state_tbl dump code d5c198da094e7204b24d9879c5b0873dd36ee872 Sylvain BERTRAND 2014-02-04 19:12:13
comestics and first fixes 784ed88cc10c159c57c923853bc8bd29238cc2c6 Sylvain BERTRAND 2014-02-04 17:01:06
tidy a bit a386d7d732466b07022622e8c763ebc608b9ab92 Sylvain BERTRAND 2014-02-03 17:40:52
cpy smc tbls to smc ram bc0860a37eec9cdf5962d4b9f9bb0c6981023587 Sylvain BERTRAND 2014-02-03 13:44:45
thermal regs programming 9a9ed598a7e8d9109a9ab23e90f3a94cb5c02e37 Sylvain BERTRAND 2014-01-31 14:22:12
eng clk pm and global pm switch to on a50fed4758305b9032d313cdf0021ec6a612d344 Sylvain BERTRAND 2014-01-31 12:54:41
send nodisplay msg to smc 91808e6c48d9d37da87f08da253825252122e4d9 Sylvain BERTRAND 2014-01-31 12:33:21
smc start 6c09abb37b34599c132f324359ce38d11888091f Sylvain BERTRAND 2014-01-31 12:03:10
Commit 7baa7069aa89a98d831d7def358766155771e9ca - bug fixing
Author: Sylvain BERTRAND
Author date (UTC): 2014-02-07 15:08
Committer name: Sylvain BERTRAND
Committer date (UTC): 2014-02-07 15:08
Parent(s): d4a1ef00d163bc42e277c83d0a763fa11476af56
Signer:
Signing key:
Signing status: N
Tree: 5157b1a642f4b2e8da2d200fbd104364a9a5a74c
File Lines added Lines deleted
drivers/gpu/alga/amd/atombios/tables/vram_info.h 1 1
drivers/gpu/alga/amd/atombios/vram.c 8 13
drivers/gpu/alga/amd/si/dyn_pm/dyn_pm.c 3 3
drivers/gpu/alga/amd/si/dyn_pm/smc_tbls.c 1 1
File drivers/gpu/alga/amd/atombios/tables/vram_info.h changed (mode: 100644) (index 8ceb282..8bb4521)
... ... struct reg_set_partial {
27 27 #define REG_IDX_MISC_TERMINATOR 0x80 #define REG_IDX_MISC_TERMINATOR 0x80
28 28 #define REG_IDX_MISC_REG_VAL_LOCATION 0x0f #define REG_IDX_MISC_REG_VAL_LOCATION 0x0f
29 29 /* same value then in the previous set */ /* same value then in the previous set */
30 #define REG_IDX_MISC_REG_VAL_EQU_PREV 0x0
30 #define REG_IDX_MISC_REG_VAL_FROM_PREV_VAL 0x0
31 31 /* value sequentially from the tbl of __le32 values from the current set */ /* value sequentially from the tbl of __le32 values from the current set */
32 32 #define REG_IDX_MISC_REG_VAL_FROM_TBL 0x4 #define REG_IDX_MISC_REG_VAL_FROM_TBL 0x4
33 33 struct reg_idx { struct reg_idx {
File drivers/gpu/alga/amd/atombios/vram.c changed (mode: 100644) (index daec212..1c192fe)
... ... static long regs_addr_cpy(struct atombios *atb, struct reg_tbl_partial *reg_tbl,
51 51
52 52 reg_idxs_sz = get_unaligned_le16(&reg_tbl->idxs_sz); reg_idxs_sz = get_unaligned_le16(&reg_tbl->idxs_sz);
53 53 /* remove the terminating REG_IDX_MISC_TERMINATOR element */ /* remove the terminating REG_IDX_MISC_TERMINATOR element */
54 regs_n = reg_idxs_sz / sizeof(struct reg_idx) - 1;
54 regs_n = reg_idxs_sz / sizeof(*reg_idx) - 1;
55 55 if (regs_n > REGS_N_MAX) { if (regs_n > REGS_N_MAX) {
56 56 dev_err(atb->adev.dev, "atombios:vram_info too many memory controller registers\n"); dev_err(atb->adev.dev, "atombios:vram_info too many memory controller registers\n");
57 57 return -ATB_ERR; return -ATB_ERR;
58 58 } }
59 59
60 60 /* point to the first struct reg_idx of the array in the tbl */ /* point to the first struct reg_idx of the array in the tbl */
61 reg_idx = (struct reg_idx*)((u8*)reg_tbl + sizeof(reg_tbl));
61 reg_idx = (struct reg_idx*)((u8*)reg_tbl + sizeof(*reg_tbl));
62 62 reg = 0; reg = 0;
63 63 while (reg < regs_n) { while (reg < regs_n) {
64 64 if (reg_idx->misc & REG_IDX_MISC_TERMINATOR) if (reg_idx->misc & REG_IDX_MISC_TERMINATOR)
65 65 break; break;
66 66
67 67 atb_mc_reg_tbl->addrs[reg] = (u32)( atb_mc_reg_tbl->addrs[reg] = (u32)(
68 get_unaligned_le16( &reg_idx->idx)
68 get_unaligned_le16(&reg_idx->idx)
69 69 << 2); << 2);
70 70 regs_val_location[reg] = reg_idx->misc regs_val_location[reg] = reg_idx->misc
71 71 & REG_IDX_MISC_REG_VAL_LOCATION; & REG_IDX_MISC_REG_VAL_LOCATION;
 
... ... static void regs_vals_cpy(struct atb_mc_reg_tbl *atb_mc_reg_tbl,
90 90 for (reg = 0; reg < atb_mc_reg_tbl->addrs_n; ++reg) { for (reg = 0; reg < atb_mc_reg_tbl->addrs_n; ++reg) {
91 91 if (regs_val_location[reg] == REG_IDX_MISC_REG_VAL_FROM_TBL) { if (regs_val_location[reg] == REG_IDX_MISC_REG_VAL_FROM_TBL) {
92 92 atb_mc_reg_tbl->sets[set_idx].vals[reg] atb_mc_reg_tbl->sets[set_idx].vals[reg]
93 = get_unaligned_le32(&cur_reg_val);
93 = get_unaligned_le32(cur_reg_val);
94 94 ++cur_reg_val; ++cur_reg_val;
95 95 } else if (regs_val_location[reg] } else if (regs_val_location[reg]
96 == REG_IDX_MISC_REG_VAL_EQU_PREV) {
96 == REG_IDX_MISC_REG_VAL_FROM_PREV_VAL) {
97 97 atb_mc_reg_tbl->sets[set_idx].vals[reg] atb_mc_reg_tbl->sets[set_idx].vals[reg]
98 = atb_mc_reg_tbl->sets[set_idx - 1].vals[reg];
98 = atb_mc_reg_tbl->sets[set_idx].vals[reg - 1];
99 99 } }
100 100 } }
101 101 } }
 
... ... static long sets_cpy(struct atombios *atb, struct reg_tbl_partial *reg_tbl,
111 111 u32 set_misc; u32 set_misc;
112 112
113 113 reg_idxs_sz = get_unaligned_le16(&reg_tbl->idxs_sz); reg_idxs_sz = get_unaligned_le16(&reg_tbl->idxs_sz);
114 set = (struct reg_set_partial*)((u8*)reg_tbl + sizeof(reg_tbl)
114 set = (struct reg_set_partial*)((u8*)reg_tbl + sizeof(*reg_tbl)
115 115 + reg_idxs_sz); + reg_idxs_sz);
116 116 set_sz = get_unaligned_le16(&reg_tbl->set_sz); set_sz = get_unaligned_le16(&reg_tbl->set_sz);
117 117
 
... ... static long sets_cpy(struct atombios *atb, struct reg_tbl_partial *reg_tbl,
141 141 set = (struct reg_set_partial*)((u8*)set + set_sz); set = (struct reg_set_partial*)((u8*)set + set_sz);
142 142 } }
143 143 if (set_misc != REG_SET_MISC_TERMINATOR) { if (set_misc != REG_SET_MISC_TERMINATOR) {
144 dev_err(atb->adev.dev, "atombios:vram_info corrupted set of memory controller register values\n");
144 dev_err(atb->adev.dev, "atombios:vram_info corrupted sets of memory controller register values\n");
145 145 return -ATB_ERR; return -ATB_ERR;
146 146 } }
147 147 atb_mc_reg_tbl->sets_n = set_idx; atb_mc_reg_tbl->sets_n = set_idx;
 
... ... long atb_vram_info(struct atombios *atb, struct atb_mc_reg_tbl *atb_mc_reg_tbl)
175 175 s4 = atb->adev.rr32(atb->adev.dev, S4); s4 = atb->adev.rr32(atb->adev.dev, S4);
176 176 module_idx = (u8)((s4 >> 16) & 0xff); module_idx = (u8)((s4 >> 16) & 0xff);
177 177
178 if (module_idx >= info->modules_n) {
179 dev_err(atb->adev.dev, "atombios:vram_info invalid module index\n");
180 return -ATB_ERR;
181 }
182
183 178 of = get_unaligned_le16(&info->mem_clk_patch_tbl_of); of = get_unaligned_le16(&info->mem_clk_patch_tbl_of);
184 179 reg_tbl = (struct reg_tbl_partial*)((u8*)info + of); reg_tbl = (struct reg_tbl_partial*)((u8*)info + of);
185 180
File drivers/gpu/alga/amd/si/dyn_pm/dyn_pm.c changed (mode: 100644) (index 4970037..24ed225)
... ... void dyn_pm_pre_ena(struct pci_dev *dev)
721 721
722 722 /* /*
723 723 * during the smc tbls init, in order to compute the dram timings for * during the smc tbls init, in order to compute the dram timings for
724 * the mc arb, an atombios table is used. But that atombios table is
725 * actually programming the hw. To be more accurate, that atombios table
724 * the mc arb, an atombios tbl is used. But that atombios tbl is
725 * actually programming the hw. To be more accurate, that atombios tbl
726 726 * is programming the mc arb reg set f0. The mc arb has 4 hw sets of * is programming the mc arb reg set f0. The mc arb has 4 hw sets of
727 * regs. Then the currently used hw set is switch to f1 to let us
727 * regs. Then the currently used hw set is switched to f1 to let us
728 728 * use the hw set f0 to compute dram timings without touching the * use the hw set f0 to compute dram timings without touching the
729 729 * currently used timings. * currently used timings.
730 730 * Please amd, fix this with a clean atombios tbl! :) * Please amd, fix this with a clean atombios tbl! :)
File drivers/gpu/alga/amd/si/dyn_pm/smc_tbls.c changed (mode: 100644) (index 8de94b2..3369697)
... ... static void tbls_cpy(struct ctx *ctx, struct smc_state_tbl *smc_state_tbl,
117 117 #ifdef CONFIG_ALGA_AMD_SI_DYN_PM_LOG #ifdef CONFIG_ALGA_AMD_SI_DYN_PM_LOG
118 118 memset(smc_mc_arb_tbl, 0, sizeof(*smc_mc_arb_tbl)); memset(smc_mc_arb_tbl, 0, sizeof(*smc_mc_arb_tbl));
119 119 smc_memcpy_from(ctx->dev, (u8*)smc_mc_arb_tbl, smc_ram_tbl_of, smc_memcpy_from(ctx->dev, (u8*)smc_mc_arb_tbl, smc_ram_tbl_of,
120 sizeof(*smc_mc_reg_tbl));
120 sizeof(*smc_mc_arb_tbl));
121 121 smc_mc_arb_tbl_dump(smc_mc_arb_tbl); smc_mc_arb_tbl_dump(smc_mc_arb_tbl);
122 122 #endif #endif
123 123
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