Subject | Hash | Author | Date (UTC) |
---|---|---|---|
order matters | 0102f69355f70737fcebc74f8e94d39486a1ce83 | Sylvain BERTRAND | 2014-09-03 19:16:04 |
add the I2C algo | acd92dd9affcc7902a444084b7dc101820c3cd83 | Sylvain BERTRAND | 2014-09-03 18:47:20 |
typo | ccb7d6e12b38adecd8a77bfce7bcc67c4bd361f4 | Sylvain BERTRAND | 2014-09-01 10:29:10 |
new PCI IDS | ea4bc021abcfc66e48f6565ce02e719b1cf4db97 | Sylvain BERTRAND | 2014-09-01 09:03:12 |
mc fw2 issues are actually dpm issues | eecf2acffb1798e42f4a77b1d351e62dc297fb17 | Sylvain BERTRAND | 2014-09-01 08:53:26 |
add no_dpm option because radeon dpm is a shame | 003cb84f01f60e99b138d0694ddf58bebf724fd6 | Sylvain BERTRAND | 2014-09-01 08:41:24 |
page flip fix | e51d9d4b1788c17633b0cdffd7a50309d51f8d0f | Sylvain BERTRAND | 2014-08-30 14:08:35 |
ack-ing the DCE irqs at the right time | a12ec7f4781872de8d155e4e1d90b07df3e44c34 | Sylvain BERTRAND | 2014-08-28 15:23:29 |
normal programs use normal syscalls then ioctl | 37589b6856d941efdc763eed41b237f4f62cb960 | Sylvain BERTRAND | 2014-07-08 19:01:52 |
new firware breaks the 3D pipeline | 13db71ba4522d7266d68a21f43f25ee3781d0b92 | Sylvain BERTRAND | 2014-07-03 22:54:30 |
closed src or gnu gpl *not* v2 drivers are illegal | dc1de426b639ffee863b0a211e9cf0e349f855f0 | Sylvain BERTRAND | 2014-07-03 17:59:46 |
compiling with 3.16 rc2 new mc fw code | e00afdaeef8513da35c82cc82dcfee0745aa9129 | Sylvain BERTRAND | 2014-06-29 01:54:40 |
untested handling of new mc fw | eb89a71b0af7781d1fc9ee226c1269b6d5183749 | Sylvain BERTRAND | 2014-06-29 01:26:15 |
become legal | ef922b67f25aaf0c4f8cff5be572e53fb53bdfe5 | Sylvain BERTRAND | 2014-06-28 23:33:40 |
use usleep_range and fix a dp 1.1 time out | d4183ce73e6ec7d7f3baf9d710dd2ba015b4a6a9 | Sylvain BERTRAND | 2014-02-19 20:09:44 |
fix dac | a864ba601253674b679b07e4b1ddc00fb83a8cb6 | Sylvain BERTRAND | 2014-02-19 19:17:08 |
clear atombias dpm state and warn for instability | 28b598d81f6a873f90d1a9325e3e1002743487a5 | Sylvain BERTRAND | 2014-02-19 19:10:43 |
CFG_MEM_SZ upper 16bits may have garbage | f08f2e3471989e448d6d76ba02565fd9efc3293f | Sylvain BERTRAND | 2014-02-19 17:55:38 |
fix ena rbs mask performance critical bug | 289497449dd0f2acb09e03f65988e22e45948fb6 | Sylvain BERTRAND | 2014-02-19 17:15:18 |
upstream confirm bug, fixed | e2142c3fdfc01d51e7fec7687ec4d02f548ce763 | Sylvain BERTRAND | 2014-02-18 16:10:14 |
File | Lines added | Lines deleted |
---|---|---|
drivers/gpu/alga/amd/si/cm.c | 8 | 3 |
File drivers/gpu/alga/amd/si/cm.c changed (mode: 100644) (index bc714c8..d5e0b55) | |||
... | ... | static __maybe_unused void gfx_cgcg_ena(struct pci_dev *dev) | |
84 | 84 | ||
85 | 85 | cur = rr32(dev, RLC_CGCG_CGLS_CTL); | cur = rr32(dev, RLC_CGCG_CGLS_CTL); |
86 | 86 | ||
87 | /* | ||
88 | * FIXME: weird since this code is supposed to run in a critical | ||
89 | * section where it is disabled. Since it is not supported on | ||
90 | * southern islands, we let it remain here | ||
91 | */ | ||
87 | 92 | gpu_3d_ring_intr_idle_ena(dev); | gpu_3d_ring_intr_idle_ena(dev); |
88 | 93 | ||
89 | 94 | rlc_cgcg_ena(dev); | rlc_cgcg_ena(dev); |
... | ... | static void uvd_mgcg_ena(struct pci_dev *dev) | |
143 | 148 | ||
144 | 149 | void cg_ena(struct pci_dev *dev) | void cg_ena(struct pci_dev *dev) |
145 | 150 | { | { |
146 | gpu_3d_ring_intr_idle_dis(dev);/* XXX: may be managed above */ | ||
151 | gpu_3d_ring_intr_idle_dis(dev); | ||
147 | 152 | gfx_mgcg_ena(dev); | gfx_mgcg_ena(dev); |
148 | 153 | /* | /* |
149 | 154 | * coarse grained clock gating for the gfx set of blocks is not yet | * coarse grained clock gating for the gfx set of blocks is not yet |
... | ... | void cg_ena(struct pci_dev *dev) | |
151 | 156 | */ | */ |
152 | 157 | gfx_cgcg_dis(dev); | gfx_cgcg_dis(dev); |
153 | 158 | ||
154 | gpu_3d_ring_intr_idle_ena(dev);/* XXX: may be managed above */ | ||
159 | gpu_3d_ring_intr_idle_ena(dev); | ||
155 | 160 | ||
156 | 161 | mc_mgcg_ena(dev); | mc_mgcg_ena(dev); |
157 | 162 | mc_ls_ena(dev); | mc_ls_ena(dev); |
... | ... | void cg_ena(struct pci_dev *dev) | |
171 | 176 | void cg_dis(struct pci_dev *dev) | void cg_dis(struct pci_dev *dev) |
172 | 177 | { | { |
173 | 178 | gpu_3d_ring_intr_idle_dis(dev); | gpu_3d_ring_intr_idle_dis(dev); |
174 | gfx_mgcg_dis(dev); | ||
175 | 179 | gfx_cgcg_dis(dev); | gfx_cgcg_dis(dev); |
180 | gfx_mgcg_dis(dev); | ||
176 | 181 | gpu_3d_ring_intr_idle_ena(dev); | gpu_3d_ring_intr_idle_ena(dev); |
177 | 182 | ||
178 | 183 | mc_mgcg_dis(dev); | mc_mgcg_dis(dev); |