sylware / linux-gpu-amd-si (public) (License: GPLv2+) (since 2019-09-09) (hash sha1)
my old AMD Southern Islands GPU linux driver
Clone URLs: https://rocketgit.com/user/sylware/linux-gpu-amd-si ssh://rocketgit@ssh.rocketgit.com/user/sylware/linux-gpu-amd-si git://git.rocketgit.com/user/sylware/linux-gpu-amd-si
master
List of commits:
Subject Hash Author Date (UTC)
mc fw2 issues are actually dpm issues eecf2acffb1798e42f4a77b1d351e62dc297fb17 Sylvain BERTRAND 2014-09-01 08:53:26
add no_dpm option because radeon dpm is a shame 003cb84f01f60e99b138d0694ddf58bebf724fd6 Sylvain BERTRAND 2014-09-01 08:41:24
page flip fix e51d9d4b1788c17633b0cdffd7a50309d51f8d0f Sylvain BERTRAND 2014-08-30 14:08:35
ack-ing the DCE irqs at the right time a12ec7f4781872de8d155e4e1d90b07df3e44c34 Sylvain BERTRAND 2014-08-28 15:23:29
normal programs use normal syscalls then ioctl 37589b6856d941efdc763eed41b237f4f62cb960 Sylvain BERTRAND 2014-07-08 19:01:52
new firware breaks the 3D pipeline 13db71ba4522d7266d68a21f43f25ee3781d0b92 Sylvain BERTRAND 2014-07-03 22:54:30
closed src or gnu gpl *not* v2 drivers are illegal dc1de426b639ffee863b0a211e9cf0e349f855f0 Sylvain BERTRAND 2014-07-03 17:59:46
compiling with 3.16 rc2 new mc fw code e00afdaeef8513da35c82cc82dcfee0745aa9129 Sylvain BERTRAND 2014-06-29 01:54:40
untested handling of new mc fw eb89a71b0af7781d1fc9ee226c1269b6d5183749 Sylvain BERTRAND 2014-06-29 01:26:15
become legal ef922b67f25aaf0c4f8cff5be572e53fb53bdfe5 Sylvain BERTRAND 2014-06-28 23:33:40
use usleep_range and fix a dp 1.1 time out d4183ce73e6ec7d7f3baf9d710dd2ba015b4a6a9 Sylvain BERTRAND 2014-02-19 20:09:44
fix dac a864ba601253674b679b07e4b1ddc00fb83a8cb6 Sylvain BERTRAND 2014-02-19 19:17:08
clear atombias dpm state and warn for instability 28b598d81f6a873f90d1a9325e3e1002743487a5 Sylvain BERTRAND 2014-02-19 19:10:43
CFG_MEM_SZ upper 16bits may have garbage f08f2e3471989e448d6d76ba02565fd9efc3293f Sylvain BERTRAND 2014-02-19 17:55:38
fix ena rbs mask performance critical bug 289497449dd0f2acb09e03f65988e22e45948fb6 Sylvain BERTRAND 2014-02-19 17:15:18
upstream confirm bug, fixed e2142c3fdfc01d51e7fec7687ec4d02f548ce763 Sylvain BERTRAND 2014-02-18 16:10:14
mainly bug fixing 1650d6a6e13bd81a4df9bfaa84a5daef2989ccdf Sylvain BERTRAND 2014-02-18 12:46:40
dump smc sw regs 5b42263039c858624ff411d94318f6ef5171a864 Sylvain BERTRAND 2014-02-17 12:22:26
disable switch to low power when no display 69f94e04ea89c1fe9ccaef153da5f5ade232c2a1 Sylvain BERTRAND 2014-02-17 09:59:28
finish smc switch to driver power state 6f99d0a01491dd671174919d842a771ac4a81a4b Sylvain BERTRAND 2014-02-17 09:47:02
Commit eecf2acffb1798e42f4a77b1d351e62dc297fb17 - mc fw2 issues are actually dpm issues
Author: Sylvain BERTRAND
Author date (UTC): 2014-09-01 08:53
Committer name: Sylvain BERTRAND
Committer date (UTC): 2014-09-01 08:53
Parent(s): 003cb84f01f60e99b138d0694ddf58bebf724fd6
Signing key:
Tree: cba32a7f12473dd079de34e688593bf06022c573
File Lines added Lines deleted
drivers/gpu/alga/amd/si/drv.c 0 3
drivers/gpu/alga/amd/si/drv.h 0 4
drivers/gpu/alga/amd/si/mc.c 13 39
File drivers/gpu/alga/amd/si/drv.c changed (mode: 100644) (index 4efeeae..2da74d9)
48 48
49 49 #include "regs.h" #include "regs.h"
50 50
51 bool fw_mc2 = 0;
52 51 bool no_dpm = 0; bool no_dpm = 0;
53 module_param(fw_mc2, bool, 0);
54 MODULE_PARM_DESC(fw_mc2, "enable the new memory controller firmware (breaks the 3D pipeline)");
55 52 module_param(no_dpm, bool, 0); module_param(no_dpm, bool, 0);
56 53 MODULE_PARM_DESC(no_dpm, "disable dynamic power management (end in power boot state which is not the highest)"); MODULE_PARM_DESC(no_dpm, "disable dynamic power management (end in power boot state which is not the highest)");
57 54
File drivers/gpu/alga/amd/si/drv.h changed (mode: 100644) (index 55401a0..525c68b)
5 5 Protected by linux GNU GPLv2 Protected by linux GNU GPLv2
6 6 Copyright 2012-2014 Copyright 2012-2014
7 7 */ */
8 #ifndef DRV_C
9 extern bool fw_mc2;
10 #endif
11
12 8 #define TAHITI 0 #define TAHITI 0
13 9 #define PITCAIRN 1 #define PITCAIRN 1
14 10 #define VERDE 2 #define VERDE 2
File drivers/gpu/alga/amd/si/mc.c changed (mode: 100644) (index 99deaf7..56eaa2b)
30 30
31 31 #include "regs.h" #include "regs.h"
32 32
33 #define TAHITI_MC_FW_DWS 7769
34 #define PITCAIRN_MC_FW_DWS 7769
35 #define VERDE_MC_FW_DWS 7769
36 #define OLAND_MC_FW_DWS 7863
37 MODULE_FIRMWARE("radeon/TAHITI_mc.bin");
38 MODULE_FIRMWARE("radeon/PITCAIRN_mc.bin");
39 MODULE_FIRMWARE("radeon/VERDE_mc.bin");
40 MODULE_FIRMWARE("radeon/OLAND_mc.bin");
41
42 33 #define TAHITI_MC2_FW_DWS 7808 #define TAHITI_MC2_FW_DWS 7808
43 34 #define PITCAIRN_MC2_FW_DWS 7775 #define PITCAIRN_MC2_FW_DWS 7775
44 35 #define VERDE_MC2_FW_DWS 7875 #define VERDE_MC2_FW_DWS 7875
 
... ... long mc_ucode_load(struct pci_dev *dev)
275 266 dd = pci_get_drvdata(dev); dd = pci_get_drvdata(dev);
276 267 dd->mc_fw_dws = 0; dd->mc_fw_dws = 0;
277 268
278 if (fw_mc2) {
279 switch (dd->family) {
280 case TAHITI:
281 dd->mc_fw_dws = TAHITI_MC2_FW_DWS;
282 break;
283 case PITCAIRN:
284 dd->mc_fw_dws = PITCAIRN_MC2_FW_DWS;
285 break;
286 case VERDE:
287 dd->mc_fw_dws = VERDE_MC2_FW_DWS;
288 break;
289 case OLAND:
290 dd->mc_fw_dws = OLAND_MC2_FW_DWS;
291 }
292 fw_version_str = "mc2";
293 } else {
294 switch (dd->family) {
295 case TAHITI:
296 dd->mc_fw_dws = TAHITI_MC_FW_DWS;
297 break;
298 case PITCAIRN:
299 dd->mc_fw_dws = PITCAIRN_MC_FW_DWS;
300 break;
301 case VERDE:
302 dd->mc_fw_dws = VERDE_MC_FW_DWS;
303 break;
304 case OLAND:
305 dd->mc_fw_dws = OLAND_MC_FW_DWS;
306 }
307 fw_version_str = "mc";
269 switch (dd->family) {
270 case TAHITI:
271 dd->mc_fw_dws = TAHITI_MC2_FW_DWS;
272 break;
273 case PITCAIRN:
274 dd->mc_fw_dws = PITCAIRN_MC2_FW_DWS;
275 break;
276 case VERDE:
277 dd->mc_fw_dws = VERDE_MC2_FW_DWS;
278 break;
279 case OLAND:
280 dd->mc_fw_dws = OLAND_MC2_FW_DWS;
308 281 } }
282 fw_version_str = "mc2";
309 283
310 284 r = ucode_load(dev, &(dd->mc_fw), fw_version_str, dd->mc_fw_dws); r = ucode_load(dev, &(dd->mc_fw), fw_version_str, dd->mc_fw_dws);
311 285 return r; return r;
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